diff --git a/hw/riscv/ot_earlgrey.c b/hw/riscv/ot_earlgrey.c
index 0fdfc591cefbb..a4197d355d85e 100644
--- a/hw/riscv/ot_earlgrey.c
+++ b/hw/riscv/ot_earlgrey.c
@@ -1720,7 +1720,7 @@ static void ot_eg_soc_reset_hold(Object *obj, ResetType type)
      * PowerManager takes care of managing Ibex reset when ready
      */
     CPUState *cs = CPU(s->devices[OT_EG_SOC_DEV_HART]);
-    cs->disabled = false;
+    cs->disabled = true;
 }
 
 static void ot_eg_soc_reset_exit(Object *obj, ResetType type)