SPI Interface for DepthAI API #140

Start with the why:

In many cases using a micro-controller can be advantages compared to a full-out Linux system:

• fast boot time (measured in milliseconds instead of seconds)
• capability to completely power off (i.e. no battery drain at all) for long periods of time
• cost (eliminating the linux tax in terms of additional onboard storage needed for Linux)
• verifiable controls (i.e. strict real-time application/drive of mechatronics/etc. w/ determinism)
• power (running Linux may be completely overkill in general)
• a micro controller already is driving a given design/application (and working well)

So one advantage of DepthAI is it is such a system... booting over eMMC it can be fully up/running in under 100 milliseconds, and ~400 milliseconds from NOR flash.

So using DepthAI with such micro-controller applications is valuable. And a popular/easy way to interface between microcontrollers is SPI (COPI/CIPO).

Move to the how:

We have initially implemented a SPI protocol w/ CRC capability for DepthAI to act as a SPI peripheral. So then a microcontroller is the SPI controller and can pull data off of DepthAI when it sees fit.

At the physical layer (see luxonis/oak-hardware#10), there will be a GPIO output so that DepthAI can interrupt the microcontroller when new/pertinent data is available. (This pin can also be ignored/not-connected if desired and the microcontroller can simply poll or request data when it wants to.)

Initially we will implement support tensor outputs from the salient neural networks (upon request from the SPI controller), but will expand to allow all the pertinent functionality from #136 to be included, both as input and output.

Move to the what:

SPI communication support for DepthAI.

• Will function in parallel to USB interface (for easier system integration debugging).
• Will function off of NOR-flash boot and eMMC-boot (and likely uSD-Card boot) for hostless operation.