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  • 65 commits
  • 153 files changed
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  • 19 contributors
Jun 22, 2011
Daniel Dunbar test/Unit: Fix enable shared test to follow check that we have actual…
…ly loaded

the site config.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133641 91177308-0d34-0410-b5e6-96231b3b80d8
46d061c
New binops need debug loc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133642 91177308-0d34-0410-b5e6-96231b3b80d8
df3ad66
Bill Wendling Move class methods out-of-line. This reduces the indentation, and is …
…more in

line with LLVM's general coding style.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133645 91177308-0d34-0410-b5e6-96231b3b80d8
bbdffa9
Revert r133607. This is causing failures in the Clang gccTestSuite.
Specifically, gcc.c-torture/compile/pr21356.c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133646 91177308-0d34-0410-b5e6-96231b3b80d8
f78b595
nlewycky Fix the implementation of ConstantRange::sub(ConstantRange). Patch by…
… Xi Wang!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133648 91177308-0d34-0410-b5e6-96231b3b80d8
e6240e8
Bill Wendling Add a __LD,__compact_unwind section.
If the linker supports it, this will hold the CIE and FDE information in a
compact format. The implementation of the compact unwinding emission is coming
soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133658 91177308-0d34-0410-b5e6-96231b3b80d8
aa0a8f3
Rafael Ávila de Espíndola Reenable tail duplication of bb with just an unconditional jump, but
don't remove blocks that have their address taken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133659 91177308-0d34-0410-b5e6-96231b3b80d8
d6379a9
Bill Wendling Add a flag that indicates whether a target supports compact unwind in…
…fo or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133662 91177308-0d34-0410-b5e6-96231b3b80d8
1a3ab63
lit support for REQUIRES: asserts.
Take #2. Don't piggyback on the existing config.build_mode. Instead,
define a new lit feature for each build feature we need (currently
just "asserts"). Teach both autoconf'd and cmake'd Makefiles to define
this feature within test/lit.site.cfg. This doesn't require any lit
harness changes and should be more robust across build systems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133664 91177308-0d34-0410-b5e6-96231b3b80d8
f2a5842
Jun 23, 2011
Bill Wendling 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133668 91177308-0d34-0410-b5e6-96231b3b80d8
3f2ea82
Bill Wendling Allow the AsmInfo to query the TLOF to see if it supports compact unw…
…ind.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133669 91177308-0d34-0410-b5e6-96231b3b80d8
de0cea7
Bill Wendling Allow the AsmInfo to query for the compact unwind section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133670 91177308-0d34-0410-b5e6-96231b3b80d8
533c9ac
Bill Wendling Some skeleton code to emit the compact unwind. If the information is …
…unable to

be emitted in a compact way, we then default to emitting a CIE and FDE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133676 91177308-0d34-0410-b5e6-96231b3b80d8
e3cd13f
Get rid of one getStackAlignment(). RegisterInfo shouldn't need to kn…
…ow about stack alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133679 91177308-0d34-0410-b5e6-96231b3b80d8
2fa82bc
Rafael Ávila de Espíndola Move more logic to shouldTailDuplicate and only duplicate regular bb …
…before

register allocation if it has a indirectbr or if we can duplicate it to
every predecessor.

This fixes the SingleSource/Benchmarks/Shootout-C++/matrix.cpp regression but
keeps the previous improvements to sunspider.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133682 91177308-0d34-0410-b5e6-96231b3b80d8
9dbbd87
Bill Wendling Use the presence of the __compact_unwind section to indicate that a t…
…arget

supports compact unwind info instead of having a separate flag indicating this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133685 91177308-0d34-0410-b5e6-96231b3b80d8
4c0c446
Revert r133513:
"Reinstate r133435 and r133449 (reverted in r133499) now that the clang
self-hosted build failure has been fixed (r133512)."

Due to some additional warnings.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133700 91177308-0d34-0410-b5e6-96231b3b80d8
e59fbc0
Bill Wendling Formatting changes. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133706 91177308-0d34-0410-b5e6-96231b3b80d8
a8c9e6a
Bill Wendling Use a reference. Don't make a useless copy of the vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133707 91177308-0d34-0410-b5e6-96231b3b80d8
5b46e8e
jayfoad Reinstate r133513 (reverted in r133700) with an additional fix for a
-Wshorten-64-to-32 warning in Instructions.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133708 91177308-0d34-0410-b5e6-96231b3b80d8
95c3e48
nobled CppBackend: fixup for api change
This broke after r133364.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133709 91177308-0d34-0410-b5e6-96231b3b80d8
4dd26dd
nobled remove CMake mode_t define
It's now replaced with a simple ifdef _MSC_VER in the one
place it's needed (clang's FileManager.h header).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133711 91177308-0d34-0410-b5e6-96231b3b80d8
3fa9a42
nobled Don't include config.h in public headers
Replace it with llvm-config.h, which defines a subset of
config.h's macros "so that they can be in exported headers 
and won't override package specific directives", e.g.,
PACKAGE_NAME.

Endian.h wasn't using any macros at all though, so just delete
the include there instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133712 91177308-0d34-0410-b5e6-96231b3b80d8
4e5885d
nobled Support: make floating-exception header private
It has only one user. This eliminates the last include of
config.h from the public headers -- ideally, config.h
shouldn't even be installed by `make install` anymore.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133713 91177308-0d34-0410-b5e6-96231b3b80d8
5417eed
Rafael Ávila de Espíndola 133713 broke the build, revert it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133714 91177308-0d34-0410-b5e6-96231b3b80d8
cd34486
nobled revert 133714
It broke the build worse.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133716 91177308-0d34-0410-b5e6-96231b3b80d8
e8e00f5
Rafael Ávila de Espíndola Add missing file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133717 91177308-0d34-0410-b5e6-96231b3b80d8
385f461
Rafael Ávila de Espíndola Revert "revert 133714"
This reverts commit e8e00f5.

The cmake build on OS X is still broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133718 91177308-0d34-0410-b5e6-96231b3b80d8
8347185
cmake+lit: handle ENABLE_ASSERTIONS feature properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133725 91177308-0d34-0410-b5e6-96231b3b80d8
75d3387
Remove TargetOptions.h dependency from X86Subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133726 91177308-0d34-0410-b5e6-96231b3b80d8
ef41ff6
cmake+lit: final cleanup related to the recent churn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133729 91177308-0d34-0410-b5e6-96231b3b80d8
28578e3
Justin Holewinski PTX: Use .param space for parameters in device functions for SM >= 2.0
FIXME: DCE is eliminating the final st.param.x calls, figure out why

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133732 91177308-0d34-0410-b5e6-96231b3b80d8
67a9184
Justin Holewinski PTX: Prevent DCE from eliminating st.param calls, and unify the handl…
…ing of

     st.param and ld.param

FIXME: Test cases still need to be updated

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133733 91177308-0d34-0410-b5e6-96231b3b80d8
a5ccb4e
Justin Holewinski PTX: Whitespace fixes and remove commented out code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133734 91177308-0d34-0410-b5e6-96231b3b80d8
486ca24
Justin Holewinski PTX: Fixup test cases for device param changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133735 91177308-0d34-0410-b5e6-96231b3b80d8
6b1131e
Justin Holewinski PTX: Always use registers for return values, but use .param space for…
… device

     parameters if SM >= 2.0

- Update test cases to be more robust against register allocation changes
- Bump up the number of registers to 128 per type
- Include Python script to re-generate register file with any number of
  registers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133736 91177308-0d34-0410-b5e6-96231b3b80d8
d8149c1
Remove TargetOptions.h dependency from ARMSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133738 91177308-0d34-0410-b5e6-96231b3b80d8
df214fa
Rename TargetOptions::StackAlignment to StackAlignmentOverride.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133739 91177308-0d34-0410-b5e6-96231b3b80d8
f05589d
Fix build for (some versions of?) MinGW. Patch by Ruben Van Boxem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133741 91177308-0d34-0410-b5e6-96231b3b80d8
aeebc35
PR10180: Fix a instcombine crash with FP vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133756 91177308-0d34-0410-b5e6-96231b3b80d8
00805fa
Add support for movntil/movntiq mnemonics. Reported on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133759 91177308-0d34-0410-b5e6-96231b3b80d8
a390a1a
Introduce BlockFrequency analysis for BasicBlocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133766 91177308-0d34-0410-b5e6-96231b3b80d8
44eb49c
Missing files for the BlockFrequency analysis added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133767 91177308-0d34-0410-b5e6-96231b3b80d8
fd9533b
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133770 91177308-0d34-0410-b5e6-96231b3b80d8
0edb05b
Calculate backedge probability correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133776 91177308-0d34-0410-b5e6-96231b3b80d8
66dddd1
Jun 24, 2011
Starting to refactor Target to separate out code that's needed to ful…
…ly describe

target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
a347f85
Fix CellSPU CMakeLists.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133787 91177308-0d34-0410-b5e6-96231b3b80d8
6db5d55
Benjamin Kramer Make the generated InitXXXMCRegisterInfo function "static inline", so…
… it doesn't get emitted into multiple object files.

This caused linker errors when linking both libLLVMX86Desc and libLLVMX86CodeGen
into a single binary (for example when building a monolithic libLLVM shared library).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133791 91177308-0d34-0410-b5e6-96231b3b80d8
5c10b63
Rafael Ávila de Espíndola Fix CellSPU CMakeList.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133792 91177308-0d34-0410-b5e6-96231b3b80d8
ce117be
Rafael Ávila de Espíndola Simplify now that blocks with phis are not considered simple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133793 91177308-0d34-0410-b5e6-96231b3b80d8
1f71549
Rafael Ávila de Espíndola Now that bb with phis are not considered simple, duplicate them even if
we cannot duplicate to every predecessor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133797 91177308-0d34-0410-b5e6-96231b3b80d8
d7f35fa
Rafael Ávila de Espíndola Simplify
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133798 91177308-0d34-0410-b5e6-96231b3b80d8
40179bf
Justin Holewinski PTX: Re-work target sm/compute selection and add some basic GPU
     targets: g80, gt200, gf100(fermi)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133799 91177308-0d34-0410-b5e6-96231b3b80d8
35f4fb3
Prevent generation of redundant addiu instructions that compute addre…
…ss of

static variables or functions. 




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133803 91177308-0d34-0410-b5e6-96231b3b80d8
8b2b713
jpbonn Merge branch 'master' of http://llvm.org/git/llvm into mico32 f49de2a
Fixup info for Thumb2 unconditional branch.
rdar://9667872

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133808 91177308-0d34-0410-b5e6-96231b3b80d8
535e58b
Change the chain input of nodes that load the address of a function. …
…This change

 enables SelectionDAG::getLoad at MipsISelLowering.cpp:1914 to return a
pre-existing node instead of redundantly create a new node every time it is
called.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133811 91177308-0d34-0410-b5e6-96231b3b80d8
25eba39
Justin Holewinski PTX: Add preliminary support for outputting debug information in the …
…form of

     .file and .loc directives.

Ideally, we would utilize the existing support in AsmPrinter for this, but
I cannot find a way to get .file and .loc directives to print without the
rest of the associated DWARF sections, which ptxas cannot handle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133812 91177308-0d34-0410-b5e6-96231b3b80d8
4799729
The Neon VCVT (between floating-point and fixed-point, Advanced SIMD)
instructions can be used to match combinations of multiply/divide and VCVT 
(between floating-point and integer, Advanced SIMD).  Basically the VCVT 
immediate operand that specifies the number of fraction bits corresponds to a 
floating-point multiply or divide by the corresponding power of 2.

For example, VCVT (floating-point to fixed-point, Advanced SIMD) can replace a 
combination of VMUL and VCVT (floating-point to integer) as follows:

Example (assume d17 = <float 8.000000e+00, float 8.000000e+00>):
  vmul.f32        d16, d17, d16
  vcvt.s32.f32    d16, d16
becomes:
  vcvt.s32.f32    d16, d16, #3

Similarly, VCVT (fixed-point to floating-point, Advanced SIMD) can replace a 
combinations of VCVT (integer to floating-point) and VDIV as follows:

Example (assume d17 = <float 8.000000e+00, float 8.000000e+00>):
  vcvt.f32.s32    d16, d16
  vdiv.f32        d16, d17, d16
becomes:
  vcvt.f32.s32    d16, d16, #3

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133813 91177308-0d34-0410-b5e6-96231b3b80d8
ef01edf
PTX: Add support for i8 type and introduce associated .b8 registers
The i8 type is required for boolean values, but can only use ld, st and mov instructions. The i1 type continues to be used for predicates.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133814 91177308-0d34-0410-b5e6-96231b3b80d8
b05a8a8
tidy up whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133815 91177308-0d34-0410-b5e6-96231b3b80d8
32e7abd
ARM movw/movt fixups need to mask the high bits.
The fixup value comes in as the whole 32-bit value, so for the lo16 fixup,
the upper bits need to be masked off. Previously we assumed the masking had
already been done and asserted.

rdar://9635991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133818 91177308-0d34-0410-b5e6-96231b3b80d8
8b45456
- Add MCRegisterInfo registration machinery. Also added x86 registrat…
…ion routines.

- Rename TargetRegisterDesc to MCRegisterDesc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133820 91177308-0d34-0410-b5e6-96231b3b80d8
f5fa52e
jpbonn Merge branch 'master' of http://llvm.org/git/llvm into mico32 6237a2c
jpbonn Updated to match latest LLVM HEAD:
    Starting to refactor Target to separate out code that's needed to fully describ
    target machine from those that are only needed by codegen. The goal is to
    sink the essential target description into MC layer so we can start building
    MC based tools without needing to link in the entire codegen.

    First step is to refactor TargetRegisterInfo. This patch added a base class
    MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
    separate register description from the rest of the stuff.
870130e