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Aug 18, 2011
Bill Wendling Revert r137871. The loop simplify pass should require all exits from …
…a loop that

aren't from an indirect branch need to be dominated by the loop header.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137981 91177308-0d34-0410-b5e6-96231b3b80d8
66af89f
Update autoconfig/config.{sub,guess} to the latest version
from the GNU upstream: git://git.savannah.gnu.org/config.git

1. It eliminates a local LLVM patch for auroraux (because, the
mainline config.sub has already got support of auroraux)
2. It adds several new recognized target cpus and operating systems
(in particular, PNaCl)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137984 91177308-0d34-0410-b5e6-96231b3b80d8
857fd8f
Make it clear that this code is iterating in reverse order through th…
…e array.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137985 91177308-0d34-0410-b5e6-96231b3b80d8
b48ef3a
Thumb assembly parsing and encoding for LDM instruction.
Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137986 91177308-0d34-0410-b5e6-96231b3b80d8
93b3eff
FastISel: avoid function calls between the materialization of the con…
…stant and its use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137993 91177308-0d34-0410-b5e6-96231b3b80d8
74af88a
resistor Improve handling of failure and unpredictable cases for CPS, STR, and…
… SMLA instructions.

Fixes a large class of disassembler crashes found by randomized testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137995 91177308-0d34-0410-b5e6-96231b3b80d8
14090bf
resistor Remember to fill in some operands so we can print _something_ coheren…
…t even when decoding the CPS instruction soft-fails.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137997 91177308-0d34-0410-b5e6-96231b3b80d8
1dd56f0
Add new DIE into the map asap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137998 91177308-0d34-0410-b5e6-96231b3b80d8
49e2f03
resistor Fix the decoding of RFE instruction. RFEs have the load bit set, whil…
…e SRSs have it unset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138000 91177308-0d34-0410-b5e6-96231b3b80d8
846dd95
resistor STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC…
…_POST for the purposes of decoding all operands except the predicate.

Found by randomized testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138003 91177308-0d34-0410-b5e6-96231b3b80d8
78affc9
Add NativeClient operating system support.
This patch adds support of NativeClient (*-*-nacl) OS support to LLVM.
It's already supported in autoconf/config.sub.

The motivation for this change is to start upstreaming PNaCl work. The
whole set of patches include llvm backends (i686, x86_64, ARM),
llvm-gcc (probably, would not be upstreamed because it's deprecated)
and clang (the work has been just started, the amount of changes is
going to be low and the most of the work is expected to be done close
to the mainline).




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138005 91177308-0d34-0410-b5e6-96231b3b80d8
fb23462
Eliminate unnecessary forwarding function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138006 91177308-0d34-0410-b5e6-96231b3b80d8
28bea08
Use subword loads instead of a 4-byte load when the size of a structu…
…re (or a

piece of it) that is being passed by value is smaller than a word.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138007 91177308-0d34-0410-b5e6-96231b3b80d8
5ac8547
Bill Wendling Use 'getFirstInsertionPt' when trying to insert new instructions duri…
…ng LICM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138008 91177308-0d34-0410-b5e6-96231b3b80d8
26665de
add the comments of each declaration follow it, making it easier to r…
…ead and compare to GCC's result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138009 91177308-0d34-0410-b5e6-96231b3b80d8
f1f6de1
There is no need to add file as context for subroutine type. The subr…
…outine type does not need any context.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138010 91177308-0d34-0410-b5e6-96231b3b80d8
2bd6269
bcardosolopes Re-encoded 128-bit AVX versions of SQRT, RSQRT, RCP have 3 operands
instead of 2. They were already defined this way in their regular
version, but not for the intrinsics versions (*_Int), and that would work
for assembly emission but not for object code, since a MachineOperand
would be missing. This commit fix PR10697.

Also removed the {VSQRT,VRSQRT,VRCP}r_Int forms and match the intrinsic
via INSERT_SUBREG+EXTRACT_SUBREG patterns. The same couldn't be done for
memory versions because sse_load_f32/sse_load_f64 operand need special
handling and don't work like regular "addr" operands.

There are right now 114 "*_Int" and 98 "Int_*" forms! I'm slowly
removing them as I step through, but hope we can get rid of these
someday, they are really annoying :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138012 91177308-0d34-0410-b5e6-96231b3b80d8
df01610
Aug 19, 2011
Bill Wendling Add SplitLandingPadPredecessors().
SplitLandingPadPredecessors is similar to SplitBlockPredecessors in that it
splits the current block and attaches a set of predecessors to the new basic
block. However, it differs from SplitBlockPredecessors in that it's specifically
designed to handle landing pad blocks.

Two new basic blocks are created: one that is has the vector of predecessors as
its predecessors and one that has the remaining predecessors as its
predecessors. Those two new blocks then receive a cloned copy of the landingpad
instruction from the original block. The landingpad instructions are joined in a
PHI, etc. Like SplitBlockPredecessors, it updates the LLVM IR, AliasAnalysis,
DominatorTree, DominanceFrontier, LoopInfo, and LCCSA analyses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138014 91177308-0d34-0410-b5e6-96231b3b80d8
7e8840c
Bill Wendling Intelligently split the landing pad block.
We have to be careful when splitting the landing pad block, because the
landingpad instruction is required to remain as the first non-PHI of an invoke's
unwind edge. To retain this, we split the block into two blocks, moving the
predecessors within the loop to one block and the remaining predecessors to the
other. The landingpad instruction is cloned into the new blocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138015 91177308-0d34-0410-b5e6-96231b3b80d8
b29ec06
Track a retain+release nesting level independently of the
known-incremented level, because the two concepts can be used
to prove the saftey of a retain+release removal in different
ways.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138016 91177308-0d34-0410-b5e6-96231b3b80d8
e6d5e88
Don't treat a partial <def,undef> operand as a read.
Normally, a partial register def is treated as reading the
super-register unless it also defines the full register like this:

  %vreg110:sub_32bit<def> = COPY %vreg77:sub_32bit, %vreg110<imp-def>

This patch also uses the <undef> flag on partial defs to recognize
non-reading operands:

  %vreg110:sub_32bit<def,undef> = COPY %vreg77:sub_32bit

This fixes a subtle bug in RegisterCoalescer where LIS->shrinkToUses
would treat a coalesced copy as still reading the register, extending
the live range artificially.

My test case only works when I disable DCE so a dead copy is left for
RegisterCoalescer, so I am not including it.

<rdar://problem/9967101>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138018 91177308-0d34-0410-b5e6-96231b3b80d8
201f246
Benjamin Kramer C API functions must be able to see their extern "C" definitions, or …
…it will be impossible to call them from C.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138022 91177308-0d34-0410-b5e6-96231b3b80d8
613d13b
Benjamin Kramer Make a bunch of symbols private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138025 91177308-0d34-0410-b5e6-96231b3b80d8
a67f14b
Add llc flags to disable machine DCE and CSE.
This is useful for unit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138028 91177308-0d34-0410-b5e6-96231b3b80d8
61b2d7f
bcardosolopes Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the
implementation!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138029 91177308-0d34-0410-b5e6-96231b3b80d8
863e0f2
Add test case for r138018.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138033 91177308-0d34-0410-b5e6-96231b3b80d8
7c6da77
Add TB encoding to VEX versions of SSE fp logical operations to fix d…
…isassembler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138034 91177308-0d34-0410-b5e6-96231b3b80d8
e004d94
Have SPU backend use the external TCE scheduler, if the library is lo…
…aded as a

module.

Patch by Pekka Jääskeläinen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138037 91177308-0d34-0410-b5e6-96231b3b80d8
67a9b1f
Add explanatory comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138042 91177308-0d34-0410-b5e6-96231b3b80d8
c6d7c65
Fixed some punctuation. Sentences can be combined with semi-colons bu…
…t not

commas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138043 91177308-0d34-0410-b5e6-96231b3b80d8
e865c03
Thumb assembly parsing and encoding for LDR(immediate) form T1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138047 91177308-0d34-0410-b5e6-96231b3b80d8
60f91a3
Use helper function to check for low registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138048 91177308-0d34-0410-b5e6-96231b3b80d8
2f7232e
Thumb assembly parsing and encoding for LDR(immediate) form T2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138050 91177308-0d34-0410-b5e6-96231b3b80d8
ecd8589
Thumb assembly parsing and encoding for LDR(literal).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138052 91177308-0d34-0410-b5e6-96231b3b80d8
67b95f9
Fixed a memory bug in the MCDisassembler where
MCParsedAsmOperand objects were being leaked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138053 91177308-0d34-0410-b5e6-96231b3b80d8
40827c4
Thumb assembly parsing and encoding for LDR(register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138056 91177308-0d34-0410-b5e6-96231b3b80d8
09f6e0d
Thumb assembly parsing and encoding for LDRB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138059 91177308-0d34-0410-b5e6-96231b3b80d8
48ff5ff
Thumb assembly parsing and encoding for LDRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138060 91177308-0d34-0410-b5e6-96231b3b80d8
3846630
Thumb assembly parsing and encoding for LDRSB and LDRSH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138061 91177308-0d34-0410-b5e6-96231b3b80d8
05b0156
Thumb assembly parsing and encoding for LSL(immediate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138063 91177308-0d34-0410-b5e6-96231b3b80d8
1b7b68f
Thumb assembly parsing and encoding for LSL(register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138064 91177308-0d34-0410-b5e6-96231b3b80d8
560ef9f
Thumb assembly parsing and encoding for LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138065 91177308-0d34-0410-b5e6-96231b3b80d8
c7ebca3
Tab characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138066 91177308-0d34-0410-b5e6-96231b3b80d8
b86e2db
Tidy up. Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138067 91177308-0d34-0410-b5e6-96231b3b80d8
f2764c8
nlewycky This is not actually unreachable, so don't use llvm_unreachable for i…
…t. Since

the intent seems to be to terminate even in Release builds, just use abort()
directly.

If program flow ever reaches a __builtin_unreachable (which llvm_unreachable is
#define'd to on newer GCCs) then the program is undefined.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138068 91177308-0d34-0410-b5e6-96231b3b80d8
d133bf8
Tidy up. Tab character.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138072 91177308-0d34-0410-b5e6-96231b3b80d8
73a1c2c
Allow non zero_reg explicit values for OptionalDefOperands in aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138073 91177308-0d34-0410-b5e6-96231b3b80d8
c68e927
Thumb assembly parsing and encoding for MOV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138076 91177308-0d34-0410-b5e6-96231b3b80d8
4ec6e88
Add FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138077 91177308-0d34-0410-b5e6-96231b3b80d8
584fb0e
Move 2010-03-22-empty-baseclass.cpp from a frontend+opt test to just
an opt test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138082 91177308-0d34-0410-b5e6-96231b3b80d8
ed4b390
Add file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138083 91177308-0d34-0410-b5e6-96231b3b80d8
a510a1c
Remove this test. There are other, duplicates, in the clang test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138084 91177308-0d34-0410-b5e6-96231b3b80d8
cccb183
Remove migrated test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138085 91177308-0d34-0410-b5e6-96231b3b80d8
cf15aa0
Remove migrated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138086 91177308-0d34-0410-b5e6-96231b3b80d8
ea93661
Remove 2009-09-04-modify-crash.cpp as clang doesn't support 32-bit kext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138087 91177308-0d34-0410-b5e6-96231b3b80d8
1679882
nlewycky Eli points out that this is what report_fatal_error() is for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138091 91177308-0d34-0410-b5e6-96231b3b80d8
5aa5d57
Remove tests migrated to clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138100 91177308-0d34-0410-b5e6-96231b3b80d8
bd11cae
Remove this test. The feature and test have already been migrated to …
…clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138101 91177308-0d34-0410-b5e6-96231b3b80d8
d1e36de
Bill Wendling The landingpad instruction isn't dead simply because it's value isn't…
… used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138102 91177308-0d34-0410-b5e6-96231b3b80d8
cbe003b
Add IntervalMap::const_iterator::atBegin().
It returns true when operator--() can be called.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138107 91177308-0d34-0410-b5e6-96231b3b80d8
cafe614
Thumb assembly parsing and encoding for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138108 91177308-0d34-0410-b5e6-96231b3b80d8
88ae2bc
Thumb assembly parsing and encoding for MVN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138109 91177308-0d34-0410-b5e6-96231b3b80d8
c4762a9
Remove tests migrated to clang or are unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138115 91177308-0d34-0410-b5e6-96231b3b80d8
c0f3a1d
Update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138116 91177308-0d34-0410-b5e6-96231b3b80d8
7a32fa1
Remove previously migrated test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138120 91177308-0d34-0410-b5e6-96231b3b80d8
1e057be
Remove tests migrated to clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138121 91177308-0d34-0410-b5e6-96231b3b80d8
87fdee6
bcardosolopes Re-write part of VEX encoding logic, to be more easy to read! Also fix
a bug and add a testcase!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138123 91177308-0d34-0410-b5e6-96231b3b80d8
0c9acfc
Be more lenient on tied operand matching for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138124 91177308-0d34-0410-b5e6-96231b3b80d8
7a01069
Fix NEG alias
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138125 91177308-0d34-0410-b5e6-96231b3b80d8
3a244bd
Benjamin Kramer Roll back the rest of r126557. It's a hack that will break in some ob…
…scure cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138130 91177308-0d34-0410-b5e6-96231b3b80d8
deaa645
Thumb assembly parsing and encoding for NEG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138131 91177308-0d34-0410-b5e6-96231b3b80d8
2c3f70e
Fix bug in function IsShiftedMask. Remove parameter SizeInBits, which…
… is not

needed for Mips32.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138132 91177308-0d34-0410-b5e6-96231b3b80d8
854a7db
Remove obsolete or migrated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138135 91177308-0d34-0410-b5e6-96231b3b80d8
0e71288
Use regex to remove false dependencies on register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138137 91177308-0d34-0410-b5e6-96231b3b80d8
a17f669
Remove migrated test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138140 91177308-0d34-0410-b5e6-96231b3b80d8
5c7ee3f
Remove obsolete test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138141 91177308-0d34-0410-b5e6-96231b3b80d8
cc29861
Thumb parsing and encoding support for NOP.
The irony is not lost that this is not a completely trivial patchset.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138143 91177308-0d34-0410-b5e6-96231b3b80d8
0780b63
Do not use named md nodes to track variables that are completely opti…
…mized. This does not scale while doing LTO with debug info. New approach is to include list of variables in the subprogram info directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138145 91177308-0d34-0410-b5e6-96231b3b80d8
93d39be
Remove migrated or obsolete tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138149 91177308-0d34-0410-b5e6-96231b3b80d8
483699c
Bill Wendling If we're splitting the landing pad block and assigning it only one pr…
…edecessor,

then don't split it a second time, since that block will be dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138153 91177308-0d34-0410-b5e6-96231b3b80d8
94657b9
Aug 20, 2011
Remove migrated or obsolete tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138156 91177308-0d34-0410-b5e6-96231b3b80d8
4cc2328
VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::c…
…opyPhysReg.

Therefore, rather then generate a pseudo instruction, which is later expanded,
generate the necessary instructions in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138163 91177308-0d34-0410-b5e6-96231b3b80d8
e5038e1
Add <imp-def> operands to QQ and QQQQ stack loads.
This pleases the register scavenger and brings
test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll a little closer to
working with -verify-machineinstrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138164 91177308-0d34-0410-b5e6-96231b3b80d8
ac3656e
Remove the rest of the files in FrontendC++ and the directory itself.
All tests have been updated and migrated into clang or were obsolete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138165 91177308-0d34-0410-b5e6-96231b3b80d8
ca020c1
Remove tests that were either migrated to clang or are obsolete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138168 91177308-0d34-0410-b5e6-96231b3b80d8
3b763bd
Remove obsoleted test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138170 91177308-0d34-0410-b5e6-96231b3b80d8
a9fff89
With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack…
… loads."

-verify-machineinstrs can be enabled for this test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138171 91177308-0d34-0410-b5e6-96231b3b80d8
89a67a4
Remove obsolete or migrated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138173 91177308-0d34-0410-b5e6-96231b3b80d8
f909c66
Remove VMOVQQQQ pseudo instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138174 91177308-0d34-0410-b5e6-96231b3b80d8
bdc1857
Remove migrated or obsolete tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138176 91177308-0d34-0410-b5e6-96231b3b80d8
cbb9905
Remove the VMOVQQ pseudo instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138177 91177308-0d34-0410-b5e6-96231b3b80d8
fea95c6
Remove remainder of migrated or obsolete tests from FrontendC and remove
the empty directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138181 91177308-0d34-0410-b5e6-96231b3b80d8
512e0fd
Benjamin Kramer Cast through intptr_t, ISO C++ requires it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138186 91177308-0d34-0410-b5e6-96231b3b80d8
0dac82d
NAKAMURA Takumi utils/lit/lit/TestingConfig.py: Split out environment vars for Win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138191 91177308-0d34-0410-b5e6-96231b3b80d8
7a13cc6
NAKAMURA Takumi utils/lit/lit/TestingConfig.py: Pass TEMP and TMP to tests on Win32 h…
…osts.

Win32 GetTempPath() tends to pick up %WINDIR% when neither TEMP nor TMP was found. %WINDIR% should not be treated writable on recent Windows OS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138192 91177308-0d34-0410-b5e6-96231b3b80d8
4749cc5
NAKAMURA Takumi lib/Support/Windows/Windows.h: Require at least Windows XP(5.1) API. …
…We will not support Windows 2000 any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138198 91177308-0d34-0410-b5e6-96231b3b80d8
aa62966
NAKAMURA Takumi lib/Support/CrashRecoveryContext.cpp: Add Win32 support to CrashRecov…
…eryContext. Thanks to Aaron Ballman!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138199 91177308-0d34-0410-b5e6-96231b3b80d8
77c1082
Add constant folding support for bitcasts of splat vectors to integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138206 91177308-0d34-0410-b5e6-96231b3b80d8
1c9fe03
Tidy up. Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138207 91177308-0d34-0410-b5e6-96231b3b80d8
2f4bdc5
Fix AsmParser binary precedence for shift operators.
rdar://9976729



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138208 91177308-0d34-0410-b5e6-96231b3b80d8
fbe1681
Benjamin Kramer PathV2: Handle more reserved filenames on windows.
Patch by Aaron Ballman!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138213 91177308-0d34-0410-b5e6-96231b3b80d8
2e608c6
Aug 22, 2011
jayfoad Remove DEFINE_TRANSPARENT_CASTED_OPERAND_ACCESSORS, folding its
functionality into DEFINE_TRANSPARENT_OPERAND_ACCESSORS. A side-effect
of this is that the operand accessors for Constants will tolerate NULL
operands, fixing PR10663.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138230 91177308-0d34-0410-b5e6-96231b3b80d8
ff7782b
CunningBaldrick Testcase for PR10663.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138231 91177308-0d34-0410-b5e6-96231b3b80d8
3c0e5dc
Make a few tests slightly more strict.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138241 91177308-0d34-0410-b5e6-96231b3b80d8
986b865
Constant pointers to objects don't need reference counting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138242 91177308-0d34-0410-b5e6-96231b3b80d8
1b31ea8
Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138243 91177308-0d34-0410-b5e6-96231b3b80d8
d446460
Thumb assembly parsing and encoding for ORR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138245 91177308-0d34-0410-b5e6-96231b3b80d8
011af5c
resistor Fix an incorrect shift when decoding SP-relative stores in Thumb1-mod…
…e. Add more tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138246 91177308-0d34-0410-b5e6-96231b3b80d8
b113ec5
Clean up predicates on ARM target instruction aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138249 91177308-0d34-0410-b5e6-96231b3b80d8
a33b31b
resistor Port another swathe of Thumb1 encoding tests over to decoding tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138250 91177308-0d34-0410-b5e6-96231b3b80d8
88b7ccc
resistor Correct writeback handling of duplicating VLD instructions. Discovere…
…d by randomized testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138251 91177308-0d34-0410-b5e6-96231b3b80d8
f1c8e3e
nlewycky Be less redundant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138252 91177308-0d34-0410-b5e6-96231b3b80d8
33e94fa
resistor Fix another batch of VLD/VST decoding crashes discovered by randomize…
…d testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138255 91177308-0d34-0410-b5e6-96231b3b80d8
2cbf210
Bill Wendling Some whitespace fixes and #include reordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138256 91177308-0d34-0410-b5e6-96231b3b80d8
d36b3e3
Tighten up ARM reglist validation a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138258 91177308-0d34-0410-b5e6-96231b3b80d8
11e03e7
Jordy Rose Make DynamicLibrary thread-safe w/r/t call to dlerror() after dlopen(…
…). PR10718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138260 91177308-0d34-0410-b5e6-96231b3b80d8
eeb37f1
resistor Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelmi…
…ng majority of decoder crashes detected by randomized testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138269 91177308-0d34-0410-b5e6-96231b3b80d8
357ec68
bcardosolopes Add 128-bit AVX codegen for PCMP* family of integer instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138270 91177308-0d34-0410-b5e6-96231b3b80d8
bde9f1b
bcardosolopes Add support for breaking 256-bit int VETCC into two 128-bit ones,
avoding scalarization of the compare. Reduces code from 59 to 6
instructions. Fix PR10712.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138271 91177308-0d34-0410-b5e6-96231b3b80d8
2ac8111
resistor Provide operand encoding information for half-precision VCVT instruct…
…ions. Found by randomized testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138273 91177308-0d34-0410-b5e6-96231b3b80d8
838130e
Some minor wording updates and cross-linking for atomic docs. Explici…
…tly note that we don't try to portably define what volatile in LLVM IR means.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138274 91177308-0d34-0410-b5e6-96231b3b80d8
234bccd
Temporarilly mark tMUL as not commutable.
It's not playing nicely in the coalescer with the tied operand. Disable
commutability for now while we figure out the deeper fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138278 91177308-0d34-0410-b5e6-96231b3b80d8
5e87010
Benjamin Kramer X86: Add some operand types required to identify calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138285 91177308-0d34-0410-b5e6-96231b3b80d8
3c1fece
Thumb assembly parsing and encoding for POP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138286 91177308-0d34-0410-b5e6-96231b3b80d8
d937d95
Thumb assemmbly parsing diagnostic improvements for LDM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138287 91177308-0d34-0410-b5e6-96231b3b80d8
7260c6a
Fix think-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138288 91177308-0d34-0410-b5e6-96231b3b80d8
10fd9ad
Follow up to Jim's r138278. This fixes commuteInstruction so it handl…
…es two-address instructions correctly. I'll let Jim add a test case. :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138289 91177308-0d34-0410-b5e6-96231b3b80d8
cb08f18
Thumb parsing and encoding for PUSH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138290 91177308-0d34-0410-b5e6-96231b3b80d8
0c2165b
Add NativeClient support to Triple::ParseOS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138291 91177308-0d34-0410-b5e6-96231b3b80d8
d883453
resistor Provide a correct decoder hook for Thumb2 shifted registers. Found by…
… randomized testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138292 91177308-0d34-0410-b5e6-96231b3b80d8
2c9f835
Tidy up. Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138293 91177308-0d34-0410-b5e6-96231b3b80d8
762f70b
resistor Match operand names to provide correct decoding for Thumb2 SMULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138294 91177308-0d34-0410-b5e6-96231b3b80d8
796c365
Improve error checking for tPUSH and tPOP register lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138295 91177308-0d34-0410-b5e6-96231b3b80d8
6dcafc0
NAKAMURA Takumi docs/ReleaseNotes.html: Mention that Windows 2000 will not be support…
…ed any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138297 91177308-0d34-0410-b5e6-96231b3b80d8
2026de2
resistor Match operand naming to allow correct decoding of t2LDRSH_POST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138298 91177308-0d34-0410-b5e6-96231b3b80d8
2379fc2
Revert r138278 now that r138289 has fixed the root issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138299 91177308-0d34-0410-b5e6-96231b3b80d8
86b5d2b
resistor Correct operand naming of t2USAT16 to allow proper decoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138300 91177308-0d34-0410-b5e6-96231b3b80d8
22d3508
resistor t2SMLAD is a four-register instruction, not a three-register one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138301 91177308-0d34-0410-b5e6-96231b3b80d8
c6788c8
Bill Wendling Split the landing pad's edge. Then for all uses of a landingpad instr…
…uction's

value, we insert a load of the exception object and selector object from memory,
which is where it actually resides. If it's used by a PHI node, we follow that
to where it is being used. Eventually, all landingpad instructions should have
no uses. Any PHI nodes that were associated with those landingpads should be
removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138302 91177308-0d34-0410-b5e6-96231b3b80d8
aef508d
Thumb parsing and encoding for REV/REV16/REVSH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138303 91177308-0d34-0410-b5e6-96231b3b80d8
ab585e6
Thumb parsing and encoding for ROR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138304 91177308-0d34-0410-b5e6-96231b3b80d8
3f57a9a
Benjamin Kramer Add an MCInstrAnalysis version of isCall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138305 91177308-0d34-0410-b5e6-96231b3b80d8
6667e54
resistor Reject invalid imod values in t2CPS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138306 91177308-0d34-0410-b5e6-96231b3b80d8
8e1e60b
Thumb parsing and encoding for RSB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138308 91177308-0d34-0410-b5e6-96231b3b80d8
934755a
Thumb parsing and encoding for SBC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138311 91177308-0d34-0410-b5e6-96231b3b80d8
04d55f1
Thumb parsing and encoding for SETEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138312 91177308-0d34-0410-b5e6-96231b3b80d8
7e99b5c
Aug 23, 2011
bcardosolopes Introduce a pass to insert vzeroupper instructions to avoid AVX to
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
3bde6fe
NAKAMURA Takumi lib/Support/Windows/Windows.h: Update required IE ver. 0x0600 should …
…be enough for Windows XP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138319 91177308-0d34-0410-b5e6-96231b3b80d8
07097dd
Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128…
…-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138321 91177308-0d34-0410-b5e6-96231b3b80d8
a534780
Update config.sub, config.guess and configure.
The motivation to do that:

1. Now, llvm would use the stock config.sub. Before that we had an
uncommitted FreeBSD-related patch. Now, it has been upstreamed and
comes back. It means that it would be easier to update these files in
the next time (less magic knowledge)

2. Fix a typo for pseudo-CPUs: 32e[lb] -> [lb]e32, 64e[lb]->[lb]64.
One of these CPUs is used for PNaCl and it was not really convenient
to have a CPU that starts with a digit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138323 91177308-0d34-0410-b5e6-96231b3b80d8
9976bac
Fix fpimmm->fpimm typo.
Patch by Micah Villmow!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138330 91177308-0d34-0410-b5e6-96231b3b80d8
691a488
This patch adds support of le32 pseudo-cpu that stands for generic
32-bit little-endian CPU. Used by PNaCl and Emscripten.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138335 91177308-0d34-0410-b5e6-96231b3b80d8
38fb2db
resistor Port more assemble tests over to disassembly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138336 91177308-0d34-0410-b5e6-96231b3b80d8
b4ff969
resistor Fix two more instances of mis-matched operand names breaking disassem…
…bly. Found by randomized testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138337 91177308-0d34-0410-b5e6-96231b3b80d8
e732cb0
Clean up Thumb load/store multiple definitions.
There is no non-writeback store multiple instruction in Thumb1, so
don't define one. As a result load multiple is the only instantiation of
the multiclass, so refactor that away entirely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138338 91177308-0d34-0410-b5e6-96231b3b80d8
cefe4c9
resistor Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the…
… same instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138339 91177308-0d34-0410-b5e6-96231b3b80d8
6153a03
Address Duncan's CR request:
1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138340 91177308-0d34-0410-b5e6-96231b3b80d8
20a05be
resistor Fix decoding of Thumb2 prefetch instructions, which account for all t…
…he remaining Thumb2 decoding failures found by randomized testing so far.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138341 91177308-0d34-0410-b5e6-96231b3b80d8
82265a2
Fix a typo in the test from the previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138342 91177308-0d34-0410-b5e6-96231b3b80d8
46634f5
Factor low reg checking into a helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138344 91177308-0d34-0410-b5e6-96231b3b80d8
aa875f8
Thumb parsing and encoding for STM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138345 91177308-0d34-0410-b5e6-96231b3b80d8
1e84f19
Rafael Ávila de Espíndola Fix an example in the documentation.
Patch by Sanjoy Das!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138346 91177308-0d34-0410-b5e6-96231b3b80d8
3395fe1
Thumb parsing and encoding for STR.
Not including tSTRspi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138347 91177308-0d34-0410-b5e6-96231b3b80d8
4c821d8
Thumb parsing and encoding for tSTRspi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138348 91177308-0d34-0410-b5e6-96231b3b80d8
803b1aa
Thumb parsing and encoding for STRB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138349 91177308-0d34-0410-b5e6-96231b3b80d8
aec3a61
Thread safety: Adding in an option for variadic expr* array of arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138351 91177308-0d34-0410-b5e6-96231b3b80d8
b1aa80b
Thumb parsing and encoding for STRH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138352 91177308-0d34-0410-b5e6-96231b3b80d8
743c0fa
nlewycky PerformSubCombine to work on integers larger than i128. Fixes a crasher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138354 91177308-0d34-0410-b5e6-96231b3b80d8
726ebd6
Fix 80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138356 91177308-0d34-0410-b5e6-96231b3b80d8
1dafa70
Thumb parsing and encoding for SUB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138359 91177308-0d34-0410-b5e6-96231b3b80d8
414b023
Thumb parsing and encoding for SVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138360 91177308-0d34-0410-b5e6-96231b3b80d8
ec8b866
Thumb parsing and encoding for SXTB and SXTH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138361 91177308-0d34-0410-b5e6-96231b3b80d8
4b6658d
Thumb parsing and encoding for TST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138362 91177308-0d34-0410-b5e6-96231b3b80d8
010bebc
Thumb parsing and encoding for UXTB and UXTH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138363 91177308-0d34-0410-b5e6-96231b3b80d8
3284db5
Thumb parsing and encoding for WFE, WFI and YIELD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138364 91177308-0d34-0410-b5e6-96231b3b80d8
99e84e0
Revert "Address Duncan's CR request:"
This reverts commit 20a05be. (svn rev 138340)

Conflicts:

	test/Transforms/InstCombine/bitcast.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138366 91177308-0d34-0410-b5e6-96231b3b80d8
acc8f2d
Some refactoring so TargetRegistry.h no longer has to include any files
from MC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138367 91177308-0d34-0410-b5e6-96231b3b80d8
7801136
sampo3k Add some useful accessors to c++ api that appear to be missing from t…
…he c api

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138371 91177308-0d34-0410-b5e6-96231b3b80d8
7ced776
[SU]XT[BH] are only available on ARMv6 and up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138373 91177308-0d34-0410-b5e6-96231b3b80d8
d04f6a5
Move ARM frame-unwinding EHABI handling a touch earlier.
It should go before AsmPrinter MC pseudo expansion since it's based on
MachineInstr, not MCInst. Otherwise any frame related pseudo instructions
may be missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138386 91177308-0d34-0410-b5e6-96231b3b80d8
5aa29a0
Bill Wendling A landingpad instruction is neither folded nor dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138387 91177308-0d34-0410-b5e6-96231b3b80d8
4477d69
bcardosolopes Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit
permutations. Also tidy up some patterns and make them close to their
instruction definition!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138392 91177308-0d34-0410-b5e6-96231b3b80d8
d8b7dd5
Bill Wendling Look at the end of the entry block for an invoke.
The invoke could be at the end of the entry block. If it's the only one, then we
won't process all of the landingpad instructions correctly. This code is
currently ugly, but should be made much nicer once the new EH switch is thrown.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138397 91177308-0d34-0410-b5e6-96231b3b80d8
cfcccef
Bill Wendling Don't replace *all* uses with the new stuff.
This is not necessarily the first or dominating use of the EH values. The IR
breaks if it's not. So replace the specific value in the instruction with the
new value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138406 91177308-0d34-0410-b5e6-96231b3b80d8
fc8713f
Aug 24, 2011
Bill Wendling Add the sentinal "no handle" value to the ResumeInst.
A value of -1 at a call site tells the personality function that this call isn't
handled by the current function. Since the ResumeInsts are converted to calls to
_Unwind_SjLj_Resume, add a (volatile) store of -1 to its 'call site'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138416 91177308-0d34-0410-b5e6-96231b3b80d8
3ae96d6
Break 256-bit vector int add/sub/mul into two 128-bit operations to a…
…void costly scalarization. Fixes PR10711.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138427 91177308-0d34-0410-b5e6-96231b3b80d8
13894fa
Richard Osborne Add Uses=[SP] to call instructions. This fixes a miscompilation with a
variable sized alloca.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138433 91177308-0d34-0410-b5e6-96231b3b80d8
8f9c5cc
Tidy up. Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138437 91177308-0d34-0410-b5e6-96231b3b80d8
ee61d67
resistor Port over more encoding tests to decoding tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138441 91177308-0d34-0410-b5e6-96231b3b80d8
ddaa513
resistor Be stricter in enforcing IT instruction predicate values, so that we …
…don't end up trying to print out an illegal predicate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138443 91177308-0d34-0410-b5e6-96231b3b80d8
e234d02
Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.
Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138445 91177308-0d34-0410-b5e6-96231b3b80d8
5b81584
Thumb add SP assembly syntax fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138448 91177308-0d34-0410-b5e6-96231b3b80d8
c7e0bb2
Rafael Ávila de Espíndola Fix a crashing bug in SplitBlock when it is called on a block with no
dominator information even though dominators were previously computed.

Patch by Nick Sumner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138449 91177308-0d34-0410-b5e6-96231b3b80d8
605e2b5
Move TargetRegistry and TargetSelect from Target to Support where the…
…y belong.

These are strictly utilities for registering targets and components.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
3e74d6f
Add missing explicit writeback operand to tSTMIA_UPD.
rdar://10014745

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138457 91177308-0d34-0410-b5e6-96231b3b80d8
f95aaf9
bcardosolopes Mark VZEROALL as clobbering all YMM registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138461 91177308-0d34-0410-b5e6-96231b3b80d8
356e988
When printing Thumb1 NOP ('mov r8, r8'), make sure to print the predi…
…cate.

rdar://10015134

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138467 91177308-0d34-0410-b5e6-96231b3b80d8
df9ce6b
Implement Constant::isAllOnesValue(). Fix ConstantFolding to use the …
…new api.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138469 91177308-0d34-0410-b5e6-96231b3b80d8
4c7c0f2
Some minor updates to atomic acquire/release docs in LangRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138472 91177308-0d34-0410-b5e6-96231b3b80d8
c264b2f
Bill Wendling Use getFirstInsertionPt instead of getFirstNonPHI so that it skips to…
… the proper

insertion place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138473 91177308-0d34-0410-b5e6-96231b3b80d8
b05fdd6
Basic x86 code generation for atomic load and store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138478 91177308-0d34-0410-b5e6-96231b3b80d8
327236c
Bill Wendling Skip the landingpad instruction when determining the insertion point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138481 91177308-0d34-0410-b5e6-96231b3b80d8
a4c86ab
Basic tests for atomic load and store on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138486 91177308-0d34-0410-b5e6-96231b3b80d8
bbc87a3
Fix whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138487 91177308-0d34-0410-b5e6-96231b3b80d8
4317fe1
Thumb parsing and encoding support for ADD SP instructions.
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
72f39f8
resistor Be careful not to walk off the end of the operand info list while upd…
…ating VFP predicates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138492 91177308-0d34-0410-b5e6-96231b3b80d8
12a1e3b
Thumb parsing and encoding for SUB (SP minu immediate).
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138494 91177308-0d34-0410-b5e6-96231b3b80d8
f69c804
Thumb .n mnemonic qualifiers can be ignored for now.
We'll need to pay attention to them when we start getting more serious about
the details of parsing thumb2 assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138500 91177308-0d34-0410-b5e6-96231b3b80d8
4d23e99
ARM asm backend initialize isThumbMode based on target triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138501 91177308-0d34-0410-b5e6-96231b3b80d8
b9d3ff8
Update tests for 138501.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138502 91177308-0d34-0410-b5e6-96231b3b80d8
070260c
Some autoconf tests use module level inline asm to test compiler's ha…
…ndling of

.cfi_startproc. e.g. libffi:

 $ cat confopt.c 
asm (".cfi_startproc\n\t.cfi_endproc");

int main () { return 0; }

Teach MC / dwarf emission to handle these cfi directives which essentially
create an empty frame.

rdar://10017184


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138504 91177308-0d34-0410-b5e6-96231b3b80d8
5fbe5e7
Hook up 64-bit atomic load/store on x86-32. I plan to write more effi…
…cient implementations eventually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138505 91177308-0d34-0410-b5e6-96231b3b80d8
f8f90f0
resistor Perform more thorough checking of t2IT mask parameters, which fixes a…
…ll remaining crashers when disassembling the entire 16-bit instruction space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138507 91177308-0d34-0410-b5e6-96231b3b80d8
f440820
bcardosolopes Move all SHUFP* patterns close to the SHUFP* definitions. Also be
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Make the mask check more strict, to be
clear it won't be used to match to 256-bit versions!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138514 91177308-0d34-0410-b5e6-96231b3b80d8
af002d8
bcardosolopes Move all PSHUF* patterns close to the PSHUF* definitions. Also be
explicit about which subtarget they refer to, and add AVX versions of
the ones we currently don't. Remove old and now wrong comments!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138515 91177308-0d34-0410-b5e6-96231b3b80d8
954d5ea
bcardosolopes Move MOVHLPS patterns close to MOVHLPS definition, and duplicate the
pattern for 128-bit AVX mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138516 91177308-0d34-0410-b5e6-96231b3b80d8
6140294
bcardosolopes Organize and tidy up MOVDDUP section. Also update comments!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138517 91177308-0d34-0410-b5e6-96231b3b80d8
4724f25
bcardosolopes Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicate
the missing ones for AVX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138518 91177308-0d34-0410-b5e6-96231b3b80d8
4cf4778
bcardosolopes Organize UNPCK* patterns, also add remaining for AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138519 91177308-0d34-0410-b5e6-96231b3b80d8
de79231
bcardosolopes Move code around!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138520 91177308-0d34-0410-b5e6-96231b3b80d8
9993499
bcardosolopes Create a section for non-instructions patterns in the beginning of the
file, and move more code around!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138521 91177308-0d34-0410-b5e6-96231b3b80d8
27831e5
Aug 25, 2011
Remove a out-of-place comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138534 91177308-0d34-0410-b5e6-96231b3b80d8
0f66026
Add a command line option to disable global merge pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138536 91177308-0d34-0410-b5e6-96231b3b80d8
b8cfe4f
Bill Wendling When inserting new instructions, use getFirstInsertionPt instead of
getFirstNonPHI so that it will skip over the landingpad instructions as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138537 91177308-0d34-0410-b5e6-96231b3b80d8
89d4411
Bill Wendling Add feature test for the new exception handling stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138539 91177308-0d34-0410-b5e6-96231b3b80d8
c5fb9d8
Hide -global-merge option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138540 91177308-0d34-0410-b5e6-96231b3b80d8
77eaaf0
Bill Wendling Update tests to the newest EH syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138541 91177308-0d34-0410-b5e6-96231b3b80d8
76cf779
Remove empty directories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138542 91177308-0d34-0410-b5e6-96231b3b80d8
4ba1086
bcardosolopes Add memory version of SHUFPD to mask decoding!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138545 91177308-0d34-0410-b5e6-96231b3b80d8
e7461c0
bcardosolopes Add support for 256-bit versions of VSHUFPD and VSHUFPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138546 91177308-0d34-0410-b5e6-96231b3b80d8
07b7f67
Benjamin Kramer Initialize member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138548 91177308-0d34-0410-b5e6-96231b3b80d8
2df9f8d
Bill Wendling LSR wants to split the landing pad's critical edge. Let it do it, but…
… use the

proper function to do it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138550 91177308-0d34-0410-b5e6-96231b3b80d8
8b6af8a
Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them t…
…o be disassembled. Fixes PR10723.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138551 91177308-0d34-0410-b5e6-96231b3b80d8
ea03659
Give ATTR_VEX higher priority when generating the disassembler contex…
…t table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138552 91177308-0d34-0410-b5e6-96231b3b80d8
113061d
Add more missing TB encodings to VEX instructions to allow them to be…
… disassembled. Fixes remainder of PR10678.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138553 91177308-0d34-0410-b5e6-96231b3b80d8
ebc1db0
Explicitly disallow predication in Thumb1 assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138562 91177308-0d34-0410-b5e6-96231b3b80d8
0c49ac0
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138566 91177308-0d34-0410-b5e6-96231b3b80d8
51972da
ARM fix for missing implicit operands on ldmia_ret.
rdar://10005094: miscompile of 176.gcc


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138568 91177308-0d34-0410-b5e6-96231b3b80d8
b9ca512
Benjamin Kramer Intel family 6 model 44 is Gulftown/Westmere-EP and doesn't have AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138573 91177308-0d34-0410-b5e6-96231b3b80d8
cf847bf
resistor Port over additional encoding tests to decoding tests, and fix an ope…
…rand ordering bug this exposed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138575 91177308-0d34-0410-b5e6-96231b3b80d8
9990683
greened Constify Comparison
Make ConstantInt::uge() const so it may be used in const contexts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138579 91177308-0d34-0410-b5e6-96231b3b80d8
32c371f
jpbonn Merge branch 'master' of http://llvm.org/git/llvm 6123354
jpbonn Updated for latest HEAD - just header file locations. f352ecf
jpbonn Added TransientStackAlignment and formatting changes. 658bd5b
jpbonn Fixed FP to point to top of frame instead of middle, formatting changes. ade6dba
Aug 28, 2011
jpbonn Fix SP and RA to be non-callee saves. 2cbae60
Aug 29, 2011
jpbonn Added isOffsetFoldingLegal() and isFPImmLegal(). ceb60a2
Aug 30, 2011
jpbonn Fixed Datalayout. 1e0f868
Aug 31, 2011
jpbonn Made FP and RA reserved. Ideally they should not be. 8fa7cfb
Sep 01, 2011
jpbonn Fixed branch conditions. 07535cf