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base fork: m-labs/llvm-lm32
base: a62da77
...
head fork: m-labs/llvm-lm32
compare: ea7d9dc
Checking mergeability… Don't worry, you can still create the pull request.
Commits on Jun 17, 2011
Jakub Staszak getSuccWeight returns now default 0 if Weights vector is empty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133271 91177308-0d34-0410-b5e6-96231b3b80d8
981d826
@d0k d0k Remove a useless copy of MCELFStreamer. Patch by Logan Chien!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133272 91177308-0d34-0410-b5e6-96231b3b80d8
738f05a
Chris Lattner remove support for a bunch of obsolete instruction encodings
and other backward compatibility hacks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133273 91177308-0d34-0410-b5e6-96231b3b80d8
96a74c5
Chris Lattner Drop the "2" suffix on some enums.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133274 91177308-0d34-0410-b5e6-96231b3b80d8
4f6bab9
@gkistanova gkistanova est 2008-06-04-indirectmem.ll is X86-specific. Move to X86 folder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133275 91177308-0d34-0410-b5e6-96231b3b80d8
ed6fa18
Stuart Hastings Relocate NUW test to cover all binary ops in a dynamic alloca expr.
Followup to 132926.  rdar://problem/9265821


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133285 91177308-0d34-0410-b5e6-96231b3b80d8
3761c34
@isanbard isanbard Add an option that allows one to "decode" the LSDA.
The LSDA is a bit difficult for the non-initiated to read. Even with comments,
it's not always clear what's going on. This wraps the ASM streamer in a class
that retains the LSDA and then emits a human-readable description of what's
going on in it.

So instead of having to make sense of:

Lexception1:
        .byte   255
        .byte   155
        .byte   168
        .space  1
        .byte   3
        .byte   26
Lset0 = Ltmp7-Leh_func_begin1
      .long     Lset0
Lset1 = Ltmp812-Ltmp7
      .long     Lset1
Lset2 = Ltmp913-Leh_func_begin1
      .long     Lset2
      .byte     3
Lset3 = Ltmp812-Leh_func_begin1
      .long     Lset3
Lset4 = Leh_func_end1-Ltmp812
      .long     Lset4
      .long     0
      .byte     0
      .byte     1
      .byte     0
      .byte     2
      .byte     125
      .long     __ZTIi@GOTPCREL+4
      .long     __ZTIPKc@GOTPCREL+4

you can read this instead:

## Exception Handling Table: Lexception1
##  @LPStart Encoding: omit
##    @TType Encoding: indirect pcrel sdata4
##        @TType Base: 40 bytes
## @CallSite Encoding: udata4
## @Action Table Size: 26 bytes

## Action 1:
##   A throw between Ltmp7 and Ltmp812 jumps to Ltmp913 on an exception.
##     For type(s):  __ZTIi@GOTPCREL+4 __ZTIPKc@GOTPCREL+4
## Action 2:
##   A throw between Ltmp812 and Leh_func_end1 does not have a landing pad.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133286 91177308-0d34-0410-b5e6-96231b3b80d8
916a94b
Eric Christopher Lower multiply with overflow checking to __mulo<mode>
calls if we haven't been able to lower them any
other way.

Fixes rdar://9090077 and rdar://9210061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133288 91177308-0d34-0410-b5e6-96231b3b80d8
362fee9
Evan Cheng Add an alternative rev16 pattern. We should figure out a better way t…
…o handle these complex rev patterns. rdar://9609108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133289 91177308-0d34-0410-b5e6-96231b3b80d8
6d6c55b
@nadavrot nadavrot Fix a bug in the type-lowering of integer-promoted elements. Add a ch…
…eck that

the newly created simple type is valid before checking its legality.
Re-commit the test file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133291 91177308-0d34-0410-b5e6-96231b3b80d8
da26ad5
@isanbard isanbard Use the verbose asm flag instead of a new flag for decoding the LSDA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133292 91177308-0d34-0410-b5e6-96231b3b80d8
e266ce6
@isanbard isanbard Disable to investigate ARM failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133293 91177308-0d34-0410-b5e6-96231b3b80d8
2fb86a8
@isanbard isanbard SjLj exception handling LSDA decoding support wasn't represented corr…
…ectly. Use

the correct values, etc. In particular, the exception handling type is SjLj, not
ARM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133296 91177308-0d34-0410-b5e6-96231b3b80d8
5ba8983
@isanbard isanbard Support only DwarfCFI or SjLj exception handling in LSDA decoder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133297 91177308-0d34-0410-b5e6-96231b3b80d8
30507ef
Devang Patel Set debug loc for new preheader's terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133298 91177308-0d34-0410-b5e6-96231b3b80d8
c013699
@isanbard isanbard Disable for another investigation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133299 91177308-0d34-0410-b5e6-96231b3b80d8
50cb969
Chad Rosier Revert r133285. Causing odd failures on Dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133301 91177308-0d34-0410-b5e6-96231b3b80d8
66638b2
Matt Beaumont-Gay Fix -Asserts build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133305 91177308-0d34-0410-b5e6-96231b3b80d8
d3e724a
Eric Christopher Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133307 91177308-0d34-0410-b5e6-96231b3b80d8
5e687ac
Jakob Stoklund Olesen SI, DI, BP, and SP don't have 8-bit sub-registers in x86 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133308 91177308-0d34-0410-b5e6-96231b3b80d8
aad458d
Jakob Stoklund Olesen Zap the last reference to allocation_order_begin().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133310 91177308-0d34-0410-b5e6-96231b3b80d8
8936b94
Jakob Stoklund Olesen Only call TRI::getRawAllocationOrder to resolve a target-dependent hint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133313 91177308-0d34-0410-b5e6-96231b3b80d8
bed9711
@isanbard isanbard Remove false assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133314 91177308-0d34-0410-b5e6-96231b3b80d8
ccfae86
Commits on Jun 18, 2011
Eric Christopher Fix UMULO support for 2x register width to allow the full
range without a libcall to a new mulo<mode> libcall
that we'd have to create.

Finishes the rest of rdar://9090077 and rdar://9210061


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133318 91177308-0d34-0410-b5e6-96231b3b80d8
a307145
@isanbard isanbard * Override the "EmitBytes" function, since it can sneak values in tha…
…t way.

* Make this used only if CFI is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133319 91177308-0d34-0410-b5e6-96231b3b80d8
edb15d6
Jakob Stoklund Olesen Provide AltOrders for specifying alternative allocation orders.
A register class can define AltOrders and AltOrderSelect instead of
defining method protos and bodies. The AltOrders lists can be defined
with set operations, and TableGen can verify that the alternative
allocation orders only contain valid registers.

This is currently an opt-in feature, and it is still possible to
override allocation_order_begin/end. That will not be true for long.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133320 91177308-0d34-0410-b5e6-96231b3b80d8
b4c7048
Jakob Stoklund Olesen Reserve D16-D13 on subtargets that don't support them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133321 91177308-0d34-0410-b5e6-96231b3b80d8
3b6434e
@gkistanova gkistanova Moved to the right place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133324 91177308-0d34-0410-b5e6-96231b3b80d8
a566ec9
Jakob Stoklund Olesen Switch x86 to using AltOrders instead of MethodBodies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133325 91177308-0d34-0410-b5e6-96231b3b80d8
e8c38ca
Jakob Stoklund Olesen Switch ARM to using AltOrders instead of MethodBodies.
This slightly changes the GPR allocation order on Darwin where R9 is not
a callee-saved register:

Before: %R0 %R1 %R2 %R3 %R12 %R9 %LR %R4 %R5 %R6 %R8 %R10 %R11
After:  %R0 %R1 %R2 %R3 %R9 %R12 %LR %R4 %R5 %R6 %R8 %R10 %R11

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133326 91177308-0d34-0410-b5e6-96231b3b80d8
0a074ed
Jakob Stoklund Olesen Delete unneeded allocation order override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133331 91177308-0d34-0410-b5e6-96231b3b80d8
4b2a174
Jakob Stoklund Olesen Remove MethodProtos/MethodBodies and allocation_order_begin/end.
Targets that need to change the default allocation order should use the
AltOrders mechanism instead. See the X86 and ARM targets for examples.

The allocation_order_begin() and allocation_order_end() methods have been
replaced with getRawAllocationOrder(), and there is further support
functions in RegisterClassInfo.

It is no longer possible to insert arbitrary code into generated
register classes. This is a feature.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133332 91177308-0d34-0410-b5e6-96231b3b80d8
54c47c1
Jakob Stoklund Olesen Store CodeGenRegisters as pointers so they won't be reallocated.
Reuse the CodeGenRegBank DenseMap in a few places that would build their
own or use linear search.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133333 91177308-0d34-0410-b5e6-96231b3b80d8
abdbc84
Jakob Stoklund Olesen Use the correct comparator to avoid depending on pointer values.
This should fix the Linux buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133334 91177308-0d34-0410-b5e6-96231b3b80d8
c6596e2
Cameron Zwarich Remove a pointless assignment. Nothing checks the value of VectorTy a…
…nymore now

unless ScalarKind is Vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133335 91177308-0d34-0410-b5e6-96231b3b80d8
aab3ea2
Cameron Zwarich Fix an invalid bitcast crash that occurs when doing a partial memset …
…of a vector

alloca. Fixes part of <rdar://problem/9580800>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133336 91177308-0d34-0410-b5e6-96231b3b80d8
6be41eb
Chris Lattner rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, …
…which is

for pre-2.9 bitcode files.  We keep x86 unaligned loads, movnt, crc32, and the
target indep prefetch change.

As usual, updating the testsuite is a PITA.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133337 91177308-0d34-0410-b5e6-96231b3b80d8
b85e4eb
Cameron Zwarich When scalar replacement returns a vector type, only accept it if the …
…vector

type's bitwidth matches the (allocated) size of the alloca. This severely
pessimizes vector scalar replacement when the only vector type being used is
something like <3 x float> on x86 or ARM whose allocated size matches a
<4 x float>.

I hope to fix some of the flawed assumptions about allocated size throughout
scalar replacement and reenable this in most cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133338 91177308-0d34-0410-b5e6-96231b3b80d8
3ebb05d
@nlewycky nlewycky Add test for r133251.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133339 91177308-0d34-0410-b5e6-96231b3b80d8
5a72d9f
@zmodem zmodem Fix PR10103: Less code for enum type translation.
In cases such as the attached test, where the case value for a switch
destination is used in a phi node that follows the destination, it
might be better to replace that value with the condition value of the
switch, so that more blocks can be folded away with
TryToSimplifyUncondBranchFromEmptyBlock because there are less
conflicts in the phi node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133344 91177308-0d34-0410-b5e6-96231b3b80d8
448da51
@d0k d0k Remove unused but set variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133347 91177308-0d34-0410-b5e6-96231b3b80d8
1396c40
@d0k d0k Don't allocate empty read-only SmallVectors during SelectionDAG deall…
…ocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133348 91177308-0d34-0410-b5e6-96231b3b80d8
22a54c1
@zmodem zmodem MC: Allow .common as alias for .comm assembler directive. PR10116.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133349 91177308-0d34-0410-b5e6-96231b3b80d8
5cc6491
@d0k d0k Simplify code. No change in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133350 91177308-0d34-0410-b5e6-96231b3b80d8
4e39f8f
@d0k d0k Simplify code. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133351 91177308-0d34-0410-b5e6-96231b3b80d8
1a81d48
@d0k d0k Directly print to a raw_ostream instead of printing to a buffer first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133352 91177308-0d34-0410-b5e6-96231b3b80d8
dcf0e0c
Chris Lattner rework the remaining autoupgrade logic to use a StringRef instead of …
…creating a

temporary std::string for every function being checked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133355 91177308-0d34-0410-b5e6-96231b3b80d8
747fddd
Chris Lattner remove an unreduced testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133356 91177308-0d34-0410-b5e6-96231b3b80d8
7ff99a6
Chris Lattner improve some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133359 91177308-0d34-0410-b5e6-96231b3b80d8
70d0ff1
Chris Lattner eliminate the Type::getDescription() method, using "<<" instead. This
removes some gunk from LLVMContext.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133360 91177308-0d34-0410-b5e6-96231b3b80d8
0cd0d88
Chris Lattner now that Type::getDescription() is dead, the TypePrinting class can m…
…ove from Assembly/Writer.h to being

a private class in AsmWriter.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133361 91177308-0d34-0410-b5e6-96231b3b80d8
fb78b33
Chris Lattner simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133362 91177308-0d34-0410-b5e6-96231b3b80d8
ebb2189
Chris Lattner eliminate some pointless virtual methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133363 91177308-0d34-0410-b5e6-96231b3b80d8
ea04918
Chris Lattner fix the varargs version of StructType::get to not require an LLVMCont…
…ext, making usage

much cleaner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133364 91177308-0d34-0410-b5e6-96231b3b80d8
b231866
Chris Lattner Remove support for parsing the "type i32" syntax for defining a numbered
top level type without a specified number.  This asmprinter has never
generated this, as you can tell by no tests being updated.  It also isn't
documented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133368 91177308-0d34-0410-b5e6-96231b3b80d8
8dd72b8
Chris Lattner revert r133368, apparently I missed the tests to be updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133369 91177308-0d34-0410-b5e6-96231b3b80d8
edcaca8
Commits on Jun 19, 2011
Chris Lattner Remove support for parsing the "type i32" syntax for defining a numbered
top level type without a specified number.  This syntax isn't documented
and blocks forward progress.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133371 91177308-0d34-0410-b5e6-96231b3b80d8
a53616d
@nlewycky nlewycky Add the remaining instructions/constant expressions as Operators so t…
…hat code

can manipulate instructions and constantexpr's uniformly. No users yet though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133373 91177308-0d34-0410-b5e6-96231b3b80d8
c49c0ff
@nlewycky nlewycky Revert r133373. I was going to use this to teach the Verifier to veri…
…fy constant

expressions, but Chris wants to instead reduce the set of possible constant
expression types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133374 91177308-0d34-0410-b5e6-96231b3b80d8
6cc6bc8
@nadavrot nadavrot Reduce the runtime of the test. Keep only the interesting cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133381 91177308-0d34-0410-b5e6-96231b3b80d8
c17d355
@nadavrot nadavrot When promoting the vector elements in CopyToParts, use vector trunc
instead of scalarizing, and doing an element-by-element truncat.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133382 91177308-0d34-0410-b5e6-96231b3b80d8
c6341e6
@nadavrot nadavrot Calls to AssertZext and getZeroExtendInReg must be made using scalar …
…types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133388 91177308-0d34-0410-b5e6-96231b3b80d8
0928c9e
@nadavrot nadavrot Code cleanups: Remove duplicated logic in PromotInteRes_BITCAST, rese…
…rve vector space, reuse types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133389 91177308-0d34-0410-b5e6-96231b3b80d8
5b82c2f
@d0k d0k Update test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133390 91177308-0d34-0410-b5e6-96231b3b80d8
9cfcc6c
@jayfoad jayfoad Fix a FIXME by making GlobalVariable::getInitializer() return a
const Constant *.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133400 91177308-0d34-0410-b5e6-96231b3b80d8
7d715df
Commits on Jun 20, 2011
Jakob Stoklund Olesen Add a RegisterTuples class to Target.td and TableGen.
A RegisterTuples instance is used to synthesize super-registers by
zipping together lists of sub-registers. This is useful for generating
pseudo-registers representing register sequence constraints like 'two
consecutive GPRs', or 'an even-odd pair of floating point registers'.

The RegisterTuples def can be used in register set operations when
building register classes. That is the only way of accessing the
synthesized super-registers.

For example, the ARM QQ register class of pseudo-registers could have
been formed like this:

  // Form pairs Q0_Q1, Q2_Q3, ...
  def QQPairs : RegisterTuples<[qsub_0, qsub_1],
                               [(decimate QPR, 2),
                                (decimate (shl QPR, 1), 2)]>;

  def QQ : RegisterClass<..., (add QQPairs)>;

Similarly, pseudo-registers representing '3 consecutive D-regs with
wraparound' look like:

  // Form D0_D1_D2, D1_D2_D3, ..., D30_D31_D0, D31_D0_D1.
  def DSeqTriples : RegisterTuples<[dsub_0, dsub_1, dsub_2],
                                   [(rotl DPR, 0),
                                    (rotl DPR, 1),
                                    (rotl DPR, 2)]>;

TableGen automatically computes aliasing information for the synthesized
registers.

Register tuples are still somewhat experimental. We still need to see
how they interact with MC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133407 91177308-0d34-0410-b5e6-96231b3b80d8
4ce25d5
Chris Lattner introduce an isLayoutIdentical() method, which is currently just a po…
…inter

equality check.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133409 91177308-0d34-0410-b5e6-96231b3b80d8
5d6fa7f
Chris Lattner Revamp the "ConstantStruct::get" methods. Previously, these were scat…
…tered

all over the place in different styles and variants.  Standardize on two
preferred entrypoints: one that takes a StructType and ArrayRef, and one that
takes StructType and varargs.

In cases where there isn't a struct type convenient, we now add a
ConstantStruct::getAnon method (whose name will make more sense after a few
more patches land).  

It would be "really really nice" if the ConstantStruct::get and 
ConstantVector::get methods didn't make temporary std::vectors.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133412 91177308-0d34-0410-b5e6-96231b3b80d8
b065b06
@espindola espindola Teach early dup how to duplicate basic blocks with one successor and …
…only phi instructions

into more complex blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133415 91177308-0d34-0410-b5e6-96231b3b80d8
275c1f9
@fpichet fpichet Fix MSVC build. next() function already exists in the MSVC headers. T…
…his create a overload conflict. Make sure we pick up the llvm one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133416 91177308-0d34-0410-b5e6-96231b3b80d8
289a279
@nadavrot nadavrot Fix PromoteIntRes_TRUNCATE: Add support for cases where the
source vector type is to be split while the target vector is to be promoted.
(eg: <4 x i64> -> <4 x i8> )


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133424 91177308-0d34-0410-b5e6-96231b3b80d8
4720611
@CunningBaldrick CunningBaldrick Disable the logic added by rafael in commit 133415 to see if it bring…
…s the

dragonegg buildbots back to life.  Original commit message:
Teach early dup how to duplicate basic blocks with one successor and only phi instructions
into more complex blocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133430 91177308-0d34-0410-b5e6-96231b3b80d8
2ee2d93
@espindola espindola Re enable 133415 with two fixes
* Don't introduce a duplicated bb in the CFG
* When making a branch unconditional, clear the PredCond array so that it
  is really unconditional.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133432 91177308-0d34-0410-b5e6-96231b3b80d8
689c247
@jayfoad jayfoad Remove the AugmentedUse struct.
I don't think the AugmentedUse struct buys us much, either in
correctness or in ease of use. Ditch it, and simplify Use::getUser() and
User::allocHungoffUses().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133433 91177308-0d34-0410-b5e6-96231b3b80d8
691c05b
@jayfoad jayfoad Make better use of the PHINode API.
Change various bits of code to make better use of the existing PHINode
API, to insulate them from forthcoming changes in how PHINodes store
their operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133434 91177308-0d34-0410-b5e6-96231b3b80d8
c137120
@jayfoad jayfoad Change how PHINodes store their operands.
Change PHINodes to store simple pointers to their incoming basic blocks,
instead of full-blown Uses.

Note that this loses an optimization in SplitCriticalEdge(), because we
can no longer walk the use list of a BasicBlock to find phi nodes. See
the comment I removed starting "However, the foreach loop is slow for
blocks with lots of predecessors".

Extend replaceAllUsesWith() on a BasicBlock to also update any phi
nodes in the block's successors. This mimics what would have happened
when PHINodes were proper Users of their incoming blocks. (Note that
this only works if OldBB->replaceAllUsesWith(NewBB) is called when
OldBB still has a terminator instruction, so it still has some
successors.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133435 91177308-0d34-0410-b5e6-96231b3b80d8
72f5f31
@jayfoad jayfoad This is an automatically reduced test case that crashed in GVN, at some
point during the development of the phi operand changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133436 91177308-0d34-0410-b5e6-96231b3b80d8
5e27a1d
@rdivacky rdivacky Don't apply on PPC64 the 32bit ADDIC optimizations as there's no over…
…flow

with 32bit values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133439 91177308-0d34-0410-b5e6-96231b3b80d8
8e9d672
@jholewinski jholewinski PTX: Add basic register spilling code
The current implementation generates stack loads/stores, which are
really just mov instructions from/to "special" registers.  This may
not be the most efficient implementation, compared to an approach where
the stack registers are directly folded into instructions, but this is
easier to implement and I have yet to see a case where ptxas is unable
to see through this kind of register usage and know what is really
going on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133443 91177308-0d34-0410-b5e6-96231b3b80d8
df1c8d8
@espindola espindola Disable again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133446 91177308-0d34-0410-b5e6-96231b3b80d8
b87e37f
@jholewinski jholewinski PTX: Fix if-then-else formatting and add missing asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133447 91177308-0d34-0410-b5e6-96231b3b80d8
cad129b
@jayfoad jayfoad Fix a check for PHINodes with two incoming values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133449 91177308-0d34-0410-b5e6-96231b3b80d8
332d7e8
@jpbonn jpbonn Merge branch 'master' of http://llvm.org/git/llvm into mico32 7152823
@nlewycky nlewycky Emit movq for 64-bit register to XMM register moves, but continue to …
…accept

movd when assembling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133452 91177308-0d34-0410-b5e6-96231b3b80d8
1bd1570
@jholewinski jholewinski PTX: Fix conversion between predicates and value types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133454 91177308-0d34-0410-b5e6-96231b3b80d8
c882df2
@jpbonn jpbonn Merge branch 'master' of http://llvm.org/git/llvm into mico32 2efb247
@jpbonn jpbonn Updated tests to match new LLVM HEAD. fbf7a23
@jpbonn jpbonn Removed unnecessary and obsolete register allocation order code. de810f2
@jpbonn jpbonn Corrected extraneous debug message. ea7d9dc