Skip to content
This repository

HTTPS clone URL

Subversion checkout URL

You can clone with HTTPS or Subversion.

Download ZIP
Browse code

fix compilation with no CFG_DEBUG_ENABLED

Signed-off-by: Michael Walle <michael@walle.cc>
  • Loading branch information...
commit cf2281b28e42c99ea9ed17fb2195608df24c1f89 1 parent 57d998d
Michael Walle authored February 24, 2013
6  rtl/lm32_cpu.v
@@ -1817,7 +1817,9 @@ assign dtlb_exception = (dtlb_miss_exception == `TRUE) || (dtlb_fault_exception
1817 1817
 assign privilege_exception = (   (usr == `TRUE)
1818 1818
                               && (   (csr_write_enable_q_x == `TRUE)
1819 1819
                                   || (eret_q_x == `TRUE)
  1820
+`ifdef CFG_DEBUG_ENABLED
1820 1821
                                   || (bret_q_x == `TRUE)
  1822
+`endif
1821 1823
                                  )
1822 1824
                              );
1823 1825
 `endif
@@ -1958,9 +1960,13 @@ assign stall_f =   (stall_d == `TRUE)
1958 1960
                 // wrong in case of a miss, that is one instruction is
1959 1961
                 // skipped.
1960 1962
                 || (   (itlbe == `TRUE)
  1963
+`ifdef CFG_DEBUG_ENABLED
1961 1964
                     && (   (debug_exception_q_w == `TRUE)
1962 1965
                         || (non_debug_exception_q_w == `TRUE)
1963 1966
                        )
  1967
+`else
  1968
+                    && (exception_q_w == `TRUE)
  1969
+`endif
1964 1970
                    )
1965 1971
 `endif
1966 1972
                 ;
10  rtl/lm32_include.v
@@ -203,18 +203,20 @@
203 203
 `define LM32_ADDRESS_LSBS_WIDTH         2
204 204
 
205 205
 // Width and range of a CSR index
  206
+`ifdef CFG_MMU_ENABLED
  207
+`define LM32_CSR_WIDTH                  5
  208
+`else
206 209
 `ifdef CFG_DEBUG_ENABLED
207 210
 `define LM32_CSR_WIDTH                  5
208  
-`define LM32_CSR_RNG                    (`LM32_CSR_WIDTH-1):0
209 211
 `else
210 212
 `ifdef CFG_JTAG_ENABLED
211 213
 `define LM32_CSR_WIDTH                  4
212  
-`define LM32_CSR_RNG                    (`LM32_CSR_WIDTH-1):0
213 214
 `else
214 215
 `define LM32_CSR_WIDTH                  3
215  
-`define LM32_CSR_RNG                    (`LM32_CSR_WIDTH-1):0
216 216
 `endif
217 217
 `endif
  218
+`endif
  219
+`define LM32_CSR_RNG                    (`LM32_CSR_WIDTH-1):0
218 220
 
219 221
 // CSR indices
220 222
 `define LM32_CSR_IE                     `LM32_CSR_WIDTH'h0
@@ -243,6 +245,8 @@
243 245
 `define LM32_CSR_WP1                    `LM32_CSR_WIDTH'h19
244 246
 `define LM32_CSR_WP2                    `LM32_CSR_WIDTH'h1a
245 247
 `define LM32_CSR_WP3                    `LM32_CSR_WIDTH'h1b
  248
+`endif
  249
+`ifdef CFG_MMU_ENABLED
246 250
 `define LM32_CSR_PSW                    `LM32_CSR_WIDTH'h1d
247 251
 `define LM32_CSR_TLBVADDR               `LM32_CSR_WIDTH'h1e
248 252
 `define LM32_CSR_TLBPADDR               `LM32_CSR_WIDTH'h1f  // write only

0 notes on commit cf2281b

Please sign in to comment.
Something went wrong with that request. Please try again.