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fix compilation with no CFG_DEBUG_ENABLED

Signed-off-by: Michael Walle <michael@walle.cc>
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commit cf2281b28e42c99ea9ed17fb2195608df24c1f89 1 parent 57d998d
@mwalle mwalle authored
Showing with 13 additions and 3 deletions.
  1. +6 −0 rtl/lm32_cpu.v
  2. +7 −3 rtl/lm32_include.v
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6 rtl/lm32_cpu.v
@@ -1817,7 +1817,9 @@ assign dtlb_exception = (dtlb_miss_exception == `TRUE) || (dtlb_fault_exception
assign privilege_exception = ( (usr == `TRUE)
&& ( (csr_write_enable_q_x == `TRUE)
|| (eret_q_x == `TRUE)
+`ifdef CFG_DEBUG_ENABLED
|| (bret_q_x == `TRUE)
+`endif
)
);
`endif
@@ -1958,9 +1960,13 @@ assign stall_f = (stall_d == `TRUE)
// wrong in case of a miss, that is one instruction is
// skipped.
|| ( (itlbe == `TRUE)
+`ifdef CFG_DEBUG_ENABLED
&& ( (debug_exception_q_w == `TRUE)
|| (non_debug_exception_q_w == `TRUE)
)
+`else
+ && (exception_q_w == `TRUE)
+`endif
)
`endif
;
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10 rtl/lm32_include.v
@@ -203,18 +203,20 @@
`define LM32_ADDRESS_LSBS_WIDTH 2
// Width and range of a CSR index
+`ifdef CFG_MMU_ENABLED
+`define LM32_CSR_WIDTH 5
+`else
`ifdef CFG_DEBUG_ENABLED
`define LM32_CSR_WIDTH 5
-`define LM32_CSR_RNG (`LM32_CSR_WIDTH-1):0
`else
`ifdef CFG_JTAG_ENABLED
`define LM32_CSR_WIDTH 4
-`define LM32_CSR_RNG (`LM32_CSR_WIDTH-1):0
`else
`define LM32_CSR_WIDTH 3
-`define LM32_CSR_RNG (`LM32_CSR_WIDTH-1):0
`endif
`endif
+`endif
+`define LM32_CSR_RNG (`LM32_CSR_WIDTH-1):0
// CSR indices
`define LM32_CSR_IE `LM32_CSR_WIDTH'h0
@@ -243,6 +245,8 @@
`define LM32_CSR_WP1 `LM32_CSR_WIDTH'h19
`define LM32_CSR_WP2 `LM32_CSR_WIDTH'h1a
`define LM32_CSR_WP3 `LM32_CSR_WIDTH'h1b
+`endif
+`ifdef CFG_MMU_ENABLED
`define LM32_CSR_PSW `LM32_CSR_WIDTH'h1d
`define LM32_CSR_TLBVADDR `LM32_CSR_WIDTH'h1e
`define LM32_CSR_TLBPADDR `LM32_CSR_WIDTH'h1f // write only
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