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bus/dfi: fix multiphase naming

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1 parent d8d4e81 commit 1b8cb5b46ce7228eab43141ff8810afab7bd4322 @sbourdeauducq sbourdeauducq committed Feb 19, 2012
Showing with 2 additions and 2 deletions.
  1. +2 −2 migen/bus/dfi.py
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4 migen/bus/dfi.py
@@ -34,9 +34,9 @@ def get_standard_names(self, m2s=True, s2m=True):
if (m2s and signal[0] == M_TO_S) or (s2m and signal[0] == S_TO_M):
if add_suffix:
if signal[0] == M_TO_S:
- suffix = "_p" + int(n)
+ suffix = "_p" + str(n)
else:
- suffix = "_w" + int(n)
+ suffix = "_w" + str(n)
else:
suffix = ""
r.append(("dfi_" + signal[1] + suffix, getattr(phase, signal[1])))

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