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bus/lasmibus/Crossbar: support cba_shift=0

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commit 1ec1fb9ebe53c19bf5d1e2e4dfe1af8f3d4cad7c 1 parent fe54c68
Sébastien Bourdeauducq authored June 11, 2013

Showing 1 changed file with 4 additions and 1 deletion. Show diff stats Hide diff stats

  1. 5  migen/bus/lasmibus.py
5  migen/bus/lasmibus.py
@@ -133,7 +133,10 @@ def _split_master_addresses(self, controller_bits, bank_bits, rca_bits, cba_shif
133 133
 			cba_upper = cba_shift + controller_bits + bank_bits
134 134
 			self.comb += cba.eq(master.adr[cba_shift:cba_upper])
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 			if cba_shift < rca_bits:
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-				self.comb += rca.eq(Cat(master.adr[:cba_shift], master.adr[cba_upper:]))
  136
+				if cba_shift:
  137
+					self.comb += rca.eq(Cat(master.adr[:cba_shift], master.adr[cba_upper:]))
  138
+				else:
  139
+					self.comb += rca.eq(master.adr[cba_upper:])
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 			else:
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 				self.comb += rca.eq(master.adr[:cba_shift])
139 142
 

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