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actorlib/spi: fix memory port we/wd

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commit 24877f271bdec534e8c213d2b4738f47bc0f20a2 1 parent 0358707
@sbourdeauducq sbourdeauducq authored
Showing with 1 addition and 1 deletion.
  1. +1 −1  migen/actorlib/spi.py
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2  migen/actorlib/spi.py
@@ -24,7 +24,7 @@ def get_fragment(self):
dummy = Signal(BV(self._dw))
wd = Signal(BV(self._dw))
we = Signal()
- wp = MemoryPort(wa, dummy, wd, we)
+ wp = MemoryPort(wa, dummy, we, wd)
ra = Signal(BV(bits_for(self._depth-1)))
rd = Signal(BV(self._dw))
rp = MemoryPort(ra, rd)
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