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bus/asmibus: fix per-port tag generation

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1 parent c543edf commit 8062e48697bba406f3ab8edec1357e9175b7d739 @sbourdeauducq sbourdeauducq committed Jul 12, 2012
Showing with 4 additions and 2 deletions.
  1. +4 −2 migen/bus/asmibus.py
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@@ -101,9 +101,11 @@ def get_fragment(self):
s.allocate_adr.eq(self.adr)
]
choose_slot = None
- for s in reversed(self.slots):
+ needs_tags = len(self.slots) > 1
+ for n, s in reversed(list(enumerate(self.slots))):
choose_slot = If(s.state == SLOT_EMPTY,
- s.allocate.eq(self.stb)
+ s.allocate.eq(self.stb),
+ self.tag_issue.eq(n) if needs_tags else None
).Else(choose_slot)
comb.append(choose_slot)
comb.append(self.ack.eq(optree("|",

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