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csr/SRAM: prefix page register with memory name

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1 parent c10622f commit d2491828a426f8167709e543969777549e1b72a8 @sbourdeauducq sbourdeauducq committed
Showing with 1 addition and 1 deletion.
  1. +1 −1 migen/bus/csr.py
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2 migen/bus/csr.py
@@ -62,7 +62,7 @@ def __init__(self, mem_or_size, address, bus=None):
self.address = address
page_bits = _compute_page_bits(self.mem.depth)
if page_bits:
- self._page = RegisterField("page", page_bits)
+ self._page = RegisterField(self.mem.name_override + "_page", page_bits)
else:
self._page = None
if bus is None:

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