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Commits on Jul 28, 2015
  1. @jordens

    pipistrello: fix cts/rts

    jordens authored
    * use the same perspective as for tx/rx (flipped w.r.t. the ftdi chip)
    * add pullups in case target or host attempt to use handshaking
Commits on Jul 27, 2015
  1. @sbourdeauducq
  2. @sbourdeauducq

    resetless -> reset_less

    sbourdeauducq authored
Commits on Jul 26, 2015
  1. @sbourdeauducq
Commits on Jul 24, 2015
  1. @sbourdeauducq
  2. @enjoy-digital

    migen/actorlib/fifo: add FIFO wrapper function

    enjoy-digital authored
    Allow automatic instantiation of the correct fifo (SyncFIFO or AsyncFIFO) according to the clock domains passed in argument.
  3. @enjoy-digital

    migen/fhdl/tools: fix rename_clock_domain when new == old

    enjoy-digital authored
    Clock domain renaming should support new == old to allow programmatically determined clock domain renaming.
Commits on Jul 22, 2015
  1. @enjoy-digital
  2. @enjoy-digital
Commits on Jul 14, 2015
  1. @numato @sbourdeauducq
  2. @jordens
  3. @sbourdeauducq
  4. @numato @sbourdeauducq

    Adding support for Numato Lab Mimas V2 platform

    numato authored sbourdeauducq committed
  5. @sbourdeauducq

    platforms/kc705: style

    sbourdeauducq authored
Commits on Jul 8, 2015
  1. @jordens

    mibuild/ add support

    jordens authored
    Tested with pipistrello and kc705. Needs patches from waiting
    to be merged in the openocd queue.
Commits on Jul 5, 2015
  1. @sbourdeauducq
  2. @mithro @sbourdeauducq

    Allow using non-milkymist cables with UrJTAG.

    mithro authored sbourdeauducq committed
Commits on Jul 2, 2015
  1. @mithro @enjoy-digital
  2. @mithro @enjoy-digital

    Adding support for programming with FPGALink

    mithro authored enjoy-digital committed
    Steps for getting it set up.
     * Get libfpgalink dependencies
       sudo apt-get install \
          build-essential libreadline-dev libusb-1.0-0-dev python-yaml
     * Build libfpgalink
       wget -qO- | tar zxf -
       cd makestuff; ./scripts/ makestuff/common
       cd libs; ../scripts/ libfpgalink
       cd libfpgalink; make deps
     * Convert libfpgalink to python3
       wget -O - | tar zxf -
       cd examples/python
       ../../2to3/2to3 | patch
     * Set your path's correctly.
       export LD_LIBRARY_PATH=$(pwd)/libfpgalink/lin.x64/rel:$LD_LIBRARY_PATH
       export PYTHON_PATH=$(pwd)/libfpgalink/examples/python:$PYTHON_PATH
  3. @mithro @enjoy-digital
  4. @enjoy-digital

    mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primit…

    enjoy-digital authored
    …ives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation
    Fix DDROutput implementation on spartan6 (tested with LiteETH's GMII phy)
Commits on Jun 29, 2015
  1. @fallen
Commits on Jun 28, 2015
  1. @cr1901 @sbourdeauducq

    Remove self.programmer references in Mercury, as mercury programmer i…

    cr1901 authored sbourdeauducq committed
    …s not implemented.
  2. @cr1901 @sbourdeauducq
Commits on Jun 24, 2015
  1. @sbourdeauducq

    Merge pull request #21 from psmears/patch-1

    sbourdeauducq authored
    Minor improvements to wording
Commits on Jun 23, 2015
  1. @enjoy-digital
Commits on Jun 19, 2015
  1. @enjoy-digital
Commits on Jun 18, 2015
  1. @enjoy-digital

    mibuild/xilinx/ise: fix source and set source to False by default on …

    enjoy-digital authored
    …Windows (tools supposed to be in the PATH)
  2. @enjoy-digital
  3. @cr1901 @enjoy-digital

    Xilinx Platforms now use cmd.exe on Windows instead of bash to run sc…

    cr1901 authored enjoy-digital committed
    (remove MSYS dependency)
  4. @psmears

    Minor improvements to wording

    psmears authored
Commits on Jun 17, 2015
  1. @enjoy-digital
Commits on Jun 14, 2015
  1. @fallen
Commits on Jun 2, 2015
  1. @enjoy-digital
  2. @enjoy-digital

    migen/genlib/fsm: fix delayed_enter when delay is negative (can happe…

    enjoy-digital authored
    …n when delay is generated from others parameters)
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