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Showing 1 changed file with 40 additions and 14 deletions. Show diff stats Hide diff stats

  1. 54  migen/actorlib/spi.py
54  migen/actorlib/spi.py
@@ -50,30 +50,51 @@ def _create_csrs_assign(layout, target, atomic, prefix=""):
50 50
 
51 51
 (MODE_EXTERNAL, MODE_SINGLE_SHOT, MODE_CONTINUOUS) = range(3)
52 52
 
53  
-class SingleGenerator(Module):
  53
+class SingleGenerator(Module, AutoCSR):
54 54
 	def __init__(self, layout, mode):
55 55
 		self.source = Source(_convert_layout(layout))
56 56
 		self.busy = Signal()
57  
-		self._csrs, assigns = _create_csrs_assign(layout, self.source.payload, mode != MODE_SINGLE_SHOT)
  57
+		
  58
+		self.comb += self.busy.eq(self.source.stb)
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+
58 60
 		if mode == MODE_EXTERNAL:
59 61
 			self.trigger = Signal()
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 			trigger = self.trigger
61 63
 		elif mode == MODE_SINGLE_SHOT:
62  
-			shoot = CSR()
63  
-			self._csrs.insert(0, shoot)
64  
-			trigger = shoot.re
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+			self._r_shoot = CSR()
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+			trigger = self._r_shoot.re
65 66
 		elif mode == MODE_CONTINUOUS:
66  
-			enable = CSRStorage()
67  
-			self._csrs.insert(0, enable)
68  
-			trigger = enable.storage
  67
+			self._r_enable = CSRStorage()
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+			trigger = self._r_enable.storage
69 69
 		else:
70 70
 			raise ValueError
71  
-		self.comb += self.busy.eq(self.source.stb)
72  
-		stmts = [self.source.stb.eq(trigger)] + assigns
73  
-		self.sync += If(self.source.ack | ~self.source.stb, *stmts)
74  
-	
75  
-	def get_csrs(self):
76  
-		return self._csrs
  71
+		self.sync += If(self.source.ack | ~self.source.stb, self.source.stb.eq(trigger))
  72
+
  73
+		self._create_csrs(layout, self.source.payload, mode != MODE_SINGLE_SHOT)
  74
+
  75
+	def _create_csrs(self, layout, target, atomic, prefix=""):
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+		for element in layout:
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+			if isinstance(element[1], list):
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+				self._create_csrs(element[1], atomic,
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+					getattr(target, element[0]),
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+					element[0] + "_")
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+			else:
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+				name = element[0]
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+				nbits = element[1]
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+				if len(element) > 2:
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+					reset = element[2]
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+				else:
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+					reset = 0
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+				if len(element) > 3:
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+					alignment = element[3]
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+				else:
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+					alignment = 0
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+				regname = prefix + name
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+				reg = CSRStorage(nbits + alignment, reset=reset, atomic_write=atomic,
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+					alignment_bits=alignment, name=regname)
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+				setattr(self, "r_"+regname, reg)
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+				self.sync += If(self.source.ack | ~self.source.stb,
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+					getattr(target, name).eq(reg.storage))
77 98
 
78 99
 class Collector(Module, AutoCSR):
79 100
 	def __init__(self, layout, depth=1024):
@@ -125,6 +146,11 @@ def __init__(self, bus_accessor, bus_aw, bus_dw, mode, base_reset=0, length_rese
125 146
 		self.generator = SingleGenerator(layout, mode)
126 147
 		self.r_busy = CSRStatus()
127 148
 
  149
+		self.length = self.generator.r_length.storage
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+		self.base = self.generator.r_base.storage
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+		if hasattr(self.generator, "trigger"):
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+			self.trigger = self.generator.trigger
  153
+
128 154
 	def get_csrs(self):
129 155
 		return self.generator.get_csrs() + [self.r_busy]
130 156
 

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