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softusb/navre: fix instruction decoder

Based on patch by Florent Kermarrec
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1 parent c6509bf commit 7f0313010afd5bcf5f67b7f8d0437b3c3fef9fb3 @sbourdeauducq sbourdeauducq committed Jan 8, 2013
Showing with 21 additions and 22 deletions.
  1. +21 −22 cores/softusb/rtl/softusb_navre.v
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43 cores/softusb/rtl/softusb_navre.v
@@ -825,32 +825,31 @@ always @(*) begin
pc_sel = PC_SEL_INC;
pmem_ce = 1'b1;
end
- 16'b1001_00xx_xxxx_xxxx: begin
- if(pmem_d[3:0] == 4'hf) begin
- if(pmem_d[9]) begin
- /* PUSH */
- push = 1'b1;
- dmem_sel = DMEM_SEL_SP_R;
- dmem_we = 1'b1;
- pc_sel = PC_SEL_INC;
- pmem_ce = 1'b1;
- end else begin
- /* POP */
- pop = 1'b1;
- dmem_sel = DMEM_SEL_SP_R;
- next_state = WRITEBACK;
- end
- end else if(pmem_d[3:0] == 4'h0) begin
+ 16'b1001_00xx_xxxx_1111: begin
+ if(pmem_d[9]) begin
+ /* PUSH */
+ push = 1'b1;
+ dmem_sel = DMEM_SEL_SP_R;
+ dmem_we = 1'b1;
pc_sel = PC_SEL_INC;
pmem_ce = 1'b1;
- if(pmem_d[9])
- /* STS */
- next_state = STS;
- else
- /* LDS */
- next_state = LDS1;
+ end else begin
+ /* POP */
+ pop = 1'b1;
+ dmem_sel = DMEM_SEL_SP_R;
+ next_state = WRITEBACK;
end
end
+ 16'b1001_00xx_xxxx_0000: begin
+ pc_sel = PC_SEL_INC;
+ pmem_ce = 1'b1;
+ if(pmem_d[9])
+ /* STS */
+ next_state = STS;
+ else
+ /* LDS */
+ next_state = LDS1;
+ end
16'b1001_0101_000x_1000: begin
/* RET / RETI */
dmem_sel = DMEM_SEL_SP_PCH;

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