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lm32: add pipeline tracing to testbench

Signed-off-by: Michael Walle <michael@walle.cc>
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1 parent fe1373a commit f7e767e2098c6f156efdb477043b4e998d005938 @mwalle mwalle committed with sbourdeauducq Nov 12, 2012
Showing with 49 additions and 1 deletion.
  1. +4 −1 cores/lm32/test/Makefile
  2. +45 −0 cores/lm32/test/tb_lm32.v
@@ -6,14 +6,17 @@ all: tb_lm32
sim_%: %.vh tb_lm32
@vvp tb_lm32 +prog=$<
+trace_%: %.vh tb_lm32
+ @vvp tb_lm32 +trace=trace_$*.txt +prog=$<
+
hello_world.elf: crt.S hello_world.c
lm32-elf-gcc -Tlinker.ld -fno-builtin -o $@ $^
%.vh: %.elf
lm32-elf-objcopy -O verilog $< $@
clean:
- rm -f tb_lm32 *.vcd *.elf *.vh
+ rm -f tb_lm32 *.vcd *.elf *.vh trace*.txt
tb_lm32: $(SOURCES)
iverilog -o tb_lm32 $(SOURCES)
@@ -180,4 +180,49 @@ end
initial $readmemh(prog, dmem);
initial $readmemh(prog, pmem);
+// trace pipeline
+reg [256*8:0] tracefile;
+integer trace_started;
+integer trace_enabled;
+integer cycle;
+integer tracefd;
+initial begin
+ if($value$plusargs("trace=%s", tracefile)) begin
+ trace_enabled = 1;
+ cycle = 0;
+ tracefd = $fopen(tracefile);
+ trace_started = 0;
+ end else
+ trace_enabled = 0;
+end
+assign icache_ready = lm32.cpu.instruction_unit.icache.state != 1;
+assign dcache_ready = lm32.cpu.load_store_unit.dcache.state != 1;
+always @(posedge sys_clk) begin
+ // wait until icache and dcache init is done
+ if(!trace_started && icache_ready && dcache_ready)
+ trace_started = 1;
+ if(trace_enabled && trace_started) begin
+ $fwrite(tracefd, "%-d ", cycle);
+ $fwrite(tracefd, "%x ", {lm32.cpu.instruction_unit.pc_a, 2'b00});
+ $fwrite(tracefd, "%1d ", lm32.cpu.valid_a);
+ $fwrite(tracefd, "%x ", {lm32.cpu.instruction_unit.pc_f, 2'b00});
+ $fwrite(tracefd, "%1d ", lm32.cpu.kill_f);
+ $fwrite(tracefd, "%1d ", lm32.cpu.valid_f);
+ $fwrite(tracefd, "%x ", {lm32.cpu.instruction_unit.pc_d, 2'b00});
+ $fwrite(tracefd, "%1d ", lm32.cpu.kill_d);
+ $fwrite(tracefd, "%1d ", lm32.cpu.valid_d);
+ $fwrite(tracefd, "%x ", {lm32.cpu.instruction_unit.pc_x, 2'b00});
+ $fwrite(tracefd, "%1d ", lm32.cpu.kill_x);
+ $fwrite(tracefd, "%1d ", lm32.cpu.valid_x);
+ $fwrite(tracefd, "%x ", {lm32.cpu.instruction_unit.pc_m, 2'b00});
+ $fwrite(tracefd, "%1d ", lm32.cpu.kill_m);
+ $fwrite(tracefd, "%1d ", lm32.cpu.valid_m);
+ $fwrite(tracefd, "%x ", {lm32.cpu.instruction_unit.pc_w, 2'b00});
+ $fwrite(tracefd, "%1d ", lm32.cpu.kill_w);
+ $fwrite(tracefd, "%1d ", lm32.cpu.valid_w);
+ $fwrite(tracefd, "\n");
+ cycle = cycle + 1;
+ end
+end
+
endmodule

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