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s6ddrphy: prepare quilt

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1 parent b157d84 commit 1368b666dfc848279925620f78fe0ea8d47a84b1 @sbourdeauducq sbourdeauducq committed Feb 14, 2012
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2 .gitignore
@@ -6,3 +6,5 @@ build/*
tools/bin2hex
tools/flterm
tools/mkmmimg
+verilog/s6ddrphy/*.v
+verilog/s6ddrphy/.pc
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1 verilog/s6ddrphy/README
@@ -0,0 +1 @@
+The Verilog files of the Spartan-6 DDR PHY from Xilinx/Northwest Logic go here.
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0 verilog/s6ddrphy/patches/s6ddrphy.diff
No changes.
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1 verilog/s6ddrphy/patches/series
@@ -0,0 +1 @@
+s6ddrphy.diff

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