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framebuffer: switch to real DMA

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commit 3add96212bfb23e459a703a54b8e7e0a1551456b 1 parent ce82f18
Sébastien Bourdeauducq authored July 07, 2012

Showing 1 changed file with 1 addition and 21 deletions. Show diff stats Hide diff stats

  1. 22  milkymist/framebuffer/__init__.py
22  milkymist/framebuffer/__init__.py
@@ -207,25 +207,6 @@ def sim_fifo_gen():
207 207
 		yield t
208 208
 		print("H/V:" + str(t.value["hsync"]) + str(t.value["vsync"]))
209 209
 
210  
-class FakeDMA(Actor):
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-	def __init__(self, port):
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-		self.port = port
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-		super().__init__(
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-				("address", Sink, [("a", BV(self.port.hub.aw))]),
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-				("data", Source, [("d", BV(self.port.hub.dw))]))
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-	
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-	def get_fragment(self):
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-		pixel = Signal(BV(32))
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-		comb = [
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-			self.endpoints["address"].ack.eq(1),
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-			self.endpoints["data"].stb.eq(1),
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-			self.token("data").d.eq(Replicate(pixel, 4))
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-		]
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-		sync = [
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-			If(self.endpoints["data"].ack, pixel.eq(pixel + 1))
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-		]
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-		return Fragment(comb, sync)
228  
-
229 210
 class Framebuffer:
230 211
 	def __init__(self, address, asmiport, simulation=False):
231 212
 		asmi_bits = asmiport.hub.aw
@@ -237,8 +218,7 @@ def __init__(self, address, asmiport, simulation=False):
237 218
 		fi = ActorNode(_FrameInitiator(asmi_bits, length_bits, alignment_bits))
238 219
 		adrloop = ActorNode(misc.IntSequence(length_bits, asmi_bits))
239 220
 		adrbuffer = ActorNode(plumbing.Buffer)
240  
-		#dma = ActorNode(dma_asmi.SequentialReader(asmiport))
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-		dma = ActorNode(FakeDMA(asmiport))
  221
+		dma = ActorNode(dma_asmi.SequentialReader(asmiport))
242 222
 		cast = ActorNode(structuring.Cast(asmiport.hub.dw, packed_pixels))
243 223
 		unpack = ActorNode(structuring.Unpack(pack_factor, _pixel_layout))
244 224
 		vtg = ActorNode(VTG())

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