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add CSV CSR map output

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commit 833d7c7eec41b0ebb3742cdac48f98d78ca109a1 1 parent 1672c4a
Sébastien Bourdeauducq authored October 21, 2013
16  make.py
@@ -4,10 +4,11 @@
4 4
 
5 5
 from mibuild.tools import write_to_file
6 6
 
7  
-from milkymist import cif
  7
+from milkymist import cpuif
  8
+from milkymist.s6ddrphy import initsequence
8 9
 import top, jtag
9 10
 
10  
-def build(platform_name, build_bitstream, build_header, *soc_args, **soc_kwargs):
  11
+def build(platform_name, build_bitstream, build_header, csr_csv_filename, *soc_args, **soc_kwargs):
11 12
 	platform_module = importlib.import_module("mibuild.platforms."+platform_name)
12 13
 	platform = platform_module.Platform()
13 14
 	soc = top.SoC(platform, platform_name, *soc_args, **soc_kwargs)
@@ -46,24 +47,27 @@ def build(platform_name, build_bitstream, build_header, *soc_args, **soc_kwargs)
46 47
 	else:
47 48
 		soc.finalize()
48 49
 	if build_header:
49  
-		csr_header = cif.get_csr_header(soc.csr_base, soc.csrbankarray, soc.interrupt_map)
  50
+		csr_header = cpuif.get_csr_header(soc.csr_base, soc.csrbankarray, soc.interrupt_map)
50 51
 		write_to_file("software/include/hw/csr.h", csr_header)
51 52
 		
52  
-		sdram_phy_header = cif.get_sdram_phy_header(soc.ddrphy)
  53
+		sdram_phy_header = initsequence.get_sdram_phy_header(soc.ddrphy)
53 54
 		write_to_file("software/include/hw/sdram_phy.h", sdram_phy_header)
54  
-
  55
+	if csr_csv_filename:
  56
+		csr_csv = cpuif.get_csr_csv(soc.csr_base, soc.csrbankarray)
  57
+		write_to_file(csr_csv_filename, csr_csv)
55 58
 
56 59
 def main():
57 60
 	parser = argparse.ArgumentParser(description="milkymist-ng - a high performance SoC built on Migen technology.")
58 61
 	parser.add_argument("-p", "--platform", default="mixxeo", help="platform to build for")
59 62
 	parser.add_argument("-B", "--no-bitstream", default=False, action="store_true", help="do not build bitstream file")
60 63
 	parser.add_argument("-H", "--no-header", default=False, action="store_true", help="do not build C header files with CSR/IRQ/SDRAM_PHY defs")
  64
+	parser.add_argument("-c", "--csr-csv", default="", help="save CSR map in CSV file")
61 65
 	parser.add_argument("-l", "--load", default=False, action="store_true", help="load bitstream to SRAM")
62 66
 	parser.add_argument("-f", "--flash", default=False, action="store_true", help="load bitstream to flash")
63 67
 	parser.add_argument("-m", "--with-memtest", default=False, action="store_true", help="include memtest cores")
64 68
 	args = parser.parse_args()
65 69
 
66  
-	build(args.platform, not args.no_bitstream, not args.no_header, args.with_memtest)
  70
+	build(args.platform, not args.no_bitstream, not args.no_header, args.csr_csv, args.with_memtest)
67 71
 	if args.load:
68 72
 		jtag.load("build/soc-"+args.platform+".bit")
69 73
 	if args.flash:
64  milkymist/cpuif.py
... ...
@@ -0,0 +1,64 @@
  1
+from migen.bank.description import CSRStatus
  2
+
  3
+def _get_rw_functions(reg_name, reg_base, size, read_only):
  4
+	r = ""
  5
+	if size > 8:
  6
+		raise NotImplementedError("Register too large")
  7
+	elif size > 4:
  8
+		ctype = "unsigned long long int"
  9
+	elif size > 2:
  10
+		ctype = "unsigned int"
  11
+	elif size > 1:
  12
+		ctype = "unsigned short int"
  13
+	else:
  14
+		ctype = "unsigned char"
  15
+
  16
+	r += "static inline "+ctype+" "+reg_name+"_read(void) {\n"
  17
+	if size > 1:
  18
+		r += "\t"+ctype+" r = MMPTR("+hex(reg_base)+");\n"
  19
+		for byte in range(1, size):
  20
+			r += "\tr <<= 8;\n\tr |= MMPTR("+hex(reg_base+4*byte)+");\n"
  21
+		r += "\treturn r;\n}\n"
  22
+	else:
  23
+		r += "\treturn MMPTR("+hex(reg_base)+");\n}\n"
  24
+
  25
+	if not read_only:
  26
+		r += "static inline void "+reg_name+"_write("+ctype+" value) {\n"
  27
+		for byte in range(size):
  28
+			shift = (size-byte-1)*8
  29
+			if shift:
  30
+				value_shifted = "value >> "+str(shift)
  31
+			else:
  32
+				value_shifted = "value"
  33
+			r += "\tMMPTR("+hex(reg_base+4*byte)+") = "+value_shifted+";\n"
  34
+		r += "}\n"
  35
+	return r
  36
+
  37
+def get_csr_header(csr_base, bank_array, interrupt_map):
  38
+	r = "#ifndef __HW_CSR_H\n#define __HW_CSR_H\n#include <hw/common.h>\n"
  39
+	for name, csrs, mapaddr, rmap in bank_array.banks:
  40
+		r += "\n/* "+name+" */\n"
  41
+		reg_base = csr_base + 0x800*mapaddr
  42
+		r += "#define "+name.upper()+"_BASE "+hex(reg_base)+"\n"
  43
+		for csr in csrs:
  44
+			nr = (csr.size + 7)//8
  45
+			r += _get_rw_functions(name + "_" + csr.name, reg_base, nr, isinstance(csr, CSRStatus))
  46
+			reg_base += 4*nr
  47
+		try:
  48
+			interrupt_nr = interrupt_map[name]
  49
+		except KeyError:
  50
+			pass
  51
+		else:
  52
+			r += "#define "+name.upper()+"_INTERRUPT "+str(interrupt_nr)+"\n"
  53
+	r += "\n#endif\n"
  54
+	return r
  55
+
  56
+def get_csr_csv(csr_base, bank_array):
  57
+	r = ""
  58
+	for name, csrs, mapaddr, rmap in bank_array.banks:
  59
+		reg_base = csr_base + 0x800*mapaddr
  60
+		for csr in csrs:
  61
+			nr = (csr.size + 7)//8
  62
+			r += "{}_{},0x{:08x},{},{}\n".format(name, csr.name, reg_base, nr, "ro" if isinstance(csr, CSRStatus) else "rw")
  63
+			reg_base += 4*nr
  64
+	return r
68  milkymist/cif.py → milkymist/s6ddrphy/initsequence.py
... ...
@@ -1,70 +1,4 @@
1  
-from operator import itemgetter
2  
-import re
3  
-
4  
-from migen.fhdl.std import *
5  
-from migen.bank.description import CSRStatus
6  
-
7  
-def get_macros(filename):
8  
-	f = open(filename, "r")
9  
-	r = {}
10  
-	for line in f:
11  
-		match = re.match("\w*#define\s+(\w+)\s+(.*)", line, re.IGNORECASE)
12  
-		if match:
13  
-			r[match.group(1)] = match.group(2)
14  
-	return r
15  
-
16  
-def _get_rw_functions(reg_name, reg_base, size, read_only):
17  
-	r = ""
18  
-	if size > 8:
19  
-		raise NotImplementedError("Register too large")
20  
-	elif size > 4:
21  
-		ctype = "unsigned long long int"
22  
-	elif size > 2:
23  
-		ctype = "unsigned int"
24  
-	elif size > 1:
25  
-		ctype = "unsigned short int"
26  
-	else:
27  
-		ctype = "unsigned char"
28  
-
29  
-	r += "static inline "+ctype+" "+reg_name+"_read(void) {\n"
30  
-	if size > 1:
31  
-		r += "\t"+ctype+" r = MMPTR("+hex(reg_base)+");\n"
32  
-		for byte in range(1, size):
33  
-			r += "\tr <<= 8;\n\tr |= MMPTR("+hex(reg_base+4*byte)+");\n"
34  
-		r += "\treturn r;\n}\n"
35  
-	else:
36  
-		r += "\treturn MMPTR("+hex(reg_base)+");\n}\n"
37  
-
38  
-	if not read_only:
39  
-		r += "static inline void "+reg_name+"_write("+ctype+" value) {\n"
40  
-		for byte in range(size):
41  
-			shift = (size-byte-1)*8
42  
-			if shift:
43  
-				value_shifted = "value >> "+str(shift)
44  
-			else:
45  
-				value_shifted = "value"
46  
-			r += "\tMMPTR("+hex(reg_base+4*byte)+") = "+value_shifted+";\n"
47  
-		r += "}\n"
48  
-	return r
49  
-
50  
-def get_csr_header(csr_base, bank_array, interrupt_map):
51  
-	r = "#ifndef __HW_CSR_H\n#define __HW_CSR_H\n#include <hw/common.h>\n"
52  
-	for name, csrs, mapaddr, rmap in bank_array.banks:
53  
-		r += "\n/* "+name+" */\n"
54  
-		reg_base = csr_base + 0x800*mapaddr
55  
-		r += "#define "+name.upper()+"_BASE "+hex(reg_base)+"\n"
56  
-		for csr in csrs:
57  
-			nr = (csr.size + 7)//8
58  
-			r += _get_rw_functions(name + "_" + csr.name, reg_base, nr, isinstance(csr, CSRStatus))
59  
-			reg_base += 4*nr
60  
-		try:
61  
-			interrupt_nr = interrupt_map[name]
62  
-		except KeyError:
63  
-			pass
64  
-		else:
65  
-			r += "#define "+name.upper()+"_INTERRUPT "+str(interrupt_nr)+"\n"
66  
-	r += "\n#endif\n"
67  
-	return r
  1
+from migen.fhdl.std import log2_int
68 2
 
69 3
 def get_sdram_phy_header(sdram_phy):
70 4
 	if sdram_phy.phy_settings.memtype not in ["SDR", "DDR", "LPDDR", "DDR2"]:
3  top.py
@@ -10,9 +10,8 @@
10 10
 
11 11
 from milkymist import mxcrg, lm32, norflash, uart, s6ddrphy, dfii, lasmicon, \
12 12
 	identifier, timer, minimac3, framebuffer, dvisampler, gpio, memtest
13  
-from milkymist.cif import get_macros
14 13
 
15  
-version = get_macros("common/version.h")["VERSION"][1:-1]
  14
+version = "2.0"
16 15
 
17 16
 clk_freq = (83 + Fraction(1, 3))*1000000
18 17
 sram_size = 4096 # in bytes

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