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Use automatic register naming

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commit a23df42a7a0e58e09c96084d140f94d25df330c4 1 parent a9b7235
Sébastien Bourdeauducq authored March 12, 2013
10  milkymist/asmiprobe/__init__.py
@@ -9,12 +9,10 @@ def __init__(self, hub, trace_depth=16):
9 9
 		assert(trace_depth < 256)
10 10
 		assert(slot_count < 256)
11 11
 		
12  
-		self._slot_count = RegisterField("slot_count", 8, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
13  
-		self._trace_depth = RegisterField("trace_depth", 8, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
14  
-		self._slot_status = [RegisterField("slot_status" + str(i), 2, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
15  
-			for i in range(slot_count)]
16  
-		self._trace = [RegisterField("trace" + str(i), 8, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
17  
-			for i in range(trace_depth)]
  12
+		self._slot_count = RegisterField(8, READ_ONLY, WRITE_ONLY)
  13
+		self._trace_depth = RegisterField(8, READ_ONLY, WRITE_ONLY)
  14
+		self._slot_status = [RegisterField(2, READ_ONLY, WRITE_ONLY, name="slot_status" + str(i)) for i in range(slot_count)]
  15
+		self._trace = [RegisterField(8, READ_ONLY, WRITE_ONLY, name="trace" + str(i)) for i in range(trace_depth)]
18 16
 
19 17
 		###
20 18
 		
31  milkymist/dfii/__init__.py
@@ -5,21 +5,20 @@
5 5
 
6 6
 class PhaseInjector(Module, AutoReg):
7 7
 	def __init__(self, phase):
8  
-		self._cs = Field("cs", 1, WRITE_ONLY, READ_ONLY)
9  
-		self._we = Field("we", 1, WRITE_ONLY, READ_ONLY)
10  
-		self._cas = Field("cas", 1, WRITE_ONLY, READ_ONLY)
11  
-		self._ras = Field("ras", 1, WRITE_ONLY, READ_ONLY)
12  
-		self._wren = Field("wren", 1, WRITE_ONLY, READ_ONLY)
13  
-		self._rden = Field("rden", 1, WRITE_ONLY, READ_ONLY)
14  
-		self._command = RegisterFields("command",
15  
-			[self._cs, self._we, self._cas, self._ras, self._wren, self._rden])
16  
-		self._command_issue = RegisterRaw("command_issue")
  8
+		self._cs = Field(1, WRITE_ONLY, READ_ONLY)
  9
+		self._we = Field(1, WRITE_ONLY, READ_ONLY)
  10
+		self._cas = Field(1, WRITE_ONLY, READ_ONLY)
  11
+		self._ras = Field(1, WRITE_ONLY, READ_ONLY)
  12
+		self._wren = Field(1, WRITE_ONLY, READ_ONLY)
  13
+		self._rden = Field(1, WRITE_ONLY, READ_ONLY)
  14
+		self._command = RegisterFields(self._cs, self._we, self._cas, self._ras, self._wren, self._rden)
  15
+		self._command_issue = RegisterRaw()
17 16
 		
18  
-		self._address = RegisterField("address", len(phase.address))
19  
-		self._baddress = RegisterField("baddress", len(phase.bank))
  17
+		self._address = RegisterField(len(phase.address))
  18
+		self._baddress = RegisterField(len(phase.bank))
20 19
 		
21  
-		self._wrdata = RegisterField("wrdata", len(phase.wrdata))
22  
-		self._rddata = RegisterField("rddata", len(phase.rddata), READ_ONLY, WRITE_ONLY)
  20
+		self._wrdata = RegisterField(len(phase.wrdata))
  21
+		self._rddata = RegisterField(len(phase.rddata), READ_ONLY, WRITE_ONLY)
23 22
 	
24 23
 		###
25 24
 
@@ -50,9 +49,9 @@ def __init__(self, a, ba, d, nphases=1):
50 49
 		self.slave = dfi.Interface(a, ba, d, nphases)
51 50
 		self.master = dfi.Interface(a, ba, d, nphases)
52 51
 		
53  
-		self._sel = Field("sel")
54  
-		self._cke = Field("cke")
55  
-		self._control = RegisterFields("control", [self._sel, self._cke])
  52
+		self._sel = Field()
  53
+		self._cke = Field()
  54
+		self._control = RegisterFields(self._sel, self._cke)
56 55
 		
57 56
 		for n, phase in enumerate(inti.phases):
58 57
 			setattr(self.submodules, "pi" + str(n), PhaseInjector(phase))
1  milkymist/framebuffer/__init__.py
@@ -6,7 +6,6 @@
6 6
 from migen.flow.transactions import *
7 7
 from migen.flow import plumbing
8 8
 from migen.actorlib import misc, dma_asmi, structuring, sim, spi
9  
-from migen.bank.description import *
10 9
 
11 10
 _hbits = 11
12 11
 _vbits = 11
6  milkymist/identifier/__init__.py
@@ -17,9 +17,9 @@ def encode_version(version):
17 17
 
18 18
 class Identifier(Module, AutoReg):
19 19
 	def __init__(self, sysid, version, frequency):
20  
-		self._r_sysid = RegisterField("sysid", 16, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
21  
-		self._r_version = RegisterField("version", 16, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
22  
-		self._r_frequency = RegisterField("frequency", 32, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
  20
+		self._r_sysid = RegisterField(16, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
  21
+		self._r_version = RegisterField(16, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
  22
+		self._r_frequency = RegisterField(32, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
23 23
 		
24 24
 		###
25 25
 
10  milkymist/minimac3/__init__.py
@@ -23,11 +23,11 @@ def __init__(self):
23 23
 		self.phy_rst_n = Signal()
24 24
 		
25 25
 		# CPU interface
26  
-		self._phy_reset = RegisterField("phy_reset", reset=1)
27  
-		self._rx_count_0 = RegisterField("rx_count_0", _count_width, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
28  
-		self._rx_count_1 = RegisterField("rx_count_1", _count_width, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
29  
-		self._tx_count = RegisterField("tx_count", _count_width, access_dev=READ_WRITE)
30  
-		self._tx_start = RegisterRaw("tx_start")
  26
+		self._phy_reset = RegisterField(reset=1)
  27
+		self._rx_count_0 = RegisterField(_count_width, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
  28
+		self._rx_count_1 = RegisterField(_count_width, access_bus=READ_ONLY, access_dev=WRITE_ONLY)
  29
+		self._tx_count = RegisterField(_count_width, access_dev=READ_WRITE)
  30
+		self._tx_start = RegisterRaw()
31 31
 		
32 32
 		self.submodules.ev = EventManager()
33 33
 		self.ev.rx0 = EventSourcePulse()
6  milkymist/timer/__init__.py
@@ -5,9 +5,9 @@
5 5
 
6 6
 class Timer(Module, AutoReg):
7 7
 	def __init__(self, width=32):
8  
-		self._en = RegisterField("en")
9  
-		self._value = RegisterField("value", width, access_dev=READ_WRITE)
10  
-		self._reload = RegisterField("reload", width)
  8
+		self._en = RegisterField()
  9
+		self._value = RegisterField(width, access_dev=READ_WRITE)
  10
+		self._reload = RegisterField(width)
11 11
 		
12 12
 		self.submodules.ev = EventManager()
13 13
 		self.ev.zero = EventSourceLevel()
4  milkymist/uart/__init__.py
@@ -6,8 +6,8 @@
6 6
 
7 7
 class UART(Module, AutoReg):
8 8
 	def __init__(self, clk_freq, baud=115200):
9  
-		self._rxtx = RegisterRaw("rxtx", 8)
10  
-		self._divisor = RegisterField("divisor", 16, reset=int(clk_freq/baud/16))
  9
+		self._rxtx = RegisterRaw(8)
  10
+		self._divisor = RegisterField(16, reset=int(clk_freq/baud/16))
11 11
 		
12 12
 		self.submodules.ev = EventManager()
13 13
 		self.ev.tx = EventSourceLevel()

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