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lasmicon: fix FSM reset state with delayed_enter

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commit d753c52225dd96870c6b0add837898a255ea8287 1 parent 2f662bf
@sbourdeauducq sbourdeauducq authored
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4 milkymist/lasmicon/bankmachine.py
@@ -93,8 +93,6 @@ def __init__(self, geom_settings, timing_settings, address_align, bankn, req):
# Control and command generation FSM
fsm = FSM()
self.submodules += fsm
- fsm.delayed_enter("TRP", "ACTIVATE", timing_settings.tRP-1)
- fsm.delayed_enter("TRCD", "REGULAR", timing_settings.tRCD-1)
fsm.act("REGULAR",
If(self.refresh_req,
NextState("REFRESH")
@@ -140,3 +138,5 @@ def __init__(self, geom_settings, timing_settings, address_align, bankn, req):
track_close.eq(1),
If(~self.refresh_req, NextState("REGULAR"))
)
+ fsm.delayed_enter("TRP", "ACTIVATE", timing_settings.tRP-1)
+ fsm.delayed_enter("TRCD", "REGULAR", timing_settings.tRCD-1)
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4 milkymist/lasmicon/multiplexer.py
@@ -149,8 +149,6 @@ def anti_starvation(timeout):
# Control FSM
fsm = FSM()
self.submodules += fsm
- fsm.delayed_enter("RTW", "WRITE", timing_settings.read_latency-1)
- fsm.delayed_enter("WTR", "READ", timing_settings.tWTR-1)
fsm.act("READ",
read_time_en.eq(1),
choose_req.want_reads.eq(1),
@@ -180,6 +178,8 @@ def anti_starvation(timeout):
steerer.sel[0].eq(STEER_REFRESH),
If(~refresher.req, NextState("READ"))
)
+ fsm.delayed_enter("RTW", "WRITE", timing_settings.read_latency-1)
+ fsm.delayed_enter("WTR", "READ", timing_settings.tWTR-1)
# FIXME: workaround for zero-delay loop simulation problem with Icarus Verilog
fsm.finalize()
self.comb += refresher.ack.eq(fsm.state == fsm.encoding["REFRESH"])
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