Skip to content

HTTPS clone URL

Subversion checkout URL

You can clone with
or
.
Download ZIP
  • 2 commits
  • 4 files changed
  • 0 commit comments
  • 1 contributor
View
5 software/include/base/irq.h
@@ -49,9 +49,4 @@ static inline unsigned int irq_pending(void)
return pending;
}
-static inline void irq_ack(unsigned int mask)
-{
- __asm__ __volatile__("wcsr IP, %0" : : "r" (mask));
-}
-
#endif /* __IRQ_H */
View
4 software/libbase/system.c
@@ -44,7 +44,7 @@ __attribute__((noreturn)) void reboot(void)
{
uart_sync();
irq_setmask(0);
- irq_enable(0);
+ irq_setie(0);
CSR_SYSTEM_ID = 1; /* Writing to CSR_SYSTEM_ID causes a system reset */
while(1);
}
@@ -61,7 +61,7 @@ __attribute__((noreturn)) void reconf(void)
{
uart_sync();
irq_setmask(0);
- irq_enable(0);
+ irq_setie(0);
icap_write(0, 0xffff); /* dummy word */
icap_write(0, 0xffff); /* dummy word */
icap_write(0, 0xffff); /* dummy word */
View
3  software/libbase/uart.c
@@ -62,7 +62,6 @@ void uart_isr(void)
}
CSR_UART_EV_PENDING = stat;
- irq_ack(IRQ_UART);
}
/* Do not use in interrupt handlers! */
@@ -108,8 +107,6 @@ void uart_init(void)
tx_consume = 0;
tx_cts = 1;
- irq_ack(IRQ_UART);
-
/* ack any events */
CSR_UART_EV_PENDING = CSR_UART_EV_PENDING;
View
15 verilog/lm32/lm32_interrupt.v
@@ -93,7 +93,7 @@ parameter interrupts = `CFG_INTERRUPTS; // Number of interrupts
input clk_i; // Clock
input rst_i; // Reset
-input [interrupts-1:0] interrupt; // Interrupt pins, active-low
+input [interrupts-1:0] interrupt; // Interrupt pins
input stall_x; // Stall X pipeline stage
@@ -126,8 +126,6 @@ reg [`LM32_WORD_RNG] csr_read_data;
// Internal nets and registers
/////////////////////////////////////////////////////
-wire [interrupts-1:0] asserted; // Which interrupts are currently being asserted
-//pragma attribute asserted preserve_signal true
wire [interrupts-1:0] interrupt_n_exception;
// Interrupt CSRs
@@ -149,9 +147,6 @@ assign interrupt_n_exception = ip & im;
// Determine if any unmasked interrupts have occured
assign interrupt_exception = (|interrupt_n_exception) & ie;
-
-// Determine which interrupts are currently being asserted (active-low) or are already pending
-assign asserted = ip | interrupt;
assign ie_csr_read_data = {{`LM32_WORD_WIDTH-3{1'b0}},
`ifdef CFG_DEBUG_ENABLED
@@ -231,7 +226,7 @@ begin
else
begin
// Set IP bit when interrupt line is asserted
- ip <= asserted;
+ ip <= interrupt;
`ifdef CFG_DEBUG_ENABLED
if (non_debug_exception == `TRUE)
begin
@@ -276,8 +271,6 @@ begin
end
if (csr == `LM32_CSR_IM)
im <= csr_write_data[interrupts-1:0];
- if (csr == `LM32_CSR_IP)
- ip <= asserted & ~csr_write_data[interrupts-1:0];
end
end
end
@@ -300,7 +293,7 @@ begin
else
begin
// Set IP bit when interrupt line is asserted
- ip <= asserted;
+ ip <= interrupt;
`ifdef CFG_DEBUG_ENABLED
if (non_debug_exception == `TRUE)
begin
@@ -343,8 +336,6 @@ begin
bie <= csr_write_data[2];
`endif
end
- if (csr == `LM32_CSR_IP)
- ip <= asserted & ~csr_write_data[interrupts-1:0];
end
end
end

No commit comments for this range

Something went wrong with that request. Please try again.