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5  milkymist/lasmicon/__init__.py
@@ -20,7 +20,7 @@ def __init__(self, bank_a, row_a, col_a):
20 20
 		self.mux_a = max(row_a, col_a)
21 21
 
22 22
 class TimingSettings:
23  
-	def __init__(self, tRP, tRCD, tWR, tWTR, tREFI, tRFC, CL, read_latency, write_latency, read_time, write_time):
  23
+	def __init__(self, tRP, tRCD, tWR, tWTR, tREFI, tRFC, read_latency, write_latency, req_queue_size, read_time, write_time):
24 24
 		self.tRP = tRP
25 25
 		self.tRCD = tRCD
26 26
 		self.tWR = tWR
@@ -28,10 +28,10 @@ def __init__(self, tRP, tRCD, tWR, tWTR, tREFI, tRFC, CL, read_latency, write_la
28 28
 		self.tREFI = tREFI
29 29
 		self.tRFC = tRFC
30 30
 		
31  
-		self.CL = CL
32 31
 		self.read_latency = read_latency
33 32
 		self.write_latency = write_latency
34 33
 		
  34
+		self.req_queue_size = req_queue_size
35 35
 		self.read_time = read_time
36 36
 		self.write_time = write_time
37 37
 
@@ -48,6 +48,7 @@ def __init__(self, phy_settings, geom_settings, timing_settings):
48 48
 			aw=geom_settings.row_a + geom_settings.col_a - address_align,
49 49
 			dw=phy_settings.dfi_d*phy_settings.nphases,
50 50
 			nbanks=2**geom_settings.bank_a,
  51
+			req_queue_size=timing_settings.req_queue_size,
51 52
 			read_latency=timing_settings.read_latency+1,
52 53
 			write_latency=timing_settings.write_latency+1)
53 54
 		self.nrowbits = geom_settings.col_a - address_align
32  milkymist/lasmicon/bankmachine.py
@@ -3,6 +3,7 @@
3 3
 from migen.genlib.roundrobin import *
4 4
 from migen.genlib.fsm import FSM
5 5
 from migen.genlib.misc import optree
  6
+from migen.genlib.fifo import SyncFIFO
6 7
 
7 8
 from milkymist.lasmicon.multiplexer import *
8 9
 
@@ -33,19 +34,32 @@ def __init__(self, geom_settings, timing_settings, address_align, bankn, req):
33 34
 
34 35
 		###
35 36
 
  37
+		# Request FIFO
  38
+		self.submodules.req_fifo = SyncFIFO([("we", 1), ("adr", flen(req.adr))], timing_settings.req_queue_size)
  39
+		self.comb += [
  40
+			self.req_fifo.din.we.eq(req.we),
  41
+			self.req_fifo.din.adr.eq(req.adr),
  42
+			self.req_fifo.we.eq(req.stb),
  43
+			req.req_ack.eq(self.req_fifo.writable),
  44
+
  45
+			self.req_fifo.re.eq(req.dat_ack),
  46
+			req.lock.eq(self.req_fifo.readable)
  47
+		]
  48
+		reqf = self.req_fifo.dout
  49
+
36 50
 		slicer = _AddressSlicer(geom_settings.col_a, address_align)
37 51
 		
38 52
 		# Row tracking
39 53
 		has_openrow = Signal()
40 54
 		openrow = Signal(geom_settings.row_a)
41 55
 		hit = Signal()
42  
-		self.comb += hit.eq(openrow == slicer.row(req.adr))
  56
+		self.comb += hit.eq(openrow == slicer.row(reqf.adr))
43 57
 		track_open = Signal()
44 58
 		track_close = Signal()
45 59
 		self.sync += [
46 60
 			If(track_open,
47 61
 				has_openrow.eq(1),
48  
-				openrow.eq(slicer.row(req.adr))
  62
+				openrow.eq(slicer.row(reqf.adr))
49 63
 			),
50 64
 			If(track_close,
51 65
 				has_openrow.eq(0)
@@ -57,9 +71,9 @@ def __init__(self, geom_settings, timing_settings, address_align, bankn, req):
57 71
 		self.comb += [
58 72
 			self.cmd.ba.eq(bankn),
59 73
 			If(s_row_adr,
60  
-				self.cmd.a.eq(slicer.row(req.adr))
  74
+				self.cmd.a.eq(slicer.row(reqf.adr))
61 75
 			).Else(
62  
-				self.cmd.a.eq(slicer.col(req.adr))
  76
+				self.cmd.a.eq(slicer.col(reqf.adr))
63 77
 			)
64 78
 		]
65 79
 		
@@ -85,16 +99,16 @@ def __init__(self, geom_settings, timing_settings, address_align, bankn, req):
85 99
 		fsm.act(fsm.REGULAR,
86 100
 			If(self.refresh_req,
87 101
 				fsm.next_state(fsm.REFRESH)
88  
-			).Elif(req.stb,
  102
+			).Elif(self.req_fifo.readable,
89 103
 				If(has_openrow,
90 104
 					If(hit,
91 105
 						# NB: write-to-read specification is enforced by multiplexer
92 106
 						self.cmd.stb.eq(1),
93  
-						req.ack.eq(self.cmd.ack),
94  
-						self.cmd.is_read.eq(~req.we),
95  
-						self.cmd.is_write.eq(req.we),
  107
+						req.dat_ack.eq(self.cmd.ack),
  108
+						self.cmd.is_read.eq(~reqf.we),
  109
+						self.cmd.is_write.eq(reqf.we),
96 110
 						self.cmd.cas_n.eq(0),
97  
-						self.cmd.we_n.eq(~req.we)
  111
+						self.cmd.we_n.eq(~reqf.we)
98 112
 					).Else(
99 113
 						fsm.next_state(fsm.PRECHARGE)
100 114
 					)
4  top.py
@@ -14,7 +14,7 @@
14 14
 
15 15
 version = get_macros("common/version.h")["VERSION"][1:-1]
16 16
 
17  
-clk_freq = (62 + Fraction(1, 2))*1000000
  17
+clk_freq = (83 + Fraction(1, 3))*1000000
18 18
 sram_size = 4096 # in bytes
19 19
 l2_size = 8192 # in bytes
20 20
 
@@ -43,10 +43,10 @@ def ns(t, margin=True):
43 43
 	tREFI=ns(7800, False),
44 44
 	tRFC=ns(70),
45 45
 	
46  
-	CL=3,
47 46
 	read_latency=5,
48 47
 	write_latency=0,
49 48
 
  49
+	req_queue_size=8,
50 50
 	read_time=32,
51 51
 	write_time=16
52 52
 )

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