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9  make.py
@@ -7,10 +7,10 @@
7 7
 from milkymist import cif
8 8
 import top, jtag
9 9
 
10  
-def build(platform_name, build_bitstream, build_header):
  10
+def build(platform_name, build_bitstream, build_header, *soc_args, **soc_kwargs):
11 11
 	platform_module = importlib.import_module("mibuild.platforms."+platform_name)
12 12
 	platform = platform_module.Platform()
13  
-	soc = top.SoC(platform, platform_name)
  13
+	soc = top.SoC(platform, platform_name, *soc_args, **soc_kwargs)
14 14
 	
15 15
 	platform.add_platform_command("""
16 16
 INST "mxcrg/wr_bufpll" LOC = "BUFPLL_X0Y2";
@@ -56,12 +56,13 @@ def main():
56 56
 	parser = argparse.ArgumentParser(description="milkymist-ng - a high performance SoC built on Migen technology.")
57 57
 	parser.add_argument("-p", "--platform", default="mixxeo", help="platform to build for")
58 58
 	parser.add_argument("-B", "--no-bitstream", default=False, action="store_true", help="do not build bitstream file")
59  
-	parser.add_argument("-H", "--no-header", default=False, action="store_true", help="do not build C header file with CSR/IRQ/SDRAM_PHY defs")
  59
+	parser.add_argument("-H", "--no-header", default=False, action="store_true", help="do not build C header files with CSR/IRQ/SDRAM_PHY defs")
60 60
 	parser.add_argument("-l", "--load", default=False, action="store_true", help="load bitstream to SRAM")
61 61
 	parser.add_argument("-f", "--flash", default=False, action="store_true", help="load bitstream to flash")
  62
+	parser.add_argument("-m", "--with-memtest", default=False, action="store_true", help="include memtest cores")
62 63
 	args = parser.parse_args()
63 64
 
64  
-	build(args.platform, not args.no_bitstream, not args.no_header)
  65
+	build(args.platform, not args.no_bitstream, not args.no_header, args.with_memtest)
65 66
 	if args.load:
66 67
 		jtag.load("build/soc-"+args.platform+".bit")
67 68
 	if args.flash:
67  milkymist/memtest/__init__.py
... ...
@@ -1,10 +1,13 @@
1 1
 from migen.fhdl.std import *
2 2
 from migen.genlib.misc import optree
3  
-from migen.fhdl import verilog
  3
+from migen.bank.description import *
  4
+from migen.actorlib import dma_lasmi
  5
+from migen.actorlib.spi import MODE_SINGLE_SHOT, DMAReadController, DMAWriteController
4 6
 
5 7
 class LFSR(Module):
6 8
 	def __init__(self, n_out, n_state=31, taps=[27, 30]):
7 9
 		self.ce = Signal()
  10
+		self.reset = Signal()
8 11
 		self.o = Signal(n_out)
9 12
 
10 13
 		###
@@ -17,12 +20,16 @@ def __init__(self, n_out, n_state=31, taps=[27, 30]):
17 20
 			curval.insert(0, nv)
18 21
 			curval.pop()
19 22
 
20  
-		self.sync += If(self.ce,
  23
+		self.sync += If(self.reset,
  24
+				state.eq(0),
  25
+				self.o.eq(0)
  26
+			).Elif(self.ce,
21 27
 				state.eq(Cat(*curval[:n_state])),
22 28
 				self.o.eq(Cat(*curval))
23 29
 			)
24 30
 
25 31
 def _print_lfsr_code():
  32
+	from migen.fhdl import verilog
26 33
 	dut = LFSR(3, 4, [3, 2])
27 34
 	print(verilog.convert(dut, ios={dut.ce, dut.o}))
28 35
 
@@ -40,6 +47,62 @@ def _sim_lfsr():
40 47
 	sim = Simulator(tb)
41 48
 	sim.run(20)
42 49
 
  50
+memtest_magic = 0x361f
  51
+
  52
+class MemtestWriter(Module):
  53
+	def __init__(self, lasmim):
  54
+		self._r_magic = CSRStatus(16)
  55
+		self._r_reset = CSR()
  56
+		self.submodules._dma = DMAWriteController(dma_lasmi.Writer(lasmim), MODE_SINGLE_SHOT)
  57
+
  58
+		###
  59
+
  60
+		self.comb += self._r_magic.status.eq(memtest_magic)
  61
+
  62
+		lfsr = LFSR(lasmim.dw)
  63
+		self.submodules += lfsr
  64
+		self.comb += lfsr.reset.eq(self._r_reset.re)
  65
+
  66
+		self.comb += [
  67
+			self._dma.data.stb.eq(1),
  68
+			lfsr.ce.eq(self._dma.data.ack),
  69
+			self._dma.data.payload.d.eq(lfsr.o)
  70
+		]
  71
+
  72
+	def get_csrs(self):
  73
+		return [self._r_magic, self._r_reset] + self._dma.get_csrs()
  74
+
  75
+class MemtestReader(Module):
  76
+	def __init__(self, lasmim):
  77
+		self._r_magic = CSRStatus(16)
  78
+		self._r_reset = CSR()
  79
+		self._r_error_count = CSRStatus(lasmim.aw)
  80
+		self.submodules._dma = DMAReadController(dma_lasmi.Reader(lasmim), MODE_SINGLE_SHOT)
  81
+
  82
+		###
  83
+
  84
+		self.comb += self._r_magic.status.eq(memtest_magic)
  85
+
  86
+		lfsr = LFSR(lasmim.dw)
  87
+		self.submodules += lfsr
  88
+		self.comb += lfsr.reset.eq(self._r_reset.re)
  89
+
  90
+		self.comb += [
  91
+			lfsr.ce.eq(self._dma.data.stb),
  92
+			self._dma.data.ack.eq(1)
  93
+		]
  94
+		err_cnt = self._r_error_count.status
  95
+		self.sync += [
  96
+			If(self._r_reset.re,
  97
+				err_cnt.eq(0)
  98
+			).Elif(self._dma.data.stb,
  99
+				If(self._dma.data.payload.d != lfsr.o, err_cnt.eq(err_cnt + 1))
  100
+			)
  101
+		]
  102
+
  103
+	def get_csrs(self):
  104
+		return [self._r_magic, self._r_reset, self._r_error_count] + self._dma.get_csrs()
  105
+
43 106
 if __name__ == "__main__":
44 107
 	_print_lfsr_code()
45 108
 	_sim_lfsr()
20  top.py
@@ -10,7 +10,7 @@
10 10
 
11 11
 from milkymist import mxcrg, lm32, norflash, uart, s6ddrphy, dfii, lasmicon, \
12 12
 	identifier, timer, minimac3, framebuffer, dvisampler, \
13  
-	counteradc, gpio
  13
+	counteradc, gpio, memtest
14 14
 from milkymist.cif import get_macros
15 15
 
16 16
 version = get_macros("common/version.h")["VERSION"][1:-1]
@@ -89,7 +89,9 @@ class SoC(Module):
89 89
 		"dvisampler1_edid_mem":	11,
90 90
 		"pots":					12,
91 91
 		"buttons":				13,
92  
-		"leds":					14
  92
+		"leds":					14,
  93
+		"memtest_w":			15,
  94
+		"memtest_r":			16
93 95
 	}
94 96
 
95 97
 	interrupt_map = {
@@ -100,13 +102,18 @@ class SoC(Module):
100 102
 		"dvisampler1":	4,
101 103
 	}
102 104
 
103  
-	def __init__(self, platform, platform_name):
  105
+	def __init__(self, platform, platform_name, with_memtest):
104 106
 		#
105 107
 		# LASMI
106 108
 		#
107 109
 		self.submodules.lasmicon = lasmicon.LASMIcon(sdram_phy, sdram_geom, sdram_timing)
108  
-		self.submodules.lasmixbar = lasmibus.Crossbar([self.lasmicon.lasmic], 5, self.lasmicon.nrowbits)
109  
-		lasmim_wb, lasmim_fb0, lasmim_fb1, lasmim_dvi0, lasmim_dvi1 = self.lasmixbar.masters
  110
+		n_lasmims = 7 if with_memtest else 5
  111
+		self.submodules.lasmixbar = lasmibus.Crossbar([self.lasmicon.lasmic], n_lasmims, self.lasmicon.nrowbits)
  112
+		lasmims = list(self.lasmixbar.masters)
  113
+		lasmim_wb, lasmim_fb0, lasmim_fb1, lasmim_dvi0, lasmim_dvi1 = (lasmims.pop() for i in range(5))
  114
+		if with_memtest:
  115
+			lasmim_mtw, lasmim_mtr = lasmims.pop(), lasmims.pop()
  116
+		assert(not lasmims)
110 117
 		
111 118
 		#
112 119
 		# DFI
@@ -162,6 +169,9 @@ def __init__(self, platform, platform_name):
162 169
 				[pots_pads.blackout, pots_pads.crossfade])
163 170
 			self.submodules.buttons = gpio.GPIOIn(Cat(platform.request("user_btn", 0), platform.request("user_btn", 2)))
164 171
 			self.submodules.leds = gpio.GPIOOut(Cat(*[platform.request("user_led", i) for i in range(2)]))
  172
+		if with_memtest:
  173
+			self.submodules.memtest_w = memtest.MemtestWriter(lasmim_mtw)
  174
+			self.submodules.memtest_r = memtest.MemtestReader(lasmim_mtr)
165 175
 
166 176
 		self.submodules.csrbankarray = csrgen.BankArray(self,
167 177
 			lambda name, memory: self.csr_map[name if memory is None else name + "_" + memory.name_override])

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