diff --git a/HW/QuartusProjects/.gitignore b/HW/QuartusProjects/.gitignore
index ae196866..21a08296 100644
--- a/HW/QuartusProjects/.gitignore
+++ b/HW/QuartusProjects/.gitignore
@@ -56,7 +56,7 @@
 *.pin
 *.hex
 *.ddb
-#*.stp
+*.stp
 *.rar
 *.dpf
 *.qdf
@@ -82,3 +82,6 @@ software/
 stamp/
 # ignore qsys generated folder
 .qsys_edit/
+# ignore build generated files
+*.mif
+*.qip
diff --git a/HW/QuartusProjects/Common/capsense.sv b/HW/QuartusProjects/Common/capsense.sv
index 12cad3d4..f9ed61ca 100644
--- a/HW/QuartusProjects/Common/capsense.sv
+++ b/HW/QuartusProjects/Common/capsense.sv
@@ -8,13 +8,14 @@
 
 module capsense
 (
-	input	clk, reset,
-	input [num-1:0] sense,
-	input [3:0] hysteresis [num-1:0],
-	output [11:0] calibval_0,
-	output [11:0] counts_0,
-	output reg charge,
-	output reg [num-1:0] touched
+    input   clk,
+    input   reset,
+    input [num-1:0] sense,
+    input [3:0] hysteresis [num-1:0],
+//    output [11:0] calibval_0,
+//    output [11:0] counts_0,
+    output reg charge,
+    output reg [num-1:0] touched
 );
 
 	parameter num = 4;
@@ -51,8 +52,8 @@ module capsense
 
 	wire [11:0] actual_count = period_count - counter;
 	
-	assign calibval_0 = calibval[0];
-	assign counts_0 = counts[0];
+//	assign calibval_0 = calibval[0];
+//	assign counts_0 = counts[0];
 	
 	genvar ii;
 	integer i1, i2, i3, i4, i5, i6, l1, l2, l3;
diff --git a/HW/QuartusProjects/Common/gpio_adr_decoder_reg.sv b/HW/QuartusProjects/Common/gpio_adr_decoder_reg.sv
index a95a4968..0d291640 100644
--- a/HW/QuartusProjects/Common/gpio_adr_decoder_reg.sv
+++ b/HW/QuartusProjects/Common/gpio_adr_decoder_reg.sv
@@ -64,8 +64,8 @@ module gpio_adr_decoder_reg(
     output                              ADC_SDI_o,
     input                               ADC_SDO_i,
 //	Touch sensor:
-    output  [11:0]                      calibval_0,
-    output  [13:0]                      counts_0,
+//    output  [11:0]                      calibval_0,
+//    output  [13:0]                      counts_0,
     output  [NumSense-1:0]              touched,
     input   [1:0]                       buttons
 );
@@ -146,13 +146,20 @@ parameter   TotalNumregs    = Mux_regPrIOReg * NumIOAddrReg * NumPinsPrIOAddr;
     wire [31:0]adc_data_out;
 
 // Touch sensor:
+    reg [BusWidth-1:0]  hysteresis_reg;
+    reg [1:0]sr_delay;
+    reg reset_sr;
+    reg [2:0]sr_init_delay;
+    reg reset_init_sr;
     wire [NumSense-1:0] sense;
     wire                charge;
-    reg [BusWidth-1:0]  hysteresis_reg;
     wire [3:0]          hysteresis[NumSense-1:0];
-
-    wire sense_reset    = ~reset_reg_N | ~buttons[1];
-
+    
+    wire sr_delay_act; 
+    wire sr_init_delay_act; 
+   wire sense_reset;
+//	wire sense_reset = ~reset_reg_N;
+    
     genvar sh;
     generate
         for(sh=0;sh<NumSense;sh=sh+1) begin : sense_hystloop
@@ -256,15 +263,35 @@ generate if (Capsense >= 1) begin
     // Writes:
     always @( posedge reset_in or posedge write_address) begin
         if (reset_in) begin
-            hysteresis_reg <= 32'h11111111;
+            hysteresis_reg <= 32'h22222222;
+            reset_sr <= 1'b0;
         end
         else if ( write_address ) begin
-            if (busaddress_r == 10'h0304) begin hysteresis_reg  <= busdata_in_r; end
-        end
+            if (busaddress_r == 10'h0304) begin
+                hysteresis_reg  <= busdata_in_r; 
+                reset_sr <= 1'b1;
+            end 
+            else begin
+                hysteresis_reg  <= hysteresis_reg; 
+                reset_sr <= 1'b0;
+            end
+        end	
     end
 end
 endgenerate
 
+    always @(posedge reg_clk) begin
+        sr_delay[0] <= reset_sr;
+        sr_delay[1] <= sr_delay[0];
+        sr_init_delay[0] <= reset_init_sr;
+        sr_init_delay[1] <= sr_init_delay[0];
+        sr_init_delay[2] <= sr_init_delay[1];
+    end
+    
+    assign sr_delay_act = (sr_delay[1] == 1'b1 && sr_delay[0] == 1'b0)  ? 1'b1 : 1'b0;
+    assign sr_init_delay_act = (sr_init_delay[2] == 1'b0 && sr_init_delay[0] == 1'b1) ? 1'b1 : 1'b0;
+    assign sense_reset    = ~reset_reg_N | ~buttons[1] | sr_delay_act | sr_init_delay_act;
+    
     genvar il;
     generate
         for(il=0;il<NumIOAddrReg;il=il+1) begin : reg_initloop
@@ -356,11 +383,12 @@ endgenerate
     always @(posedge reset_in or posedge read_address)begin
         if (reset_in)begin
             busdata_to_cpu <= 32'b0;
+            reset_init_sr <= 1'b0;
         end
         else if (read_address) begin
             if (Capsense >= 1) begin
                 if (adc_address_valid) begin busdata_to_cpu <= adc_data_out;	end
-                else if (busaddress_r == 'h0300) begin busdata_to_cpu <= touched;	end
+                else if (busaddress_r == 'h0300) begin busdata_to_cpu <= touched; reset_init_sr <= 1'b1;	end
                 else if (busaddress_r == 'h0304) begin busdata_to_cpu <= hysteresis_reg;	end
                 else if(busaddress_r == 'h1000) begin busdata_to_cpu <= {8'b0,gpio_input_data[0][23:0]}; end
                 else if(busaddress_r == 'h1004) begin busdata_to_cpu <= {8'b0,gpio_input_data[1][11:0],gpio_input_data[0][35:24]}; end
@@ -422,8 +450,8 @@ generate if (Capsense >=1) begin
             .reset(sense_reset) ,	// input  reset_sig
             .sense(sense) ,	// input [num-1:0] sense_sig
             .hysteresis(hysteresis),
-            .calibval_0(calibval_0),
-            .counts_0(counts_0),
+//            .calibval_0(calibval_0),
+//            .counts_0(counts_0),
             .charge(charge) ,	// output  charge_sig
             .touched(touched) 	// output [num-1:0] touched_sig
         );
diff --git a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.qsf b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.qsf
index ca556310..14568d3a 100644
--- a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.qsf
+++ b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.qsf
@@ -649,7 +649,7 @@ set_global_assignment -name ENABLE_SIGNALTAP OFF
 set_global_assignment -name SDC_FILE DE0_Nano_SoC_Cramps.sdc
 set_global_assignment -name VHDL_FILE ../Common/firmware_id.vhd
 set_global_assignment -name MIF_FILE firmware_id.mif
-set_global_assignment -name QIP_FILE hm3_DE0_Nano_SoC.qip
+set_global_assignment -name QIP_FILE hm3_DE0_Nano_SoC_Cramps.qip
 set_global_assignment -name QIP_FILE ../../hm2/hm3_socfpga.qip
 set_global_assignment -name QIP_FILE hm3_pin_config.qip
 set_global_assignment -name SYSTEMVERILOG_FILE ../Common/capsense.sv
@@ -663,4 +663,4 @@ set_global_assignment -name SYSTEMVERILOG_FILE ../Common/adc_ltc2308_fifo.sv
 set_global_assignment -name SYSTEMVERILOG_FILE ../Common/bidir_io.sv
 set_global_assignment -name SYSTEMVERILOG_FILE ../Common/gpio_adr_decoder_reg.sv
 set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
diff --git a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.sv b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.sv
index cbd89767..0bfe5fd1 100644
--- a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.sv
+++ b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/DE0_Nano_SoC_Cramps.sv
@@ -145,7 +145,7 @@ parameter NumIOAddrReg = 6;
 
 
 // connection of internal logics
-    assign LED[5:1] = fpga_led_internal;
+//    assign LED[5:1] = fpga_led_internal;
     assign fpga_clk_50 = FPGA_CLK1_50;
 //    assign stm_hw_events    = {{15{1'b0}}, SW, fpga_led_internal, fpga_debounced_buttons};
 // hm2
@@ -176,6 +176,12 @@ parameter NumIOAddrReg = 6;
     wire int_sig;
     assign ARDUINO_IO[15] = int_sig;
 
+// Capsense:
+	wire [NumSense-1:0] 	touched;
+
+// connection of internal logics
+    assign LED[4:1] = touched;
+
 //=======================================================
 //  Structural coding
 //=======================================================
@@ -342,6 +348,8 @@ gpio_adr_decoder_reg gpio_adr_decoder_reg_inst
     .ADC_SCK_o(ADC_SCK),	// output  ADC_SCK_o_sig
     .ADC_SDI_o(ADC_SDI),	// output  ADC_SDI_o_sig
     .ADC_SDO_i(ADC_SDO),	// input  ADC_SDO_i_sig
+// CAP_Sensors
+	.touched(touched),
     .buttons(fpga_debounced_buttons)
 );
 
@@ -351,8 +359,9 @@ defparam gpio_adr_decoder_reg_inst.GPIOWidth = GPIOWidth;
 defparam gpio_adr_decoder_reg_inst.MuxGPIOIOWidth = MuxGPIOIOWidth;
 defparam gpio_adr_decoder_reg_inst.NumIOAddrReg = NumIOAddrReg;
 defparam gpio_adr_decoder_reg_inst.NumGPIO = NumGPIO;
+defparam gpio_adr_decoder_reg_inst.ADC = ADC;
 defparam gpio_adr_decoder_reg_inst.Capsense = Capsense;
-defparam gpio_adr_decoder_reg_inst.NumSense = 4;
+defparam gpio_adr_decoder_reg_inst.NumSense = NumSense;
 
 HostMot3_cfg HostMot3_inst
 (
diff --git a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/build.sh b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/build.sh
index 1636ee72..36c83341 100755
--- a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/build.sh
+++ b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/build.sh
@@ -31,7 +31,7 @@ OUTPUTDIR=output_files
 set -e
 
 # Path to the configuration files
-CONFIG_DIR="../../hm2/config/${BOARDNAME}"
+CONFIG_DIR="../../hm2/config/DExx_Nano_xxx_Cramps"
 
 
 # Routine to build a specific configuration
@@ -43,7 +43,7 @@ build_config() {
     # which means in rare instances it could match actual VHDL code.  Here we use
     # the % character to support a batch-style variable scheme
     sed "s/%CONFIG%/${1}/g" <${CONFIG_DIR}/hm3_pin_config.in > hm3_pin_config.qip
-    sed "s/%CONFIG%/${1}/g" <${CONFIG_DIR}/hm3_DE0_Nano_SoC.in > hm3_DE0_Nano_SoC.qip
+    sed "s/%CONFIG%/${1}/g" <${CONFIG_DIR}/hm3_DExx_Nano_xxx_Cramps.in > hm3_${BOARDNAME}.qip
 
     # Actually build the FPGA bit file
     make rbf
diff --git a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/firmware_id.mif b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/firmware_id.mif
deleted file mode 100644
index bffb805b..00000000
--- a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/firmware_id.mif
+++ /dev/null
@@ -1,71 +0,0 @@
-%
-config argument: DE0_Nano_SoC_Cramps
-
-size of encoded message: 117 0x75
-text format representation:
----
-build_sha: "26d422a"
-fpga_part_number: "altera socfpga"
-connector {
-  name: "GPIO0.P0"
-  pins: 24
-}
-connector {
-  name: "GPIO0.P1"
-  pins: 24
-}
-connector {
-  name: "GPIO0.P2"
-  pins: 24
-}
-num_leds: 0
-board_name: "Terasic DE0-Nano"
-comment: "$BUILD_URL unset"
----
-
-wire format length=117 0a0732366434323261120e616c7465726120736f63667067611a0f0a084750494f302e503015180000001a0f0a084750494f302e503115180000001a0f0a084750494f302e5032151800000025000000002a1054657261736963204445302d4e616e6f3210244255494c445f55524c20756e736574
-
-size of MIF struct including cookie and length field: 125
-%
-
-
-WIDTH=32;
-DEPTH=32;
-
-ADDRESS_RADIX=HEX;
-DATA_RADIX=HEX;
-
-CONTENT BEGIN
-  0000 : feedbabe;
-  0001 : 00000075;
-  0002 : 3632070a;
-  0003 : 32323464;
-  0004 : 610e1261;
-  0005 : 7265746c;
-  0006 : 6f732061;
-  0007 : 67706663;
-  0008 : 0a0f1a61;
-  0009 : 49504708;
-  000a : 502e304f;
-  000b : 00181530;
-  000c : 0f1a0000;
-  000d : 5047080a;
-  000e : 2e304f49;
-  000f : 18153150;
-  0010 : 1a000000;
-  0011 : 47080a0f;
-  0012 : 304f4950;
-  0013 : 1532502e;
-  0014 : 00000018;
-  0015 : 00000025;
-  0016 : 54102a00;
-  0017 : 73617265;
-  0018 : 44206369;
-  0019 : 4e2d3045;
-  001a : 326f6e61;
-  001b : 55422410;
-  001c : 5f444c49;
-  001d : 204c5255;
-  001e : 65736e75;
-  001f : 00000074;
-END;
diff --git a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/hm3_DE0_Nano_SoC.qip b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/hm3_DE0_Nano_SoC.qip
deleted file mode 100644
index 68322e50..00000000
--- a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/hm3_DE0_Nano_SoC.qip
+++ /dev/null
@@ -1,2 +0,0 @@
-set_global_assignment -name VHDL_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/hostmot3_cfg.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap.sv
diff --git a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/hm3_pin_config.qip b/HW/QuartusProjects/DE0_Nano_SoC_Cramps/hm3_pin_config.qip
deleted file mode 100644
index c663e10b..00000000
--- a/HW/QuartusProjects/DE0_Nano_SoC_Cramps/hm3_pin_config.qip
+++ /dev/null
@@ -1,2 +0,0 @@
-# I/O Daughterboard adaptor specific:
-set_global_assignment -name VHDL_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24_cap.vhd -library pin
diff --git a/HW/QuartusProjects/DE10_Nano_FB_Cramps/DE10_Nano_FB_Cramps.sv b/HW/QuartusProjects/DE10_Nano_FB_Cramps/DE10_Nano_FB_Cramps.sv
index 709ed703..dc46e588 100644
--- a/HW/QuartusProjects/DE10_Nano_FB_Cramps/DE10_Nano_FB_Cramps.sv
+++ b/HW/QuartusProjects/DE10_Nano_FB_Cramps/DE10_Nano_FB_Cramps.sv
@@ -144,9 +144,12 @@ parameter NumIOAddrReg = 6;
 
     wire        lcd_clk;
 
+    wire [NumSense-1:0] touched;
 // connection of internal logics
-    assign LED[5:1] = fpga_led_internal;
-    assign fpga_clk_50 = FPGA_CLK1_50;
+//	assign LED[5:1] = fpga_led_internal | {7'b0000000, led_level};
+    assign LED[4:1] = touched;
+    
+    assign fpga_clk_50=FPGA_CLK1_50;
 //    assign stm_hw_events    = {{15{1'b0}}, SW, fpga_led_internal, fpga_debounced_buttons};
 // hm2
     wire [AddrWidth-1:2]    hm_address;
@@ -342,6 +345,7 @@ gpio_adr_decoder_reg gpio_adr_decoder_reg_inst
     .ADC_SCK_o(ADC_SCK),	// output  ADC_SCK_o_sig
     .ADC_SDI_o(ADC_SDI),	// output  ADC_SDI_o_sig
     .ADC_SDO_i(ADC_SDO),	// input  ADC_SDO_i_sig
+    .touched(touched),	// input  ADC_SDO_i_sig
     .buttons(fpga_debounced_buttons)
 );
 
@@ -351,8 +355,9 @@ defparam gpio_adr_decoder_reg_inst.GPIOWidth = GPIOWidth;
 defparam gpio_adr_decoder_reg_inst.MuxGPIOIOWidth = MuxGPIOIOWidth;
 defparam gpio_adr_decoder_reg_inst.NumIOAddrReg = NumIOAddrReg;
 defparam gpio_adr_decoder_reg_inst.NumGPIO = NumGPIO;
+defparam gpio_adr_decoder_reg_inst.ADC = ADC;
 defparam gpio_adr_decoder_reg_inst.Capsense = Capsense;
-defparam gpio_adr_decoder_reg_inst.NumSense = 4;
+defparam gpio_adr_decoder_reg_inst.NumSense = NumSense;
 
 HostMot3_cfg HostMot3_inst
 (
diff --git a/HW/QuartusProjects/DE10_Nano_FB_Cramps/build.sh b/HW/QuartusProjects/DE10_Nano_FB_Cramps/build.sh
index 8d97c5a4..ac1d9ae2 100755
--- a/HW/QuartusProjects/DE10_Nano_FB_Cramps/build.sh
+++ b/HW/QuartusProjects/DE10_Nano_FB_Cramps/build.sh
@@ -31,7 +31,7 @@ OUTPUTDIR=output_files
 set -e
 
 # Path to the configuration files
-CONFIG_DIR="../../hm2/config/${BOARDNAME}"
+CONFIG_DIR="../../hm2/config/DExx_Nano_xxx_Cramps"
 
 
 # Routine to build a specific configuration
@@ -43,7 +43,7 @@ build_config() {
     # which means in rare instances it could match actual VHDL code.  Here we use
     # the % character to support a batch-style variable scheme
     sed "s/%CONFIG%/${1}/g" <${CONFIG_DIR}/hm3_pin_config.in > hm3_pin_config.qip
-    sed "s/%CONFIG%/${1}/g" <${CONFIG_DIR}/hm3_DE10_Nano_FB_Cramps.in > hm3_DE10_Nano_FB_Cramps.qip
+    sed "s/%CONFIG%/${1}/g" <${CONFIG_DIR}/hm3_DExx_Nano_xxx_Cramps.in > hm3_${BOARDNAME}.qip
 
     # Actually build the FPGA bit file
     make rbf
diff --git a/HW/QuartusProjects/DE10_Nano_FB_Cramps/firmware_id.mif b/HW/QuartusProjects/DE10_Nano_FB_Cramps/firmware_id.mif
deleted file mode 100644
index 8d36645b..00000000
--- a/HW/QuartusProjects/DE10_Nano_FB_Cramps/firmware_id.mif
+++ /dev/null
@@ -1,71 +0,0 @@
-%
-config argument: DE10_Nano_FB_Cramps
-
-size of encoded message: 118 0x76
-text format representation:
----
-build_sha: "fddb384"
-fpga_part_number: "altera socfpga"
-connector {
-  name: "GPIO0.P0"
-  pins: 24
-}
-connector {
-  name: "GPIO0.P1"
-  pins: 24
-}
-connector {
-  name: "GPIO0.P2"
-  pins: 24
-}
-num_leds: 0
-board_name: "Terasic DE10-Nano"
-comment: "$BUILD_URL unset"
----
-
-wire format length=118 0a0766646462333834120e616c7465726120736f63667067611a0f0a084750494f302e503015180000001a0f0a084750494f302e503115180000001a0f0a084750494f302e5032151800000025000000002a115465726173696320444531302d4e616e6f3210244255494c445f55524c20756e736574
-
-size of MIF struct including cookie and length field: 126
-%
-
-
-WIDTH=32;
-DEPTH=32;
-
-ADDRESS_RADIX=HEX;
-DATA_RADIX=HEX;
-
-CONTENT BEGIN
-  0000 : feedbabe;
-  0001 : 00000076;
-  0002 : 6466070a;
-  0003 : 38336264;
-  0004 : 610e1234;
-  0005 : 7265746c;
-  0006 : 6f732061;
-  0007 : 67706663;
-  0008 : 0a0f1a61;
-  0009 : 49504708;
-  000a : 502e304f;
-  000b : 00181530;
-  000c : 0f1a0000;
-  000d : 5047080a;
-  000e : 2e304f49;
-  000f : 18153150;
-  0010 : 1a000000;
-  0011 : 47080a0f;
-  0012 : 304f4950;
-  0013 : 1532502e;
-  0014 : 00000018;
-  0015 : 00000025;
-  0016 : 54112a00;
-  0017 : 73617265;
-  0018 : 44206369;
-  0019 : 2d303145;
-  001a : 6f6e614e;
-  001b : 42241032;
-  001c : 444c4955;
-  001d : 4c52555f;
-  001e : 736e7520;
-  001f : 00007465;
-END;
diff --git a/HW/QuartusProjects/DE10_Nano_FB_Cramps/hm3_DE10_Nano_FB_Cramps.qip b/HW/QuartusProjects/DE10_Nano_FB_Cramps/hm3_DE10_Nano_FB_Cramps.qip
deleted file mode 100644
index 267a4b9e..00000000
--- a/HW/QuartusProjects/DE10_Nano_FB_Cramps/hm3_DE10_Nano_FB_Cramps.qip
+++ /dev/null
@@ -1,2 +0,0 @@
-set_global_assignment -name VHDL_FILE ../../hm2/config/DE10_Nano_FB_Cramps/hostmot3_cfg.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE ../../hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap.sv
diff --git a/HW/QuartusProjects/DE10_Nano_FB_Cramps/hm3_pin_config.qip b/HW/QuartusProjects/DE10_Nano_FB_Cramps/hm3_pin_config.qip
deleted file mode 100644
index 1f9bf9c9..00000000
--- a/HW/QuartusProjects/DE10_Nano_FB_Cramps/hm3_pin_config.qip
+++ /dev/null
@@ -1,2 +0,0 @@
-# I/O Daughterboard adaptor specific:
-set_global_assignment -name VHDL_FILE ../../hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap.vhd -library pin
diff --git a/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/build.sh b/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/build.sh
index 5d7b84ca..d1ccec8f 100755
--- a/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/build.sh
+++ b/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/build.sh
@@ -89,7 +89,7 @@ make clean
 # Generate the MIF file containing the FirmwareID protobuf message
 # This only needs to be done once per board
 #python ../../firmware-tag/genfwid.py ${BOARDNAME} > firmware_id.mif
-python ../../firmware-tag/genfwid.py DE0_Nano_SoC_DB25 > firmware_id.mif
+python ../../firmware-tag/genfwid.py DE10_Nano_SoC_FB_DB25 > firmware_id.mif
 
 # Build each configuration, one at a time
 for CONFIG in ${CONFIG_NAMES} ; do
diff --git a/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/firmware_id.mif b/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/firmware_id.mif
deleted file mode 100644
index d4d58455..00000000
--- a/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/firmware_id.mif
+++ /dev/null
@@ -1,79 +0,0 @@
-%
-config argument: DE0_Nano_SoC_DB25
-
-size of encoded message: 134 0x86
-text format representation:
----
-build_sha: "0f2667c"
-fpga_part_number: "altera socfpga"
-connector {
-  name: "GPIO0.P2"
-  pins: 17
-}
-connector {
-  name: "GPIO0.P3"
-  pins: 17
-}
-connector {
-  name: "GPIO1.P2"
-  pins: 17
-}
-connector {
-  name: "GPIO1.P3"
-  pins: 17
-}
-num_leds: 4
-board_name: "Terasic DE0-Nano"
-comment: "$BUILD_URL unset"
----
-
-wire format length=134 0a0730663236363763120e616c7465726120736f63667067611a0f0a084750494f302e503215110000001a0f0a084750494f302e503315110000001a0f0a084750494f312e503215110000001a0f0a084750494f312e5033151100000025040000002a1054657261736963204445302d4e616e6f3210244255494c445f55524c20756e736574
-
-size of MIF struct including cookie and length field: 142
-%
-
-
-WIDTH=32;
-DEPTH=36;
-
-ADDRESS_RADIX=HEX;
-DATA_RADIX=HEX;
-
-CONTENT BEGIN
-  0000 : feedbabe;
-  0001 : 00000086;
-  0002 : 6630070a;
-  0003 : 37363632;
-  0004 : 610e1263;
-  0005 : 7265746c;
-  0006 : 6f732061;
-  0007 : 67706663;
-  0008 : 0a0f1a61;
-  0009 : 49504708;
-  000a : 502e304f;
-  000b : 00111532;
-  000c : 0f1a0000;
-  000d : 5047080a;
-  000e : 2e304f49;
-  000f : 11153350;
-  0010 : 1a000000;
-  0011 : 47080a0f;
-  0012 : 314f4950;
-  0013 : 1532502e;
-  0014 : 00000011;
-  0015 : 080a0f1a;
-  0016 : 4f495047;
-  0017 : 33502e31;
-  0018 : 00001115;
-  0019 : 00042500;
-  001a : 102a0000;
-  001b : 61726554;
-  001c : 20636973;
-  001d : 2d304544;
-  001e : 6f6e614e;
-  001f : 42241032;
-  0020 : 444c4955;
-  0021 : 4c52555f;
-  0022 : 736e7520;
-  0023 : 00007465;
-END;
diff --git a/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/hostmot2_cfg.vhd b/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/hostmot2_cfg.vhd
deleted file mode 100644
index 8f00415d..00000000
--- a/HW/QuartusProjects/DE10_Nano_SoC_FB_DB25/hostmot2_cfg.vhd
+++ /dev/null
@@ -1,146 +0,0 @@
-library IEEE;
-use IEEE.std_logic_1164.all;  -- defines std_logic types
-use IEEE.std_logic_ARITH.ALL;
-use IEEE.std_logic_UNSIGNED.ALL;
---
--- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics
--- http://www.mesanet.com
---
--- This program is is licensed under a disjunctive dual license giving you
--- the choice of one of the two following sets of free software/open source
--- licensing terms:
---
---    * GNU General Public License (GPL), version 2.0 or later
---    * 3-clause BSD License
---
---
--- The GNU GPL License:
---
---     This program is free software; you can redistribute it and/or modify
---     it under the terms of the GNU General Public License as published by
---     the Free Software Foundation; either version 2 of the License, or
---     (at your option) any later version.
---
---     This program is distributed in the hope that it will be useful,
---     but WITHOUT ANY WARRANTY; without even the implied warranty of
---     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
---     GNU General Public License for more details.
---
---     You should have received a copy of the GNU General Public License
---     along with this program; if not, write to the Free Software
---     Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
---
---
--- The 3-clause BSD License:
---
---     Redistribution and use in source and binary forms, with or without
---     modification, are permitted provided that the following conditions
---     are met:
---
---         * Redistributions of source code must retain the above copyright
---           notice, this list of conditions and the following disclaimer.
---
---         * Redistributions in binary form must reproduce the above
---           copyright notice, this list of conditions and the following
---           disclaimer in the documentation and/or other materials
---           provided with the distribution.
---
---         * Neither the name of Mesa Electronics nor the names of its
---           contributors may be used to endorse or promote products
---           derived from this software without specific prior written
---           permission.
---
---
--- Disclaimer:
---
---     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
---     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
---     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
---     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
---     COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
---     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
---     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
---     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
---     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
---     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
---     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
---     POSSIBILITY OF SUCH DAMAGE.
---
-
-use work.DE0_Nano_SoC_DB25_card.all;
--- Uncomment one of the following
---use work.PIN_7I76_7I85S_GPIO_GPIO.all;
---use work.PIN_7I76_7I76_7I76_7I76.all;
-use work.PIN_7I76_7I76_7I76_7I76.all;
-
-entity HostMot2_cfg is
-    port (
-     -- Generic 32  bit bus interface signals --
-    ibus        : in std_logic_vector(buswidth -1 downto 0);
-    obus        : out std_logic_vector(buswidth -1 downto 0);
-    addr        : in std_logic_vector(addrwidth -1 downto 2);
-    readstb     : in std_logic;
-    writestb    : in std_logic;
-    clklow      : in std_logic;
-    clkmed      : in std_logic;
-    clkhigh     : in std_logic;
-    irq         : out std_logic;
-    dreq        : out std_logic;
-    demandmode  : out std_logic;
-    iobits      : inout std_logic_vector (iowidth -1 downto 0);
-    liobits     : inout std_logic_vector (liowidth -1 downto 0);
-    rates       : out std_logic_vector (4 downto 0);
-    leds        : out std_logic_vector(ledcount-1 downto 0) );
-end HostMot2_cfg;
-
-architecture arch of HostMot2_cfg is
-
-begin
-    aHostMot2_cfg: entity work.HostMot2
-    generic map (
-        ThePinDesc              => PinDesc,
-        TheModuleID             => ModuleID,
-        IDROMType               => 3,
-        SepClocks               => SepClocks,
-        OneWS                   => OneWS,
-        UseStepGenPrescaler     => true,
-        UseIRQLogic             => true,
-        PWMRefWidth             => 13,
-        UseWatchDog             => true,
-        OffsetToModules         => 64,
-        OffsetToPinDesc         => 448,
-        ClockHigh               => ClockHigh,
-        ClockMed                => ClockMed,
-        ClockLow                => ClockLow,
-        BoardNameLow            => BoardNameLow,
-        BoardNameHigh           => BoardNameHigh,
-        FPGASize                => FPGASize,
-        FPGAPins                => FPGAPins,
-        IOPorts                 => IOPorts,
-        IOWidth                 => IOWidth,
-        LIOWidth                => LIOWidth,
-        PortWidth               => PortWidth,
-        BusWidth                => 32,
-        AddrWidth               => 16,
-        InstStride0             => 4,
-        InstStride1             => 64,
-        RegStride0              => 256,
-        RegStride1              => 256,
-        LEDCount                => LEDCount )
-    port map (
-        ibus                    => ibus,
-        obus                    => obus,
-        addr                    => addr,
-        readstb                 => readstb,
-        writestb                => writestb,
-        clklow                  => clklow,
-        clkmed                  => clkmed,
-        clkhigh                 => clkhigh,
-        int                     => irq,
-        dreq                    => dreq,
-        demandmode              => demandmode,
-        iobits                  => iobits,
-        liobits                 => liobits,
-        rates                   => rates,
-        leds                    => leds );
-end arch;
diff --git a/HW/firmware-tag/DE10_Nano_SoC_FB_DB25.py b/HW/firmware-tag/DE10_Nano_SoC_FB_DB25.py
index 50c1da2f..a62def65 100644
--- a/HW/firmware-tag/DE10_Nano_SoC_FB_DB25.py
+++ b/HW/firmware-tag/DE10_Nano_SoC_FB_DB25.py
@@ -10,7 +10,7 @@ def gen_fwid(*args,**kwargs):
 
     fw.fpga_part_number = "altera socfpga"
     fw.num_leds = 4
-    fw.board_name = "Terasic DE0-Nano"
+    fw.board_name = "Terasic DE10-Nano"
 
     c = fw.connector.add()
     c.name = "GPIO0.P2"
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24.sv b/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24.sv
deleted file mode 100644
index 3fd7385a..00000000
--- a/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24.sv
+++ /dev/null
@@ -1,34 +0,0 @@
-package boardtype;
-// DE0-Nano Dev kit and I/O adaptors specific info
-//   {STRAIGHT=0,DB25=1} BoardAdaptor;
-
-parameter BoardAdaptor          = 0;
-    parameter ClockHigh         = 200000000;    // 200 MHz
-    parameter ClockMed          = 100000000;    // 100 MHz
-    parameter ClockLow          =  50000000;    //  50 MHz
-//    parameter BoardNameLow      = 32'h41524554;        // "TERA"
-//    parameter BoardNameHigh     = 32'h4E304544;        // "DE0N"
-    parameter BoardNameLow      = 32'h4153454D;        // "MESA"
-    parameter BoardNameHigh     = 32'h35324935;        // "5I25"
-    parameter FPGASize          = 9;            // Reported as 32-bit value in IDROM.vhd (9 matches Mesanet value for 5i25)
-                                                    //   FIXME: Figure out Mesanet encoding and put something sensible here
-    parameter FPGAPins          = 144;    // Total Number of available I/O pins for Hostmot2 use Reported as 32-bit value in IDROM.vhd
-                                                    // Proposal: On DE0 NANO board Limit to total count of gpios + arduinoconnectors + ltc + adc I/Os
-                                            //   Maximum of 144 pindesc entries currently hard-coded in IDROM.vhd
-    parameter IOPorts           = 3;            // Number of external ports (DE0-Nano_DB25 can have 2 on each 40-pin expansion header)
-    parameter IOWidth           = 72;            // Number of total I/O pins = IOPorts * PortWidth
-    parameter PortWidth         = 24;            // Number of I/O pins per port: 17 per DB25
-    parameter LIOWidth          = 0;            // Number of local I/Os (used for on-board serial-port on Mesanet cards)
-    parameter LEDCount          = 0;            // Number of LEDs
-    parameter SepClocks         = "true";            // Deprecated
-    parameter OneWS             = "true";            // Deprecated
-    parameter BusWidth          = 32;
-    parameter AddrWidth         = 16;
-
-    parameter GPIOWidth         = 36;
-    parameter NumGPIO           = 2;
-    parameter MuxGPIOIOWidth    = IOWidth/NumGPIO;
-    parameter MuxLedWidth       = LEDCount/NumGPIO;
-    parameter ADC               = "DE0-Nano-SoC";
-    parameter Capsense          = 0;
-endpackage //_HeaderIncluded
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap_enc.sv b/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap_enc.sv
deleted file mode 100644
index ab5a52ca..00000000
--- a/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap_enc.sv
+++ /dev/null
@@ -1,34 +0,0 @@
-package boardtype;
-// DE0-Nano Dev kit and I/O adaptors specific info
-//   {STRAIGHT=0,DB25=1} BoardAdaptor;
-
-parameter BoardAdaptor          = 0;
-    parameter ClockHigh         = 200000000;    // 200 MHz
-    parameter ClockMed          = 100000000;    // 100 MHz
-    parameter ClockLow          =  50000000;    //  50 MHz
-//    parameter BoardNameLow      = 32'h41524554;        // "TERA"
-//    parameter BoardNameHigh     = 32'h4E304544;        // "DE0N"
-    parameter BoardNameLow      = 32'h4153454D;        // "MESA"
-    parameter BoardNameHigh     = 32'h35324935;        // "5I25"
-    parameter FPGASize          = 9;            // Reported as 32-bit value in IDROM.vhd (9 matches Mesanet value for 5i25)
-                                                    //   FIXME: Figure out Mesanet encoding and put something sensible here
-    parameter FPGAPins          = 144;    // Total Number of available I/O pins for Hostmot2 use Reported as 32-bit value in IDROM.vhd
-                                                    // Proposal: On DE0 NANO board Limit to total count of gpios + arduinoconnectors + ltc + adc I/Os
-                                            //   Maximum of 144 pindesc entries currently hard-coded in IDROM.vhd
-    parameter IOPorts           = 3;            // Number of external ports (DE0-Nano_DB25 can have 2 on each 40-pin expansion header)
-    parameter IOWidth           = 72;            // Number of total I/O pins = IOPorts * PortWidth
-    parameter PortWidth         = 24;            // Number of I/O pins per port: 17 per DB25
-    parameter LIOWidth          = 0;            // Number of local I/Os (used for on-board serial-port on Mesanet cards)
-    parameter LEDCount          = 0;            // Number of LEDs
-    parameter SepClocks         = "true";            // Deprecated
-    parameter OneWS             = "true";            // Deprecated
-    parameter BusWidth          = 32;
-    parameter AddrWidth         = 16;
-
-    parameter GPIOWidth         = 36;
-    parameter NumGPIO           = 2;
-    parameter MuxGPIOIOWidth    = IOWidth/NumGPIO;
-    parameter MuxLedWidth       = LEDCount/NumGPIO;
-    parameter ADC               = "DE0-Nano-SoC";
-    parameter Capsense          = 1;
-endpackage //_HeaderIncluded
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap_spi.sv b/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap_spi.sv
deleted file mode 100644
index ab5a52ca..00000000
--- a/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap_spi.sv
+++ /dev/null
@@ -1,34 +0,0 @@
-package boardtype;
-// DE0-Nano Dev kit and I/O adaptors specific info
-//   {STRAIGHT=0,DB25=1} BoardAdaptor;
-
-parameter BoardAdaptor          = 0;
-    parameter ClockHigh         = 200000000;    // 200 MHz
-    parameter ClockMed          = 100000000;    // 100 MHz
-    parameter ClockLow          =  50000000;    //  50 MHz
-//    parameter BoardNameLow      = 32'h41524554;        // "TERA"
-//    parameter BoardNameHigh     = 32'h4E304544;        // "DE0N"
-    parameter BoardNameLow      = 32'h4153454D;        // "MESA"
-    parameter BoardNameHigh     = 32'h35324935;        // "5I25"
-    parameter FPGASize          = 9;            // Reported as 32-bit value in IDROM.vhd (9 matches Mesanet value for 5i25)
-                                                    //   FIXME: Figure out Mesanet encoding and put something sensible here
-    parameter FPGAPins          = 144;    // Total Number of available I/O pins for Hostmot2 use Reported as 32-bit value in IDROM.vhd
-                                                    // Proposal: On DE0 NANO board Limit to total count of gpios + arduinoconnectors + ltc + adc I/Os
-                                            //   Maximum of 144 pindesc entries currently hard-coded in IDROM.vhd
-    parameter IOPorts           = 3;            // Number of external ports (DE0-Nano_DB25 can have 2 on each 40-pin expansion header)
-    parameter IOWidth           = 72;            // Number of total I/O pins = IOPorts * PortWidth
-    parameter PortWidth         = 24;            // Number of I/O pins per port: 17 per DB25
-    parameter LIOWidth          = 0;            // Number of local I/Os (used for on-board serial-port on Mesanet cards)
-    parameter LEDCount          = 0;            // Number of LEDs
-    parameter SepClocks         = "true";            // Deprecated
-    parameter OneWS             = "true";            // Deprecated
-    parameter BusWidth          = 32;
-    parameter AddrWidth         = 16;
-
-    parameter GPIOWidth         = 36;
-    parameter NumGPIO           = 2;
-    parameter MuxGPIOIOWidth    = IOWidth/NumGPIO;
-    parameter MuxLedWidth       = LEDCount/NumGPIO;
-    parameter ADC               = "DE0-Nano-SoC";
-    parameter Capsense          = 1;
-endpackage //_HeaderIncluded
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/hm3_DE0_Nano_SoC.in b/HW/hm2/config/DE0_Nano_SoC_Cramps/hm3_DE0_Nano_SoC.in
deleted file mode 100644
index 644e0242..00000000
--- a/HW/hm2/config/DE0_Nano_SoC_Cramps/hm3_DE0_Nano_SoC.in
+++ /dev/null
@@ -1,2 +0,0 @@
-set_global_assignment -name VHDL_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/hostmot3_cfg.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/atlas_%CONFIG%.sv
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/hm3_pin_config.in b/HW/hm2/config/DE0_Nano_SoC_Cramps/hm3_pin_config.in
deleted file mode 100644
index f2fc2cc9..00000000
--- a/HW/hm2/config/DE0_Nano_SoC_Cramps/hm3_pin_config.in
+++ /dev/null
@@ -1,2 +0,0 @@
-# I/O Daughterboard adaptor specific:
-set_global_assignment -name VHDL_FILE ../../hm2/config/DE0_Nano_SoC_Cramps/PIN_%CONFIG%.vhd -library pin
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24.vhd b/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24.vhd
deleted file mode 100644
index 8f91cc02..00000000
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24.vhd
+++ /dev/null
@@ -1,200 +0,0 @@
-library IEEE;
-use IEEE.std_logic_1164.all;  -- defines std_logic types
-use IEEE.STD_LOGIC_ARITH.ALL;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
-
--- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics
--- http://www.mesanet.com
---
--- This program is is licensed under a disjunctive dual license giving you
--- the choice of one of the two following sets of free software/open source
--- licensing terms:
---
---    * GNU General Public License (GPL), version 2.0 or later
---    * 3-clause BSD License
---
---
--- The GNU GPL License:
---
---     This program is free software; you can redistribute it and/or modify
---     it under the terms of the GNU General Public License as published by
---     the Free Software Foundation; either version 2 of the License, or
---     (at your option) any later version.
---
---     This program is distributed in the hope that it will be useful,
---     but WITHOUT ANY WARRANTY; without even the implied warranty of
---     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
---     GNU General Public License for more details.
---
---     You should have received a copy of the GNU General Public License
---     along with this program; if not, write to the Free Software
---     Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
---
---
--- The 3-clause BSD License:
---
---     Redistribution and use in source and binary forms, with or without
---     modification, are permitted provided that the following conditions
---     are met:
---
---   * Redistributions of source code must retain the above copyright
---     notice, this list of conditions and the following disclaimer.
---
---   * Redistributions in binary form must reproduce the above
---     copyright notice, this list of conditions and the following
---     disclaimer in the documentation and/or other materials
---     provided with the distribution.
---
---   * Neither the name of Mesa Electronics nor the names of its
---     contributors may be used to endorse or promote products
---     derived from this software without specific prior written
---     permission.
---
---
--- Disclaimer:
---
---     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
---     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
---     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
---     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
---     COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
---     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
---     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
---     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
---     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
---     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
---     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
---     POSSIBILITY OF SUCH DAMAGE.
---
-
-use work.IDROMConst.all;
-
-package Pintypes is
-    constant ModuleID : ModuleIDType :=(
-    -- GTag             Version Clock           NumInst BaseAddr                    NumRegisters        Strides MultiRegs
-        (HM2DPLLTag,    x"00",  ClockLowTag,    x"01",  HM2DPLLBaseRateAddr&PadT,   HM2DPLLNumRegs,     x"00",  HM2DPLLMPBitMask),
-        (WatchDogTag,   x"00",  ClockLowTag,    x"01",  WatchDogTimeAddr&PadT,      WatchDogNumRegs,    x"00",  WatchDogMPBitMask),
-        (IOPortTag,     x"00",  ClockLowTag,    x"03",  PortAddr&PadT,              IOPortNumRegs,      x"00",  IOPortMPBitMask),
-        (QcountTag,     x"02",  ClockLowTag,    x"02",  QcounterAddr&PadT,          QCounterNumRegs,    x"00",  QCounterMPBitMask),
-        (StepGenTag,    x"02",  ClockLowTag,    x"0A",  StepGenRateAddr&PadT,       StepGenNumRegs,     x"00",  StepGenMPBitMask),
-        (PWMTag,        x"00",  ClockHighTag,   x"06",  PWMValAddr&PadT,            PWMNumRegs,         x"00",  PWMMPBitMask),
-        (LEDTag,        x"00",  ClockLowTag,    x"01",  LEDAddr&PadT,               LEDNumRegs,         x"00",  LEDMPBitMask),
-        (NANOADCTag,    x"00",  ClockLowTag,    x"08",  NANOADCAddr&PadT,           NANOADCNumRegs,     x"00",  NANOADCBitMask),
-        (FWIDTag,       x"00",  ClockLowTag,    x"01",  FWIDAddr&PadT,              FWIDNumRegs,        x"00",  FWIDMPBitMask),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000")
-        );
-
-
-    constant PinDesc : PinDescType :=(
---      Base       Sec      Sec       Sec
---      func       unit     func      pin                   -- hostmot2 DE0-Nano        pin    Function
-        IOPortTag & x"00" & StepGenTag & StepGenStepPin,    -- I/O 00   GPIO_0 01    01        X Step
-        IOPortTag & x"00" & StepGenTag & StepGenDirPin,     -- I/O 01   GPIO_0 02    02        X Dir
-        IOPortTag & x"01" & StepGenTag & StepGenStepPin,    -- I/O 02   GPIO_0 03    03        Y Step
-        IOPortTag & x"01" & StepGenTag & StepGenDirPin,     -- I/O 03   GPIO_0 04    04         Y Dir
-        IOPortTag & x"02" & StepGenTag & StepGenStepPin,    -- I/O 04   GPIO_0 05    05        Z Step
-        IOPortTag & x"02" & StepGenTag & StepGenDirPin,     -- I/O 05   GPIO_0 06    06        Z Dir
-        IOPortTag & x"03" & StepGenTag & StepGenStepPin,    -- I/O 06   GPIO_0 07    07        E0 Step
-        IOPortTag & x"03" & StepGenTag & StepGenDirPin,     -- I/O 07   GPIO_0 08    08        E0 Dir
-        IOPortTag & x"04" & StepGenTag & StepGenStepPin,    -- I/O 08   GPIO_0 09    09        E1 Step
-        IOPortTag & x"04" & StepGenTag & StepGenDirPin,     -- I/O 09   GPIO_0 10    10        E1 Dir
-        IOPortTag & x"05" & StepGenTag & StepGenStepPin,    -- I/O 10   GPIO_0 11    13        E2 Step
-        IOPortTag & x"05" & StepGenTag & StepGenDirPin,     -- I/O 11   GPIO_0 12    14        E2 Dir
-        IOPortTag & x"06" & StepGenTag & StepGenStepPin,    -- I/O 12   GPIO_0 13    15        U Step
-        IOPortTag & x"06" & StepGenTag & StepGenDirPin,     -- I/O 13   GPIO_0 14    16        U Dir
-        IOPortTag & x"07" & StepGenTag & StepGenStepPin,    -- I/O 14   GPIO_0 15    17        V Step
-        IOPortTag & x"07" & StepGenTag & StepGenDirPin,     -- I/O 15   GPIO_0 16    18        V Dir
-        IOPortTag & x"08" & StepGenTag & StepGenStepPin,    -- I/O 16   GPIO_0 17    19        W Step
-        IOPortTag & x"08" & StepGenTag & StepGenDirPin,     -- I/O 17   GPIO_0 18    20        W Dir
-        IOPortTag & x"00" & PWMTag & PWMAOutPin,            -- I/O 18   GPIO_0 19    21        Spindle DAC PWM
-        IOPortTag & x"01" & PWMTag & PWMAOutPin,            -- I/O 19   GPIO_0 20    22        Spindle DAC PWM
-        IOPortTag & x"02" & PWMTag & PWMAOutPin,            -- I/O 20   GPIO_0 21    23        Spindle DAC PWM
-        IOPortTag & x"03" & PWMTag & PWMAOutPin,            -- I/O 21   GPIO_0 22    24        Spindle DAC PWM
-        IOPortTag & x"04" & PWMTag & PWMAOutPin,            -- I/O 22   GPIO_0 23    25        Spindle DAC PWM
-        IOPortTag & x"05" & PWMTag & PWMAOutPin,            -- I/O 23   GPIO_0 24    26        Spindle DAC PWM
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 24   GPIO_0 25    27        Limit X-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 25   GPIO_0 26    28        Limit X-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 26   GPIO_0 27    31        Limit Y-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 27   GPIO_0 27    32        Limit Y-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 28   GPIO_0 29    33        Limit Z-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 29   GPIO_0 30    34        Limit Z-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 30   GPIO_0 31    35        just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 31   GPIO_0 32    36        Led
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 32   GPIO_0 33    37        Axis_ENA_n
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 33   GPIO_0 34    38        Machine_Pwr
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 34   GPIO_0 35    39        Estop (In)
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 35   GPIO_0 36    40        Estop_Sw
-
---      Base       Sec      Sec       Sec
---      func       unit     func      pin                   -- hostmot2    DE0-Nano     pin    Function
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 36    GPIO_1 01   01      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 37    GPIO_1 02   02      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 38    GPIO_1 03   03      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 39    GPIO_1 04   04      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 40    GPIO_1 05   05      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 41    GPIO_1 06   06      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 42    GPIO_1 07   07      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 43    GPIO_1 08   08      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 44    GPIO_1 09   09      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 45    GPIO_1 10   10      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 46    GPIO_1 11   13      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 47    GPIO_1 12   14      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 48    GPIO_1 13   15      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 49    GPIO_1 14   16      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 50    GPIO_1 15   17      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 51    GPIO_1 16   18      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 52    GPIO_1 17   19      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 53    GPIO_1 18   20      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 54    GPIO_1 19   21      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 55    GPIO_1 20   22      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 56    GPIO_1 21   23      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 57    GPIO_1 22   24      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 58    GPIO_1 23   25      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 59    GPIO_1 24   26      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 60    GPIO_1 25   27      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 61    GPIO_1 26   28      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 62    GPIO_1 27   31      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 63    GPIO_1 28   32      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 64    GPIO_1 29   33      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 65    GPIO_1 30   34      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 66    GPIO_1 31   35      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 67    GPIO_1 32   36      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 68    GPIO_1 33   37      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 69    GPIO_1 34   38      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 70    GPIO_1 35   39      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 71    GPIO_1 36   40      just GPIO
-
-                -- Remainder of 144 pin descriptors are unused
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-    	emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-		emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-		emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin);
-
-end package Pintypes; --PIN_Cramps_3x24_dpll_irq
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap.vhd b/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap.vhd
deleted file mode 100644
index 39196a15..00000000
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap.vhd
+++ /dev/null
@@ -1,200 +0,0 @@
-library IEEE;
-use IEEE.std_logic_1164.all;  -- defines std_logic types
-use IEEE.STD_LOGIC_ARITH.ALL;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
-
--- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics
--- http://www.mesanet.com
---
--- This program is is licensed under a disjunctive dual license giving you
--- the choice of one of the two following sets of free software/open source
--- licensing terms:
---
---    * GNU General Public License (GPL), version 2.0 or later
---    * 3-clause BSD License
---
---
--- The GNU GPL License:
---
---     This program is free software; you can redistribute it and/or modify
---     it under the terms of the GNU General Public License as published by
---     the Free Software Foundation; either version 2 of the License, or
---     (at your option) any later version.
---
---     This program is distributed in the hope that it will be useful,
---     but WITHOUT ANY WARRANTY; without even the implied warranty of
---     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
---     GNU General Public License for more details.
---
---     You should have received a copy of the GNU General Public License
---     along with this program; if not, write to the Free Software
---     Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
---
---
--- The 3-clause BSD License:
---
---     Redistribution and use in source and binary forms, with or without
---     modification, are permitted provided that the following conditions
---     are met:
---
---   * Redistributions of source code must retain the above copyright
---     notice, this list of conditions and the following disclaimer.
---
---   * Redistributions in binary form must reproduce the above
---     copyright notice, this list of conditions and the following
---     disclaimer in the documentation and/or other materials
---     provided with the distribution.
---
---   * Neither the name of Mesa Electronics nor the names of its
---     contributors may be used to endorse or promote products
---     derived from this software without specific prior written
---     permission.
---
---
--- Disclaimer:
---
---     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
---     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
---     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
---     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
---     COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
---     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
---     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
---     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
---     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
---     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
---     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
---     POSSIBILITY OF SUCH DAMAGE.
---
-
-use work.IDROMConst.all;
-
-package Pintypes is
-    constant ModuleID : ModuleIDType :=(
-    -- GTag             Version Clock           NumInst BaseAddr                    NumRegisters        Strides MultiRegs
-        (HM2DPLLTag,    x"00",  ClockLowTag,    x"01",  HM2DPLLBaseRateAddr&PadT,   HM2DPLLNumRegs,     x"00",  HM2DPLLMPBitMask),
-        (WatchDogTag,   x"00",  ClockLowTag,    x"01",  WatchDogTimeAddr&PadT,      WatchDogNumRegs,    x"00",  WatchDogMPBitMask),
-        (IOPortTag,     x"00",  ClockLowTag,    x"03",  PortAddr&PadT,              IOPortNumRegs,      x"00",  IOPortMPBitMask),
-        (QcountTag,     x"02",  ClockLowTag,    x"02",  QcounterAddr&PadT,          QCounterNumRegs,    x"00",  QCounterMPBitMask),
-        (StepGenTag,    x"02",  ClockLowTag,    x"0A",  StepGenRateAddr&PadT,       StepGenNumRegs,     x"00",  StepGenMPBitMask),
-        (PWMTag,        x"00",  ClockHighTag,   x"06",  PWMValAddr&PadT,            PWMNumRegs,         x"00",  PWMMPBitMask),
-        (LEDTag,        x"00",  ClockLowTag,    x"01",  LEDAddr&PadT,               LEDNumRegs,         x"00",  LEDMPBitMask),
-        (NANOADCTag,    x"00",  ClockLowTag,    x"08",  NANOADCAddr&PadT,           NANOADCNumRegs,     x"00",  NANOADCBitMask),
-        (CAPSENSETag,   x"00",  ClockLowTag,    x"04",  CAPSENSEAddr&PadT,          CAPSENSENumRegs,    x"00",  CAPSENSEBitMask),
-        (FWIDTag,       x"00",  ClockLowTag,    x"01",  FWIDAddr&PadT,              FWIDNumRegs,        x"00",  FWIDMPBitMask),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000")
-        );
-
-
-    constant PinDesc : PinDescType :=(
---      Base       Sec      Sec       Sec
---      func       unit     func      pin                   -- hostmot2 DE0-Nano        pin    Function
-        IOPortTag & x"00" & StepGenTag & StepGenStepPin,    -- I/O 00   GPIO_0 01    01        X Step
-        IOPortTag & x"00" & StepGenTag & StepGenDirPin,     -- I/O 01   GPIO_0 02    02        X Dir
-        IOPortTag & x"01" & StepGenTag & StepGenStepPin,    -- I/O 02   GPIO_0 03    03        Y Step
-        IOPortTag & x"01" & StepGenTag & StepGenDirPin,     -- I/O 03   GPIO_0 04    04         Y Dir
-        IOPortTag & x"02" & StepGenTag & StepGenStepPin,    -- I/O 04   GPIO_0 05    05        Z Step
-        IOPortTag & x"02" & StepGenTag & StepGenDirPin,     -- I/O 05   GPIO_0 06    06        Z Dir
-        IOPortTag & x"03" & StepGenTag & StepGenStepPin,    -- I/O 06   GPIO_0 07    07        E0 Step
-        IOPortTag & x"03" & StepGenTag & StepGenDirPin,     -- I/O 07   GPIO_0 08    08        E0 Dir
-        IOPortTag & x"04" & StepGenTag & StepGenStepPin,    -- I/O 08   GPIO_0 09    09        E1 Step
-        IOPortTag & x"04" & StepGenTag & StepGenDirPin,     -- I/O 09   GPIO_0 10    10        E1 Dir
-        IOPortTag & x"05" & StepGenTag & StepGenStepPin,    -- I/O 10   GPIO_0 11    13        E2 Step
-        IOPortTag & x"05" & StepGenTag & StepGenDirPin,     -- I/O 11   GPIO_0 12    14        E2 Dir
-        IOPortTag & x"06" & StepGenTag & StepGenStepPin,    -- I/O 12   GPIO_0 13    15        U Step
-        IOPortTag & x"06" & StepGenTag & StepGenDirPin,     -- I/O 13   GPIO_0 14    16        U Dir
-        IOPortTag & x"07" & StepGenTag & StepGenStepPin,    -- I/O 14   GPIO_0 15    17        V Step
-        IOPortTag & x"07" & StepGenTag & StepGenDirPin,     -- I/O 15   GPIO_0 16    18        V Dir
-        IOPortTag & x"08" & StepGenTag & StepGenStepPin,    -- I/O 16   GPIO_0 17    19        W Step
-        IOPortTag & x"08" & StepGenTag & StepGenDirPin,     -- I/O 17   GPIO_0 18    20        W Dir
-        IOPortTag & x"00" & PWMTag & PWMAOutPin,            -- I/O 18   GPIO_0 19    21        Spindle DAC PWM
-        IOPortTag & x"01" & PWMTag & PWMAOutPin,            -- I/O 19   GPIO_0 20    22        Spindle DAC PWM
-        IOPortTag & x"02" & PWMTag & PWMAOutPin,            -- I/O 20   GPIO_0 21    23        Spindle DAC PWM
-        IOPortTag & x"03" & PWMTag & PWMAOutPin,            -- I/O 21   GPIO_0 22    24        Spindle DAC PWM
-        IOPortTag & x"04" & PWMTag & PWMAOutPin,            -- I/O 22   GPIO_0 23    25        Spindle DAC PWM
-        IOPortTag & x"05" & PWMTag & PWMAOutPin,            -- I/O 23   GPIO_0 24    26        Spindle DAC PWM
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 24   GPIO_0 25    27        Limit X-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 25   GPIO_0 26    28        Limit X-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 26   GPIO_0 27    31        Limit Y-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 27   GPIO_0 27    32        Limit Y-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 28   GPIO_0 29    33        Limit Z-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 29   GPIO_0 30    34        Limit Z-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 30   GPIO_0 31    35        just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 31   GPIO_0 32    36        Led
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 32   GPIO_0 33    37        Axis_ENA_n
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 33   GPIO_0 34    38        Machine_Pwr
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 34   GPIO_0 35    39        Estop (In)
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 35   GPIO_0 36    40        Estop_Sw
-
---      Base       Sec      Sec       Sec
---      func       unit     func      pin                   -- hostmot2    DE0-Nano     pin    Function
-        IOPortTag & x"00" & CAPSENSETag & CapChargePin,     --    I/O 36    GPIO_1 01   01      CapSense charge
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin0,     --    I/O 37    GPIO_1 02   02      CapSense sense 0
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin1,     --    I/O 38    GPIO_1 03   03      CapSense sense 1
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin2,     --    I/O 39    GPIO_1 04   04      CapSense sense 2
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin3,     --    I/O 40    GPIO_1 05   05      CapSense sense 3
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 41    GPIO_1 06   06      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 42    GPIO_1 07   07      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 43    GPIO_1 08   08      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 44    GPIO_1 09   09      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 45    GPIO_1 10   10      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 46    GPIO_1 11   13      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 47    GPIO_1 12   14      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 48    GPIO_1 13   15      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 49    GPIO_1 14   16      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 50    GPIO_1 15   17      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 51    GPIO_1 16   18      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 52    GPIO_1 17   19      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 53    GPIO_1 18   20      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 54    GPIO_1 19   21      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 55    GPIO_1 20   22      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 56    GPIO_1 21   23      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 57    GPIO_1 22   24      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 58    GPIO_1 23   25      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 59    GPIO_1 24   26      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 60    GPIO_1 25   27      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 61    GPIO_1 26   28      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 62    GPIO_1 27   31      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 63    GPIO_1 28   32      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 64    GPIO_1 29   33      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 65    GPIO_1 30   34      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 66    GPIO_1 31   35      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 67    GPIO_1 32   36      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 68    GPIO_1 33   37      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 69    GPIO_1 34   38      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 70    GPIO_1 35   39      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 71    GPIO_1 36   40      just GPIO
-
-                -- Remainder of 144 pin descriptors are unused
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-    	emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-		emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-		emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin);
-
-end package Pintypes; --PIN_Cramps_3x24_dpll_irq
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap_enc.vhd b/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap_enc.vhd
deleted file mode 100644
index 90c96022..00000000
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap_enc.vhd
+++ /dev/null
@@ -1,200 +0,0 @@
-library IEEE;
-use IEEE.std_logic_1164.all;  -- defines std_logic types
-use IEEE.STD_LOGIC_ARITH.ALL;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
-
--- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics
--- http://www.mesanet.com
---
--- This program is is licensed under a disjunctive dual license giving you
--- the choice of one of the two following sets of free software/open source
--- licensing terms:
---
---    * GNU General Public License (GPL), version 2.0 or later
---    * 3-clause BSD License
---
---
--- The GNU GPL License:
---
---     This program is free software; you can redistribute it and/or modify
---     it under the terms of the GNU General Public License as published by
---     the Free Software Foundation; either version 2 of the License, or
---     (at your option) any later version.
---
---     This program is distributed in the hope that it will be useful,
---     but WITHOUT ANY WARRANTY; without even the implied warranty of
---     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
---     GNU General Public License for more details.
---
---     You should have received a copy of the GNU General Public License
---     along with this program; if not, write to the Free Software
---     Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
---
---
--- The 3-clause BSD License:
---
---     Redistribution and use in source and binary forms, with or without
---     modification, are permitted provided that the following conditions
---     are met:
---
---   * Redistributions of source code must retain the above copyright
---     notice, this list of conditions and the following disclaimer.
---
---   * Redistributions in binary form must reproduce the above
---     copyright notice, this list of conditions and the following
---     disclaimer in the documentation and/or other materials
---     provided with the distribution.
---
---   * Neither the name of Mesa Electronics nor the names of its
---     contributors may be used to endorse or promote products
---     derived from this software without specific prior written
---     permission.
---
---
--- Disclaimer:
---
---     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
---     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
---     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
---     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
---     COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
---     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
---     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
---     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
---     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
---     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
---     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
---     POSSIBILITY OF SUCH DAMAGE.
---
-
-use work.IDROMConst.all;
-
-package Pintypes is
-    constant ModuleID : ModuleIDType :=(
-    -- GTag             Version Clock           NumInst BaseAddr                    NumRegisters        Strides MultiRegs
-        (HM2DPLLTag,    x"00",  ClockLowTag,    x"01",  HM2DPLLBaseRateAddr&PadT,   HM2DPLLNumRegs,     x"00",  HM2DPLLMPBitMask),
-        (WatchDogTag,   x"00",  ClockLowTag,    x"01",  WatchDogTimeAddr&PadT,      WatchDogNumRegs,    x"00",  WatchDogMPBitMask),
-        (IOPortTag,     x"00",  ClockLowTag,    x"03",  PortAddr&PadT,              IOPortNumRegs,      x"00",  IOPortMPBitMask),
-        (QcountTag,     x"02",  ClockLowTag,    x"02",  QcounterAddr&PadT,          QCounterNumRegs,    x"00",  QCounterMPBitMask),
-        (StepGenTag,    x"02",  ClockLowTag,    x"0A",  StepGenRateAddr&PadT,       StepGenNumRegs,     x"00",  StepGenMPBitMask),
-        (PWMTag,        x"00",  ClockHighTag,   x"06",  PWMValAddr&PadT,            PWMNumRegs,         x"00",  PWMMPBitMask),
-        (LEDTag,        x"00",  ClockLowTag,    x"01",  LEDAddr&PadT,               LEDNumRegs,         x"00",  LEDMPBitMask),
-        (NANOADCTag,    x"00",  ClockLowTag,    x"08",  NANOADCAddr&PadT,           NANOADCNumRegs,     x"00",  NANOADCBitMask),
-        (CAPSENSETag,   x"00",  ClockLowTag,    x"04",  CAPSENSEAddr&PadT,          CAPSENSENumRegs,    x"00",  CAPSENSEBitMask),
-        (FWIDTag,       x"00",  ClockLowTag,    x"01",  FWIDAddr&PadT,              FWIDNumRegs,        x"00",  FWIDMPBitMask),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000")
-        );
-
-
-    constant PinDesc : PinDescType :=(
---      Base       Sec      Sec       Sec
---      func       unit     func      pin                   -- hostmot2 DE0-Nano        pin    Function
-        IOPortTag & x"00" & StepGenTag & StepGenStepPin,    -- I/O 00   GPIO_0 01    01        X Step
-        IOPortTag & x"00" & StepGenTag & StepGenDirPin,     -- I/O 01   GPIO_0 02    02        X Dir
-        IOPortTag & x"01" & StepGenTag & StepGenStepPin,    -- I/O 02   GPIO_0 03    03        Y Step
-        IOPortTag & x"01" & StepGenTag & StepGenDirPin,     -- I/O 03   GPIO_0 04    04         Y Dir
-        IOPortTag & x"02" & StepGenTag & StepGenStepPin,    -- I/O 04   GPIO_0 05    05        Z Step
-        IOPortTag & x"02" & StepGenTag & StepGenDirPin,     -- I/O 05   GPIO_0 06    06        Z Dir
-        IOPortTag & x"03" & StepGenTag & StepGenStepPin,    -- I/O 06   GPIO_0 07    07        E0 Step
-        IOPortTag & x"03" & StepGenTag & StepGenDirPin,     -- I/O 07   GPIO_0 08    08        E0 Dir
-        IOPortTag & x"04" & StepGenTag & StepGenStepPin,    -- I/O 08   GPIO_0 09    09        E1 Step
-        IOPortTag & x"04" & StepGenTag & StepGenDirPin,     -- I/O 09   GPIO_0 10    10        E1 Dir
-        IOPortTag & x"05" & StepGenTag & StepGenStepPin,    -- I/O 10   GPIO_0 11    13        E2 Step
-        IOPortTag & x"05" & StepGenTag & StepGenDirPin,     -- I/O 11   GPIO_0 12    14        E2 Dir
-        IOPortTag & x"06" & StepGenTag & StepGenStepPin,    -- I/O 12   GPIO_0 13    15        U Step
-        IOPortTag & x"06" & StepGenTag & StepGenDirPin,     -- I/O 13   GPIO_0 14    16        U Dir
-        IOPortTag & x"07" & StepGenTag & StepGenStepPin,    -- I/O 14   GPIO_0 15    17        V Step
-        IOPortTag & x"07" & StepGenTag & StepGenDirPin,     -- I/O 15   GPIO_0 16    18        V Dir
-        IOPortTag & x"08" & StepGenTag & StepGenStepPin,    -- I/O 16   GPIO_0 17    19        W Step
-        IOPortTag & x"08" & StepGenTag & StepGenDirPin,     -- I/O 17   GPIO_0 18    20        W Dir
-        IOPortTag & x"00" & PWMTag & PWMAOutPin,            -- I/O 18   GPIO_0 19    21        Spindle DAC PWM
-        IOPortTag & x"01" & PWMTag & PWMAOutPin,            -- I/O 19   GPIO_0 20    22        Spindle DAC PWM
-        IOPortTag & x"02" & PWMTag & PWMAOutPin,            -- I/O 20   GPIO_0 21    23        Spindle DAC PWM
-        IOPortTag & x"03" & PWMTag & PWMAOutPin,            -- I/O 21   GPIO_0 22    24        Spindle DAC PWM
-        IOPortTag & x"04" & PWMTag & PWMAOutPin,            -- I/O 22   GPIO_0 23    25        Spindle DAC PWM
-        IOPortTag & x"05" & PWMTag & PWMAOutPin,            -- I/O 23   GPIO_0 24    26        Spindle DAC PWM
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 24   GPIO_0 25    27        Limit X-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 25   GPIO_0 26    28        Limit X-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 26   GPIO_0 27    31        Limit Y-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 27   GPIO_0 27    32        Limit Y-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 28   GPIO_0 29    33        Limit Z-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 29   GPIO_0 30    34        Limit Z-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 30   GPIO_0 31    35        just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 31   GPIO_0 32    36        Led
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 32   GPIO_0 33    37        Axis_ENA_n
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 33   GPIO_0 34    38        Machine_Pwr
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 34   GPIO_0 35    39        Estop (In)
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 35   GPIO_0 36    40        Estop_Sw
-
---      Base       Sec      Sec       Sec
---      func       unit     func      pin                   -- hostmot2    DE0-Nano     pin    Function
-        IOPortTag & x"00" & CAPSENSETag & CapChargePin,     --    I/O 36    GPIO_1 01   01      CapSense charge
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin0,     --    I/O 37    GPIO_1 02   02      CapSense sense 0
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin1,     --    I/O 38    GPIO_1 03   03      CapSense sense 1
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin2,     --    I/O 39    GPIO_1 04   04      CapSense sense 2
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin3,     --    I/O 40    GPIO_1 05   05      CapSense sense 3
-        IOPortTag & x"00" & QCountTag & QCountIdxPin,       --    I/O 41    GPIO_1 06   06      Encoder Z
-        IOPortTag & x"00" & QCountTag & QCountQBPin,        --    I/O 42    GPIO_1 07   07      Encoder B
-        IOPortTag & x"00" & QCountTag & QCountQAPin,        --    I/O 43    GPIO_1 08   08      Encoder A
-        IOPortTag & x"01" & QCountTag & QCountIdxPin,       --    I/O 44    GPIO_1 09   09      Encoder Z
-        IOPortTag & x"01" & QCountTag & QCountQBPin,        --    I/O 45    GPIO_1 10   10      Encoder B
-        IOPortTag & x"01" & QCountTag & QCountQAPin,        --    I/O 46    GPIO_1 11   13      Encoder A
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 47    GPIO_1 12   14      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 48    GPIO_1 13   15      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 49    GPIO_1 14   16      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 50    GPIO_1 15   17      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 51    GPIO_1 16   18      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 52    GPIO_1 17   19      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 53    GPIO_1 18   20      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 54    GPIO_1 19   21      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 55    GPIO_1 20   22      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 56    GPIO_1 21   23      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 57    GPIO_1 22   24      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 58    GPIO_1 23   25      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 59    GPIO_1 24   26      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 60    GPIO_1 25   27      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 61    GPIO_1 26   28      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 62    GPIO_1 27   31      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 63    GPIO_1 28   32      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 64    GPIO_1 29   33      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 65    GPIO_1 30   34      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 66    GPIO_1 31   35      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 67    GPIO_1 32   36      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 68    GPIO_1 33   37      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 69    GPIO_1 34   38      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 70    GPIO_1 35   39      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 71    GPIO_1 36   40      just GPIO
-
-                -- Remainder of 144 pin descriptors are unused
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-    	emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-		emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-		emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin);
-
-end package Pintypes; --PIN_Cramps_3x24_dpll_irq
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap_spi.vhd b/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap_spi.vhd
deleted file mode 100644
index 2ee9230a..00000000
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/PIN_3x24_cap_spi.vhd
+++ /dev/null
@@ -1,200 +0,0 @@
-library IEEE;
-use IEEE.std_logic_1164.all;  -- defines std_logic types
-use IEEE.STD_LOGIC_ARITH.ALL;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
-
--- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics
--- http://www.mesanet.com
---
--- This program is is licensed under a disjunctive dual license giving you
--- the choice of one of the two following sets of free software/open source
--- licensing terms:
---
---    * GNU General Public License (GPL), version 2.0 or later
---    * 3-clause BSD License
---
---
--- The GNU GPL License:
---
---     This program is free software; you can redistribute it and/or modify
---     it under the terms of the GNU General Public License as published by
---     the Free Software Foundation; either version 2 of the License, or
---     (at your option) any later version.
---
---     This program is distributed in the hope that it will be useful,
---     but WITHOUT ANY WARRANTY; without even the implied warranty of
---     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
---     GNU General Public License for more details.
---
---     You should have received a copy of the GNU General Public License
---     along with this program; if not, write to the Free Software
---     Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
---
---
--- The 3-clause BSD License:
---
---     Redistribution and use in source and binary forms, with or without
---     modification, are permitted provided that the following conditions
---     are met:
---
---   * Redistributions of source code must retain the above copyright
---     notice, this list of conditions and the following disclaimer.
---
---   * Redistributions in binary form must reproduce the above
---     copyright notice, this list of conditions and the following
---     disclaimer in the documentation and/or other materials
---     provided with the distribution.
---
---   * Neither the name of Mesa Electronics nor the names of its
---     contributors may be used to endorse or promote products
---     derived from this software without specific prior written
---     permission.
---
---
--- Disclaimer:
---
---     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
---     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
---     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
---     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
---     COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
---     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
---     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
---     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
---     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
---     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
---     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
---     POSSIBILITY OF SUCH DAMAGE.
---
-
-use work.IDROMConst.all;
-
-package Pintypes is
-    constant ModuleID : ModuleIDType :=(
-    -- GTag             Version Clock           NumInst BaseAddr                    NumRegisters        Strides MultiRegs
-        (HM2DPLLTag,    x"00",  ClockLowTag,    x"01",  HM2DPLLBaseRateAddr&PadT,   HM2DPLLNumRegs,     x"00",  HM2DPLLMPBitMask),
-        (WatchDogTag,   x"00",  ClockLowTag,    x"01",  WatchDogTimeAddr&PadT,      WatchDogNumRegs,    x"00",  WatchDogMPBitMask),
-        (IOPortTag,     x"00",  ClockLowTag,    x"03",  PortAddr&PadT,              IOPortNumRegs,      x"00",  IOPortMPBitMask),
-        (QcountTag,     x"02",  ClockLowTag,    x"02",  QcounterAddr&PadT,          QCounterNumRegs,    x"00",  QCounterMPBitMask),
-        (StepGenTag,    x"02",  ClockLowTag,    x"0A",  StepGenRateAddr&PadT,       StepGenNumRegs,     x"00",  StepGenMPBitMask),
-        (PWMTag,        x"00",  ClockHighTag,   x"06",  PWMValAddr&PadT,            PWMNumRegs,         x"00",  PWMMPBitMask),
-        (LEDTag,        x"00",  ClockLowTag,    x"01",  LEDAddr&PadT,               LEDNumRegs,         x"00",  LEDMPBitMask),
-        (NANOADCTag,    x"00",  ClockLowTag,    x"08",  NANOADCAddr&PadT,           NANOADCNumRegs,     x"00",  NANOADCBitMask),
-        (CAPSENSETag,   x"00",  ClockLowTag,    x"04",  CAPSENSEAddr&PadT,          CAPSENSENumRegs,    x"00",  CAPSENSEBitMask),
-        (SPITag,        x"00",  ClockLowTag,    x"01",  SPIDataAddr&PadT,           SPINumRegs,         x"00",  SPIMPBitMask),
-        (FWIDTag,       x"00",  ClockLowTag,    x"01",  FWIDAddr&PadT,              FWIDNumRegs,        x"00",  FWIDMPBitMask),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000"),
-        (NullTag,       x"00",  NullTag,        x"00",  NullAddr&PadT,              x"00",              x"00",  x"00000000")
-        );
-
-
-    constant PinDesc : PinDescType :=(
---      Base       Sec      Sec       Sec
---      func       unit     func      pin                   -- hostmot2 DE0-Nano        pin    Function
-        IOPortTag & x"00" & StepGenTag & StepGenStepPin,    -- I/O 00   GPIO_0 01    01        X Step
-        IOPortTag & x"00" & StepGenTag & StepGenDirPin,     -- I/O 01   GPIO_0 02    02        X Dir
-        IOPortTag & x"01" & StepGenTag & StepGenStepPin,    -- I/O 02   GPIO_0 03    03        Y Step
-        IOPortTag & x"01" & StepGenTag & StepGenDirPin,     -- I/O 03   GPIO_0 04    04         Y Dir
-        IOPortTag & x"02" & StepGenTag & StepGenStepPin,    -- I/O 04   GPIO_0 05    05        Z Step
-        IOPortTag & x"02" & StepGenTag & StepGenDirPin,     -- I/O 05   GPIO_0 06    06        Z Dir
-        IOPortTag & x"03" & StepGenTag & StepGenStepPin,    -- I/O 06   GPIO_0 07    07        E0 Step
-        IOPortTag & x"03" & StepGenTag & StepGenDirPin,     -- I/O 07   GPIO_0 08    08        E0 Dir
-        IOPortTag & x"04" & StepGenTag & StepGenStepPin,    -- I/O 08   GPIO_0 09    09        E1 Step
-        IOPortTag & x"04" & StepGenTag & StepGenDirPin,     -- I/O 09   GPIO_0 10    10        E1 Dir
-        IOPortTag & x"05" & StepGenTag & StepGenStepPin,    -- I/O 10   GPIO_0 11    13        E2 Step
-        IOPortTag & x"05" & StepGenTag & StepGenDirPin,     -- I/O 11   GPIO_0 12    14        E2 Dir
-        IOPortTag & x"06" & StepGenTag & StepGenStepPin,    -- I/O 12   GPIO_0 13    15        U Step
-        IOPortTag & x"06" & StepGenTag & StepGenDirPin,     -- I/O 13   GPIO_0 14    16        U Dir
-        IOPortTag & x"07" & StepGenTag & StepGenStepPin,    -- I/O 14   GPIO_0 15    17        V Step
-        IOPortTag & x"07" & StepGenTag & StepGenDirPin,     -- I/O 15   GPIO_0 16    18        V Dir
-        IOPortTag & x"08" & StepGenTag & StepGenStepPin,    -- I/O 16   GPIO_0 17    19        W Step
-        IOPortTag & x"08" & StepGenTag & StepGenDirPin,     -- I/O 17   GPIO_0 18    20        W Dir
-        IOPortTag & x"00" & PWMTag & PWMAOutPin,            -- I/O 18   GPIO_0 19    21        Spindle DAC PWM
-        IOPortTag & x"01" & PWMTag & PWMAOutPin,            -- I/O 19   GPIO_0 20    22        Spindle DAC PWM
-        IOPortTag & x"02" & PWMTag & PWMAOutPin,            -- I/O 20   GPIO_0 21    23        Spindle DAC PWM
-        IOPortTag & x"03" & PWMTag & PWMAOutPin,            -- I/O 21   GPIO_0 22    24        Spindle DAC PWM
-        IOPortTag & x"04" & PWMTag & PWMAOutPin,            -- I/O 22   GPIO_0 23    25        Spindle DAC PWM
-        IOPortTag & x"05" & PWMTag & PWMAOutPin,            -- I/O 23   GPIO_0 24    26        Spindle DAC PWM
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 24   GPIO_0 25    27        Limit X-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 25   GPIO_0 26    28        Limit X-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 26   GPIO_0 27    31        Limit Y-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 27   GPIO_0 27    32        Limit Y-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 28   GPIO_0 29    33        Limit Z-Min
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 29   GPIO_0 30    34        Limit Z-Max
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 30   GPIO_0 31    35        just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 31   GPIO_0 32    36        Led
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 32   GPIO_0 33    37        Axis_ENA_n
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 33   GPIO_0 34    38        Machine_Pwr
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 34   GPIO_0 35    39        Estop (In)
-        IOPortTag & x"00" & NullTag & NullPin,              -- I/O 35   GPIO_0 36    40        Estop_Sw
-
---      Base       Sec      Sec       Sec
---      func       unit     func      pin                   -- hostmot2    DE0-Nano     pin    Function
-        IOPortTag & x"00" & CAPSENSETag & CapChargePin,     --    I/O 36    GPIO_1 01   01      CapSense charge
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin0,     --    I/O 37    GPIO_1 02   02      CapSense sense 0
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin1,     --    I/O 38    GPIO_1 03   03      CapSense sense 1
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin2,     --    I/O 39    GPIO_1 04   04      CapSense sense 2
-        IOPortTag & x"00" & CAPSENSETag & CapSensePin3,     --    I/O 40    GPIO_1 05   05      CapSense sense 3
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 41    GPIO_1 06   06      just GPIO
-        IOPortTag & x"00" & SPITag & SPIFramePin,           --    I/O 42    GPIO_1 07   07      SPI Frame
-        IOPortTag & x"00" & SPITag & SPIOutPin,             --    I/O 43    GPIO_1 08   08      SPI Out
-        IOPortTag & x"00" & SPITag & SPIClkPin,             --    I/O 44    GPIO_1 09   09      SPI Clk
-        IOPortTag & x"00" & SPITag & SPIInPin,              --    I/O 45    GPIO_1 10   10      SPI In
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 46    GPIO_1 11   13      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 47    GPIO_1 12   14      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 48    GPIO_1 13   15      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 49    GPIO_1 14   16      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 50    GPIO_1 15   17      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 51    GPIO_1 16   18      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 52    GPIO_1 17   19      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 53    GPIO_1 18   20      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 54    GPIO_1 19   21      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 55    GPIO_1 20   22      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 56    GPIO_1 21   23      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 57    GPIO_1 22   24      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 58    GPIO_1 23   25      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 59    GPIO_1 24   26      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 60    GPIO_1 25   27      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 61    GPIO_1 26   28      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 62    GPIO_1 27   31      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 63    GPIO_1 28   32      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 64    GPIO_1 29   33      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 65    GPIO_1 30   34      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 66    GPIO_1 31   35      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 67    GPIO_1 32   36      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 68    GPIO_1 33   37      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 69    GPIO_1 34   38      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 70    GPIO_1 35   39      just GPIO
-        IOPortTag & x"00" & NullTag & NullPin,              --    I/O 71    GPIO_1 36   40      just GPIO
-
-                -- Remainder of 144 pin descriptors are unused
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-        emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-    	emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-		emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
-		emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin);
-
-end package Pintypes; --PIN_Cramps_3x24_dpll_irq
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap.sv b/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap.sv
deleted file mode 100644
index ab5a52ca..00000000
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap.sv
+++ /dev/null
@@ -1,34 +0,0 @@
-package boardtype;
-// DE0-Nano Dev kit and I/O adaptors specific info
-//   {STRAIGHT=0,DB25=1} BoardAdaptor;
-
-parameter BoardAdaptor          = 0;
-    parameter ClockHigh         = 200000000;    // 200 MHz
-    parameter ClockMed          = 100000000;    // 100 MHz
-    parameter ClockLow          =  50000000;    //  50 MHz
-//    parameter BoardNameLow      = 32'h41524554;        // "TERA"
-//    parameter BoardNameHigh     = 32'h4E304544;        // "DE0N"
-    parameter BoardNameLow      = 32'h4153454D;        // "MESA"
-    parameter BoardNameHigh     = 32'h35324935;        // "5I25"
-    parameter FPGASize          = 9;            // Reported as 32-bit value in IDROM.vhd (9 matches Mesanet value for 5i25)
-                                                    //   FIXME: Figure out Mesanet encoding and put something sensible here
-    parameter FPGAPins          = 144;    // Total Number of available I/O pins for Hostmot2 use Reported as 32-bit value in IDROM.vhd
-                                                    // Proposal: On DE0 NANO board Limit to total count of gpios + arduinoconnectors + ltc + adc I/Os
-                                            //   Maximum of 144 pindesc entries currently hard-coded in IDROM.vhd
-    parameter IOPorts           = 3;            // Number of external ports (DE0-Nano_DB25 can have 2 on each 40-pin expansion header)
-    parameter IOWidth           = 72;            // Number of total I/O pins = IOPorts * PortWidth
-    parameter PortWidth         = 24;            // Number of I/O pins per port: 17 per DB25
-    parameter LIOWidth          = 0;            // Number of local I/Os (used for on-board serial-port on Mesanet cards)
-    parameter LEDCount          = 0;            // Number of LEDs
-    parameter SepClocks         = "true";            // Deprecated
-    parameter OneWS             = "true";            // Deprecated
-    parameter BusWidth          = 32;
-    parameter AddrWidth         = 16;
-
-    parameter GPIOWidth         = 36;
-    parameter NumGPIO           = 2;
-    parameter MuxGPIOIOWidth    = IOWidth/NumGPIO;
-    parameter MuxLedWidth       = LEDCount/NumGPIO;
-    parameter ADC               = "DE0-Nano-SoC";
-    parameter Capsense          = 1;
-endpackage //_HeaderIncluded
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/hm3_DE10_Nano_FB_Cramps.in b/HW/hm2/config/DE10_Nano_FB_Cramps/hm3_DE10_Nano_FB_Cramps.in
deleted file mode 100644
index a2bd7669..00000000
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/hm3_DE10_Nano_FB_Cramps.in
+++ /dev/null
@@ -1,2 +0,0 @@
-set_global_assignment -name VHDL_FILE ../../hm2/config/DE10_Nano_FB_Cramps/hostmot3_cfg.vhd
-set_global_assignment -name SYSTEMVERILOG_FILE ../../hm2/config/DE10_Nano_FB_Cramps/atlas_%CONFIG%.sv
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/hm3_pin_config.in b/HW/hm2/config/DE10_Nano_FB_Cramps/hm3_pin_config.in
deleted file mode 100644
index f025ddf7..00000000
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/hm3_pin_config.in
+++ /dev/null
@@ -1,2 +0,0 @@
-# I/O Daughterboard adaptor specific:
-set_global_assignment -name VHDL_FILE ../../hm2/config/DE10_Nano_FB_Cramps/PIN_%CONFIG%.vhd -library pin
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/hostmot3_cfg.vhd b/HW/hm2/config/DE10_Nano_FB_Cramps/hostmot3_cfg.vhd
deleted file mode 100644
index 6324825d..00000000
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/hostmot3_cfg.vhd
+++ /dev/null
@@ -1,178 +0,0 @@
-library IEEE;
-use IEEE.std_logic_1164.all;  -- defines std_logic types
-use IEEE.std_logic_ARITH.ALL;
-use IEEE.std_logic_UNSIGNED.ALL;
---
--- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics
--- http://www.mesanet.com
---
--- This program is is licensed under a disjunctive dual license giving you
--- the choice of one of the two following sets of free software/open source
--- licensing terms:
---
---    * GNU General Public License (GPL), version 2.0 or later
---    * 3-clause BSD License
---
---
--- The GNU GPL License:
---
---     This program is free software; you can redistribute it and/or modify
---     it under the terms of the GNU General Public License as published by
---     the Free Software Foundation; either version 2 of the License, or
---     (at your option) any later version.
---
---     This program is distributed in the hope that it will be useful,
---     but WITHOUT ANY WARRANTY; without even the implied warranty of
---     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
---     GNU General Public License for more details.
---
---     You should have received a copy of the GNU General Public License
---     along with this program; if not, write to the Free Software
---     Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
---
---
--- The 3-clause BSD License:
---
---     Redistribution and use in source and binary forms, with or without
---     modification, are permitted provided that the following conditions
---     are met:
---
---         * Redistributions of source code must retain the above copyright
---           notice, this list of conditions and the following disclaimer.
---
---         * Redistributions in binary form must reproduce the above
---           copyright notice, this list of conditions and the following
---           disclaimer in the documentation and/or other materials
---           provided with the distribution.
---
---         * Neither the name of Mesa Electronics nor the names of its
---           contributors may be used to endorse or promote products
---           derived from this software without specific prior written
---           permission.
---
---
--- Disclaimer:
---
---     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
---     "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
---     LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
---     FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
---     COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
---     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
---     BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
---     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
---     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
---     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
---     ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
---     POSSIBILITY OF SUCH DAMAGE.
---
-
-library pin;
-use pin.Pintypes.all;
-
-entity HostMot3_cfg is
-   	generic
-	(
---	ThePinDesc: PinDescType;
---	TheModuleID: ModuleIDType;
---	IDROMType: integer;
-	SepClocks: boolean;
-	OneWS: boolean;
---	UseStepGenPrescaler : boolean;
---	UseIRQLogic: boolean;
---	PWMRefWidth: integer;
---	UseWatchDog: boolean;
---	OffsetToModules: integer;
---	OffsetToPinDesc: integer;
-	ClockHigh: integer;
-	ClockMed: integer;
-	ClockLow: integer;
-	BoardNameLow : std_Logic_Vector(31 downto 0);
-	BoardNameHigh : std_Logic_Vector(31 downto 0);
-	FPGASize: integer;
-	FPGAPins: integer;
-	IOPorts: integer;
-	IOWidth: integer;
-	PortWidth: integer;
-	LIOWidth: integer;
-	LEDCount: integer;
-	BusWidth: integer;
-	AddrWidth: integer
---	InstStride0: integer;
---	InstStride1: integer;
---	RegStride0: integer;
---	RegStride1: integer
-		);
-   port (
-     -- Generic 32  bit bus interface signals --
-    ibustop			: in std_logic_vector(BusWidth -1 downto 0);
-    obustop			: out std_logic_vector(BusWidth -1 downto 0);
-    addr				: in std_logic_vector(AddrWidth -1 downto 2);
-    readstb			: in std_logic;
-    writestb		: in std_logic;
-    clklow			: in std_logic;
-    clkmed			: in std_logic;
-    clkhigh			: in std_logic;
-    intirq			: out std_logic;
-    dreq				: out std_logic;
-    demandmode		: out std_logic;
-    iobitsouttop	: out std_logic_vector (IOWidth -1 downto 0);
-    iobitsintop	: in std_logic_vector (IOWidth -1 downto 0);
---     liobits			: inout std_logic_vector (LIOWidth -1 downto 0);
---     rates			: out std_logic_vector (4 downto 0);
-    leds				: out std_logic_vector(LEDCount-1 downto 0) );
-end HostMot3_cfg;
-
-architecture arch of HostMot3_cfg is
-
-begin
-
-    aHostMot3_cfg: entity work.HostMot3
-    generic map (
-        ThePinDesc              => PinDesc,
-        TheModuleID             => ModuleID,
-        IDROMType               => 3,
-        SepClocks               => SepClocks,
-        OneWS                   => OneWS,
-        UseStepGenPrescaler     => true,
-        UseIRQLogic             => true,
-        PWMRefWidth             => 13,
-        UseWatchDog             => true,
-        OffsetToModules         => 64,
-        OffsetToPinDesc         => 448,
-        ClockHigh               => ClockHigh,
-        ClockMed                => ClockMed,
-        ClockLow                => ClockLow,
-        BoardNameLow            => BoardNameLow,
-        BoardNameHigh           => BoardNameHigh,
-        FPGASize                => FPGASize,
-        FPGAPins                => FPGAPins,
-        IOPorts                 => IOPorts,
-        IOWidth                 => IOWidth,
-        PortWidth               => PortWidth,
-        LIOWidth                => LIOWidth,
-        LEDCount                => LEDCount,
-        BusWidth                => BusWidth,
-        AddrWidth               => AddrWidth,
-        InstStride0             => 4,
-        InstStride1             => 64,
-        RegStride0              => 256,
-        RegStride1              => 256 )
-    port map (
-        ibustop                 => ibustop,
-        obustop                 => obustop,
-        addr                    => addr,
-        readstb                 => readstb,
-        writestb                => writestb,
-        clklow                  => clklow,
-        clkmed                  => clkmed,
-        clkhigh                 => clkhigh,
-        intirq                  => intirq,
-        dreq                    => dreq,
-        demandmode              => demandmode,
-        iobitsouttop            => iobitsouttop,
-        iobitsintop             => iobitsintop,
---         liobits                 => liobits,
---         rates                   => rates,
-        leds                    => leds );
-end arch;
\ No newline at end of file
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24.vhd b/HW/hm2/config/DExx_Nano_xxx_Cramps/PIN_3x24.vhd
similarity index 100%
rename from HW/hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24.vhd
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/PIN_3x24.vhd
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24_cap.vhd b/HW/hm2/config/DExx_Nano_xxx_Cramps/PIN_3x24_cap.vhd
similarity index 100%
rename from HW/hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24_cap.vhd
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/PIN_3x24_cap.vhd
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24_cap_enc.vhd b/HW/hm2/config/DExx_Nano_xxx_Cramps/PIN_3x24_cap_enc.vhd
similarity index 100%
rename from HW/hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24_cap_enc.vhd
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/PIN_3x24_cap_enc.vhd
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24_cap_spi.vhd b/HW/hm2/config/DExx_Nano_xxx_Cramps/PIN_3x24_cap_spi.vhd
similarity index 100%
rename from HW/hm2/config/DE0_Nano_SoC_Cramps/PIN_3x24_cap_spi.vhd
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/PIN_3x24_cap_spi.vhd
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24.sv b/HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24.sv
similarity index 98%
rename from HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24.sv
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24.sv
index 3fd7385a..cf528b2c 100644
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24.sv
+++ b/HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24.sv
@@ -31,4 +31,5 @@ parameter BoardAdaptor          = 0;
     parameter MuxLedWidth       = LEDCount/NumGPIO;
     parameter ADC               = "DE0-Nano-SoC";
     parameter Capsense          = 0;
+    parameter NumSense          = 0;
 endpackage //_HeaderIncluded
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap.sv b/HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap.sv
similarity index 98%
rename from HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap.sv
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap.sv
index ab5a52ca..77762507 100644
--- a/HW/hm2/config/DE0_Nano_SoC_Cramps/atlas_3x24_cap.sv
+++ b/HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap.sv
@@ -31,4 +31,5 @@ parameter BoardAdaptor          = 0;
     parameter MuxLedWidth       = LEDCount/NumGPIO;
     parameter ADC               = "DE0-Nano-SoC";
     parameter Capsense          = 1;
+    parameter NumSense          = 4;
 endpackage //_HeaderIncluded
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap_enc.sv b/HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap_enc.sv
similarity index 98%
rename from HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap_enc.sv
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap_enc.sv
index ab5a52ca..77762507 100644
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap_enc.sv
+++ b/HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap_enc.sv
@@ -31,4 +31,5 @@ parameter BoardAdaptor          = 0;
     parameter MuxLedWidth       = LEDCount/NumGPIO;
     parameter ADC               = "DE0-Nano-SoC";
     parameter Capsense          = 1;
+    parameter NumSense          = 4;
 endpackage //_HeaderIncluded
diff --git a/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap_spi.sv b/HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap_spi.sv
similarity index 98%
rename from HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap_spi.sv
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap_spi.sv
index ab5a52ca..77762507 100644
--- a/HW/hm2/config/DE10_Nano_FB_Cramps/atlas_3x24_cap_spi.sv
+++ b/HW/hm2/config/DExx_Nano_xxx_Cramps/atlas_3x24_cap_spi.sv
@@ -31,4 +31,5 @@ parameter BoardAdaptor          = 0;
     parameter MuxLedWidth       = LEDCount/NumGPIO;
     parameter ADC               = "DE0-Nano-SoC";
     parameter Capsense          = 1;
+    parameter NumSense          = 4;
 endpackage //_HeaderIncluded
diff --git a/HW/hm2/config/DExx_Nano_xxx_Cramps/hm3_DExx_Nano_xxx_Cramps.in b/HW/hm2/config/DExx_Nano_xxx_Cramps/hm3_DExx_Nano_xxx_Cramps.in
new file mode 100644
index 00000000..81ce9e5f
--- /dev/null
+++ b/HW/hm2/config/DExx_Nano_xxx_Cramps/hm3_DExx_Nano_xxx_Cramps.in
@@ -0,0 +1,2 @@
+set_global_assignment -name VHDL_FILE ../../hm2/config/DExx_Nano_xxx_Cramps/hostmot3_cfg.vhd
+set_global_assignment -name SYSTEMVERILOG_FILE ../../hm2/config/DExx_Nano_xxx_Cramps/atlas_%CONFIG%.sv
diff --git a/HW/hm2/config/DExx_Nano_xxx_Cramps/hm3_pin_config.in b/HW/hm2/config/DExx_Nano_xxx_Cramps/hm3_pin_config.in
new file mode 100644
index 00000000..2108e3af
--- /dev/null
+++ b/HW/hm2/config/DExx_Nano_xxx_Cramps/hm3_pin_config.in
@@ -0,0 +1,2 @@
+# I/O Daughterboard adaptor specific:
+set_global_assignment -name VHDL_FILE ../../hm2/config/DExx_Nano_xxx_Cramps/PIN_%CONFIG%.vhd -library pin
diff --git a/HW/hm2/config/DE0_Nano_SoC_Cramps/hostmot3_cfg.vhd b/HW/hm2/config/DExx_Nano_xxx_Cramps/hostmot3_cfg.vhd
similarity index 100%
rename from HW/hm2/config/DE0_Nano_SoC_Cramps/hostmot3_cfg.vhd
rename to HW/hm2/config/DExx_Nano_xxx_Cramps/hostmot3_cfg.vhd