{"payload":{"header_redesign_enabled":false,"results":[{"id":"639982602","archived":false,"color":"#adb2cb","followers":0,"has_funding_file":false,"hl_name":"mahdihaghverdi/cpu","hl_trunc_description":"Simple single cycle CPU written in VHDL","language":"VHDL","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":639982602,"name":"cpu","owner_id":96727989,"owner_login":"mahdihaghverdi","updated_at":"2023-07-09T14:04:53.085Z","has_issues":true}},"sponsorable":false,"topics":["assembler","hardware","vhdl","vhdl-examples","vhdl-coursework"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":99,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Amahdihaghverdi%252Fcpu%2B%2Blanguage%253AVHDL","metadata":null,"csrf_tokens":{"/mahdihaghverdi/cpu/star":{"post":"2X6CYJi0Q57SxWQ45mMTc-8QzB5TgmZw1tVIuPbNEtq0PH1Sb_nk-FnuoeR3C2_Ua6L51sBLfT0aPYwl10DR_Q"},"/mahdihaghverdi/cpu/unstar":{"post":"i3-o4LoWZIvjI_ieyZxzus0fqyPHtjWzhqmUkj45JVdi9SFYvXu4rnRyHGHTqFR9srALTJlF1NLdtVBO4k8iKA"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"FJSv9QciF18_LnRMeI_rpMWX9kkeBmN3VL0BNY2qTOQ8nFyE4q0EVF60cNzAqGGONrrCLylv49o7kk_XtTsTUQ"}}},"title":"Repository search results"}