Permalink
Browse files

Better placer cost table

  • Loading branch information...
1 parent e7eb465 commit 739820bb6d00b67bedb009191d557ca35dbc6d8f @makomk committed Aug 22, 2012
Showing with 2 additions and 2 deletions.
  1. +2 −2 FPGA_project/Src/icarus.xise
@@ -131,7 +131,7 @@
<property xil_pn:name="Evaluation Development Board" xil_pn:value="" xil_pn:valueState="non-default"/>
<property xil_pn:name="Exclude Compilation of Deprecated EDK Cores" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Exclude Compilation of EDK Sub-Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
- <property xil_pn:name="Extra Cost Tables Map" xil_pn:value="4" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Extra Cost Tables Map" xil_pn:value="5" xil_pn:valueState="non-default"/>
<property xil_pn:name="Extra Effort (Highest PAR level only)" xil_pn:value="Normal" xil_pn:valueState="non-default"/>
<property xil_pn:name="FPGA Start-Up Clock" xil_pn:value="CCLK" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Auto" xil_pn:valueState="default"/>
@@ -317,7 +317,7 @@
<property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="Default" xil_pn:valueState="default"/>
<property xil_pn:name="Speed Grade" xil_pn:value="-2" xil_pn:valueState="non-default"/>
- <property xil_pn:name="Starting Placer Cost Table (1-100) Map spartan6" xil_pn:value="9" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Starting Placer Cost Table (1-100) Map spartan6" xil_pn:value="38" xil_pn:valueState="non-default"/>
<property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
<property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/>
<property xil_pn:name="Timing Mode Map" xil_pn:value="Performance Evaluation" xil_pn:valueState="default"/>

0 comments on commit 739820b

Please sign in to comment.