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// license:BSD-3-Clause
// copyright-holders:Ville Linde
/* Konami Hornet System
Driver by Ville Linde
***************************************************************************
Konami 'Hornet' Hardware, Konami, 1997-2000
Hardware info by Guru
Last updated: 17th February, 2026
---------------------------------
Known games on this hardware include....
Game (C) Year
----------------------------------------------
Gradius 4 : Fukkatsu Konami 1998
NBA Play by Play Konami 1998
Teraburst Konami 1998
Thrill Drive Konami 1999
Silent Scope Konami 1999
Silent Scope 2 Konami 2000
Quick hardware overview:
GN715 CPU Board:
----------------
IBM PowerPC 403GA at 32MHz (main CPU)
Motorola MC68EC000 at 16MHz (sound CPU)
Konami K056800 (MIRAC), sound system interface
Ricoh RF5c400 sound chip
GN715 GFX Board:
----------------
Analog Devices ADSP-21062 SHARC DSP at 36MHz
Konami 0000037122 (2D Tilemap)
Konami 0000033906 (PCI bridge)
3DFX 500-0003-03 (Voodoo) FBI with 2MB RAM
3DFX 500-0004-02 (Voodoo) TMU with 4MB RAM
GQ871 GFX Board:
----------------
Analog Devices ADSP-21062 SHARC DSP at 36MHz
Konami 0000037122 (2D Tilemap)
Konami 0000033906 (PCI bridge)
3DFX 500-0009-01 (Voodoo 2) FBI with 2MB RAM
3DFX 500-0010-01 (Voodoo 2) TMU with 4MB RAM
Specific game hardware configurations:
-------------------------------------
Game KONAMI ID CPU PCB GFX Board(s) notes
----------------------------------------------------------------------
Gradius 4 GX837 GN715(A) GN715(B)
NBA Play By Play GX778 GN715(A) GN715(B)
Teraburst GX715 GN715(A) GN715(B) GN680(E) I/O board
Thrill Drive GE713UF GN715(A) GN715(B) GN676-PWB(H)A LAN PCB (also used for protection)
Silent Scope GQ830 GN715(A) 2x GN715(B)
Silent Scope GQ830 GN715(A) 2x GQ871(B)
Silent Scope 2 GQ931 GN715(A) 2x GQ871(B) GQ931(H) LAN PCB \ Also used for protection and
Silent Scope 2 GQ931 GN715(A) 2x GN715(B) GQ931(H) LAN PCB / mandatory (no boot if missing)
PCB Layouts
-----------
Top Board
GN715 PWB(A)A
|--------------------------------------------------------------|
| SP485CS CN10 CN11 CN9 JP8 JP9 JP10 JP11|
|CN19 PAL1 |
|CN21 JP13 PAL2 68EC000 EPROM.7S |
| NE5532 PAL3 CN12|
| JP12 JP16 DRM1M4SJ8 CN13|
| NE5532 MASKROM.9P MASKROM.9T |
| SM5877 JP15 RF5C400 |
|CN18 MASKROM.12P MASKROM.12T|
| SM5877 16.9344MHz |
|CN14 SRAM256K MASKROM.14P MASKROM.14T|
| |
|CN16 SRAM256K MASKROM.16P MASKROM.16T|
| ADC12138 |
| 056800 JP5 |
| JP4 |
| MACH111 JP3 |---------| |
| TEST_SW EPROM.22P | | |
|CN1 DRAM16X16 |PPC403GA | |
| EPROM.25P | | |
| | | |
| DRAM16X16 EPROM.27P |---------| |
| 4AK16 JP6|
| |
|CN3 |
| 0038323 PAL4 7.3728MHz|
| E9825 058232 CN2 |
| 50.000MHz|
| RESET_SW CN5 JP1 JP2 |
|M48T58Y-70PC1.35D CN4 CN6 64.000MHz|
|--------------------------------------------------------------|
Notes:
DRM1M4SJ8 - Fujitsu 81C4256 256Kx4 DRAM (SOJ24)
SRAM256K - Cypress CY7C199 32kx8 SRAM (SOJ28)
DRAM16X16 - Fujitsu 8118160A-60 16megx16 DRAM (SOJ42)
0038323 E9825 - SOIC8 Secured X76F041 EEPROM. There is a similar chip in the security cart of System573.
M48T58Y-70PC1 - 8192-byte ST Timekeeper NVRAM with Real-Time Clock. Used for protection but also saves settings, book-keeping and high score datas.
RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.9344MHz
Sample clock 44.1kHz [16.9344/384], bit clock 2.1168MHz [16.9344/8]
056800 - Konami Custom (QFP80). PowerPC to 68000 communication, reads DIP switches, read/write NVRAM and protection device
control including providing an 8-bit databus to the network board so that the network board has access to the NVRAM
and X76F041 Secured EEPROM on the main PCB.
058232 - Konami Custom Ceramic Package (SIL14). Provides master reset, coin counter signals
and watchdog reset. Also known as 058460.
ADC12138 - National Semiconductor ADC12138 A/D Converter, 12-bit + Serial I/O With MUX (SOP28)
MACH111 - AMD MACH111 CPLD (Stamped 'N676A1', PLCC44)
68EC000 - Motorola MC68EC000, running at 16.0MHz (64/4)
PPC403GA - IBM PowerPC 403GA CPU, clock input 32.0MHz (QFP160)
SM5877AM - Nippon Precision Circuits 3rd Order 2-Channel D/A Converter. Clock input 16.9344MHz (SOIC24)
4AK16 - Hitachi 4AK16 Silicon N-Channel Power MOS FET Array (SIL10)
NE5532AN - Philips, Dual Low-Noise High-Speed Audio OP Amp (DIP8)
SP485CS - Sipex SP485CS Low Power Half Duplex RS485 Transceiver (DIP8)
PAL1 - AMD PALCE16V8 (stamped 'N676A4', DIP20)
PAL2 - AMD PALCE16V8 (stamped 'N676A2', DIP20)
PAL3 - AMD PALCE16V8 (stamped 'N676A3', DIP20)
PAL4 - AMD PALCE16V8 (stamped 'N676A5', DIP20)
JP1 - 25M O O-O 32M
JP2 - 25M O O-O 32M
JP3 - RW O O O RO
JP4 - PROG 32M O O-O 16M (Used to set size of main program EPROMs)
JP5 - DATA 32M O-O O 16M (Used to set size of data ROMs)
JP6 - BOOT 16 O-O O 32
JP7 - SRC DOUT2 O O-O 0
JP8 - 64M&32M O-O O 16M
JP9 - 64M O O-O 32M&16M
JP10 - 64M&32M O-O O 16M
JP11 - 64M O O-O 32M&16M
JP12 - through O-O O SP
JP13 - through O-O O SP
JP14 - WDT O O (Used to disable watchdog when shorted)
JP15 - MONO O-O O SURR
JP16 - HIGH O O O MID (N/C LOW)
CN1 to CN3 - Multi-pin Flat Cable Connector
CN4 - Multi-pin Connector for Network PCB
CN5 - Multi-pin Flat Cable Connector
CN6 - 96-Pin To Lower PCB, Joining Connector
CN7 to CN8 - Not used
CN9 to CN11 - 6-Pin Power Connectors
CN19 - USB Connector
CN21 - 5-Pin Analog Controls Connector (Tied to USB Connector via the Filter Board)
CN18 - RCA Mono Audio OUT
CN14 & CN16 - RCA Stereo Audio OUT
ROM Usage
---------
|------------------------------- ROM Locations ---------------------------------------|
Game 27P 25P 22P 16P 14P 12P 9P 16T 14T 12T 9T 7S
----------------------------------------------------------------------------------------------------
Gradius 4 837C01 - - 837A09 837A10 - 778A12 837A04 837A05 - - 837A08
NBA P/Play 778A01 - - 778A09 778A10 778A11 778A12 778A04 778A05 - - 778A08
Teraburst - 715l02 715l03 715A09 715A10 - 778A12 715A04 715A05 - - 715A08
Thrill Drive 713AB01 - - 713A09 713A10 - - 713A04 713A05 - - 713A08
S/Scope 830B01 - - 830A09 830A10 - - - - - - 830A08
S/Scope 2 931D01 - - 931A09 931A10 931A11 - 931A04 - - - 931A08
S/Scope 2 931C01 - - 931A09 931A10 931A11 - 931A04 - - - 931A08
Bottom Board
GN715 PWB(B)A
|--------------------------------------------------------------|
|CN4 CN2 CN8 CN6 CN5|
|JP1 |---------| 4M_EDO 4M_EDO |
| | | |----------| |
| 4M_EDO 4M_EDO | TEXELFX | | | |
| | | | PIXELFX | 4M_EDO |
| 4M_EDO 4M_EDO | | | | 4M_EDO |
| |---------| | | |--------| |
| 4M_EDO 4M_EDO |----------| |KONAMI | |
|CN3 50MHz JP7 |33906 | |
| 4M_EDO 4M_EDO JP6 | | |
| 256KSRAM 256KSRAM |--------| |
|CN7 |
| AV9170 1MSRAM 1MSRAM |
| MC44200 |
| 256KSRAM 256KSRAM |
| 1MSRAM 1MSRAM |
| |-------| MASKROM.24U |
| |KONAMI | MACH111 |-------------| MASKROM.24V|
| |37122 | |ANALOG | 1MSRAM 1MSRAM |
| | | |DEVICES | |
| |-------| JP5 |ADSP-21062 | 36.00MHz |
|1MSRAM |SHARC | 1MSRAM 1MSRAM |
| | | |
|1MSRAM | | |
| 256KSRAM |-------------| MASKROM.32U |
|1MSRAM 256KSRAM MASKROM.32V|
| 256KSRAM PAL1 PAL2 JP4 |
|1MSRAM |
| JP2 CN1 JP3 |
|--------------------------------------------------------------|
Notes:
4M_EDO - Silicon Magic SM81C256K16CJ-35 EDO DRAM 66MHz (SOJ40)
1MSRAM - Cypress CY7C109-25VC 1Meg SRAM (SOJ32)
256KSRAM - Winbond W24257AJ-15 256K SRAM (SOJ28)
TEXELFX - 3DFX 500-0004-02 BD0665.1 Voodoo 1 Texture Mapping Unit (QFP208) \
PIXELFX - 3DFX 500-0003-03 F001701.1 Voodoo 1 Frame Buffer Interface (QFP240) / Both tied directly to 50MHz OSC.
37122 - Konami 0000037122 Custom 2D Tilemap Generator (QFP208)
33906 - Konami 0000033906 Custom PCI Bridge (QFP160)
ADSP-21062 - Analog Devices ADSP-21062 'SHARC' Digital Signal Processor. Clock input 36MHz.
This chip is also marked 'KS-160'
MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44)
MACH111 - AMD MACH111 CPLD (Stamped 'N715B1', PLCC44)
AV9170 - Integrated Circuit Systems Inc. Clock Multiplier (SOIC8)
PAL1 - AMD PALCE16V8 (stamped 'N676B4', DIP20)
PAL2 - AMD PALCE16V8 (stamped 'N676B5', DIP20)
JP1 - SCR O O-O TWN
JP2 - MASTER O-O O SLAVE
JP3 - 16M O O-O 32M
JP4 - 32M O-O O 16M
JP5 - ASYNC O O-O SYNC
JP6 - DSP O O-O ADCK
JP7 - MCK O-O O SCK
CN1 - 96 Pin To Lower PCB, Joining Connector
CN2 - 8-Pin RGB OUT
CN3 - 15-Pin DSUB VGA Video MAIN OUT
CN4 - 6-Pin Power Connector
CN5 - 4-Pin Power Connector
CN6 - 2-Pin Connector (Not Used)
CN7 - 15-Pin DSUB VGA Video MAIN OUT
CN8 - 6-Pin Connector (Not Used)
ROM Usage
---------
|------ ROM Locations -------|
Game 24U 24V 32U 32V
-------------------------------------------
Gradius 4 837A13 837A15 837A14 837A16
NBA P/Play 778A13 778A15 778A14 778A16
Teraburst 715A13 715A15 778A14 715A16
Thrill Drive 713A13 - 713A14 -
S/Scope 830A13 - 830A14 -
S/Scope 2 - - - - (no ROMs, not used)
Bottom Board (Voodoo 2 version used in twin configuration with 2 of these PCBs)
GQ871 PWB(B)A
|--------------------------------------------------------------|
|CN4 CN2 CN8 CN5|
|U110 |---------| 4M_EDO 4M_EDO |
| | | |----------| PQ30RV21|
| 4M_EDO 4M_EDO | TEXELFX2| | | |
| | | | PIXELFX2 | 4M_EDO |
| 4M_EDO 4M_EDO | | | | 4M_EDO |
| |---------| | | |--------| |
| 4M_EDO 4M_EDO |----------| |KONAMI | |
|CN11 64MHz U7 |33906 | |
| 4M_EDO 4M_EDO U39 | | |
| 256KSRAM 256KSRAM |--------| |
|CN10 |
| AV9170 74CBT3383(x7) 1MSRAM 1MSRAM |
| MC44200 |
| 256KSRAM 256KSRAM |
| 1MSRAM 1MSRAM |
| |-------| MASKROM.24U |
| |KONAMI | XC9536 |-------------| MASKROM.24V|
| |37122 | |ANALOG | 1MSRAM 1MSRAM |
| | | |DEVICES | |
| |-------| U91 |ADSP-21062 | 36.00MHz |
|1MSRAM |SHARC | 1MSRAM 1MSRAM |
|CN9 | | |
|1MSRAM |KS-160 | |
| 256KSRAM |-------------| MASKROM.32U |
|1MSRAM 256KSRAM MASKROM.32V|
| 256KSRAM PAL1 PAL2 U36 |
|1MSRAM |
| 37D CN1 U88 |
|--------------------------------------------------------------|
Notes:
4M_EDO - Silicon Magic SM81C256K16CJ-35 EDO DRAM 66MHz (SOJ40)
1MSRAM - Cypress CY7C109-25VC 1Meg SRAM (SOJ32)
256KSRAM - Winbond W24257AJ-15 256K SRAM (SOJ28)
TEXELFX2 - 3DFX 500-0010-01 F008221.1 BE (BRUCE) Voodoo 2 Texture Mapping Unit (QFP208) \
PIXELFX2 - 3DFX 500-0009-01 D21472.00 CK (CHUCK) Voodoo 2 Frame Buffer Interface (QFP240) / Both tied directly to 64MHz OSC.
37122 - Konami 0000037122 Custom 2D Tilemap Generator (QFP208)
33906 - Konami 0000033906 Custom PCI Bridge (QFP160)
ADSP-21062 - Analog Devices ADSP-21062 'SHARC' Digital Signal Processor. Clock input 36MHz.
This chip is also marked 'KS-160'
MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44)
XC9536 - XILINX XC9536 CPLD (PLCC44), stamped 'Q830B1'
AV9170 - Integrated Circuit Systems Inc. Clock Multiplier (SOIC8)
74CBT3383 - Texas Instruments 74CBT3383 10-bit FET Bus Exchange Switch (TSSOP24)
PAL1 - AMD PALCE16V8 (stamped 'N676B4', DIP20)
PAL2 - AMD PALCE16V8 (stamped 'N676B5', DIP20)
U110 - JUMPER SLV O O-O MST,TWN
37D - JUMPER MASTER O-O O SLAVE (upper board set to MASTER, lower board set to SLAVE)
U36 - JUMPER 32M O-O O 16M
O\ 32M
U88 - JUMPER 16M O O/ O DEV (set to middle vertical setting 32M)
U91 - JUMPER ASYNC O O-O SYNC
O\ ADCK
U7 - JUMPER DSP O O/ O PCI (set to middle vertical setting ADCK)
U39 - JUMPER MCK O-O O SCK
CN1 - 96 Pin To Lower PCB, Joining Connector
CN2 - 8-Pin RGB OUT (not populated)
CN4 - 6-Pin Power Connector
CN5 - 4-Pin Power Connector
CN8 - 6-Pin Connector (not populated)
CN9 - 5-Pin Connector (not populated)
CN11 - 15-Pin DSUB VGA Video SUB OUT (not populated)
CN10 - 15-Pin DSUB VGA Video MAIN OUT
ROM Usage
---------
|------ ROM Locations -------|
Game 24U 24V 32U 32V
-------------------------------------------
S/Scope 2 - - - - (no ROMs, not used)
I/O PCB
-------
This exact same PCB is used on Teraburst and Operation: Thunder Hurricane. Teraburst has some parts
on the I/O board not populated that are used on Operation: Thunder Hurricane and some parts used on
Operation: Thunder Hurricane are not populated on the version used with Teraburst (also see
gticlub.cpp). Analog inputs are controlled by two CCD cameras, one from each gun. This specific
variation uses a K056800 which normally acts as a sound interface controller but on this PCB it is
used to communicate with the main PCB through CN1. No network connection is involved in this setup
as this board directly connects to the main PCB via joining connector CN1, hence the use of the
056800 chip. The entire network section of the PCB is not populated.
GN680 PWB(E)403381B
|------------------------------------------|
|CN11 CN12 CN8 CN9 CN10 DSW(4)|
| NRPS11 NRPS11 |
| |
| LM1881 LM1881 |
| |
|LED(x4) |
| |
| 68EC000FN16 8464 |
| RESET_SW 8464 |
|32MHz 715A17.20K|
|8464 PAL(002962) |
| 056800 PAL(002961) |
| PAL(056787A) PAL(002960) |
| CN1 |
|------------------------------------------|
Notes:
68EC000 - Clock input 16MHz (32/2)
8464 - Fujitsu MB8464 64K SRAM
CN11/12 - Power connectors
CN8/9/10 - 6-pin analog control connectors (to CCD cameras)
CN1 - Lower joining connector to main PCB
NRPS11 - Idec NRPS11 PC Board circuit protector
LM1881 - Video sync separator (DIP8)
056800 - Konami Custom (QFP80)
This specific PCB is only used on Teraburst.
Network PCB
-----------
GQ931 PWB(H)
KONAMI 1999
|----------------------------|
|*ADM232 *LH28F016(TSOP40x4)|
|*CN6 *19.6608MHz |
| 931A20.6E |
| *PC16552 |
| |
| 93C46A.8B 931A19.8E |
|*CN2 |
| UPC2933 |
| *10B |
| XCS10XL |
|*CN3 CY7C199 XC9536 |
| |
| HYC2485S DS2401.16G|
|CN5 LS245 LS245 LS245 |
|CN4 32MHz CN1 *TR1 |
|----------------------------|
Notes: (*= these parts not populated)
931A19/A20 - DIP42 32meg mask ROM (graphics data). These are programmed in BYTE mode and only D0-D7
are connected. Read as 27C322 with D15/A-1 pulled high/low (2 reads), even byte 00's
removed then interleaved together. These are the same type of mask ROMs used on some
other Konami games for sound data and also used on Namco Super System 22 and System 11
for the WAVE ROM.
The data in these ROMs is read through the Konami 056800 custom IC on the CPU board and
copied to RAM on the video boards.
XC9536 - Xilinx XC9535 CPLD (PLCC44), stamped 'Q931H1'
XCS10XL - Xilinx Spartan-XL XCS10XL FPGA (QFP100), stamped '4C'
CY7C199 - Cypress 256K (32kx8) SRAM (equivalent to 62256 etc)
93C46 - Atmel 93C46A 1K (128x8-bit) Serial EEPROM (SOIC8 150mil). Contains region security data
and Lan ID that must match the data in the DS2401 and Timekeeper NVRAM otherwise Error -8B.
10B - Alternative not populated location for 93C46 EEPROM in TSSOP8 package
HYC2485S - SMC ARCNET Media Transceiver, RS485 5Mbps-2.5Mbps in custom SIL8 package with ceramic coating
DS2401 - Dallas DS2401 64-bit 1-Wire Silicon Serial Number (TSOC6)
TR1 - Alternative not populated location for DS2401 in TO92 package
UPC2933 - 3.3V Linear Voltage Regulator
CN1 - 68-pin connector joining to main board. This connector has the following signals on it....
MDB0..7, A0..5, A9..12, A30, A31, 5 signals tied to N676A1 CPLD, PPC INT2, NVRAM RW,
NVRAM ENABLE, 68KCLK, 32M_VIDCLK.
CN4/CN5 - RCA connector used for network send/receive connections to 2nd arcade cabinet
Note: This PCB is used only on Silent Scope 2 and does more than just networking. The game will not
boot at all (just black screen) if the network board is not connected to the main board (LED ERROR
F0 12). The serial EEPROM is used to prevent changing the region. The EEPROM data hand-crafted for
MAME does not work on real hardware because the LAN ID (held in the DS2401) is different on each
PCB. The timekeeper region and DS2401 LAN ID has to match the serial EEPROM otherwise at the end of
the POST it will show HARDWARE ERROR(-8B). The data in the serial EEPROM is not just a direct copy
of the data in the NVRAM although it is very similar in some areas and to make it work on real
hardware the LAN ID of the real PCB must be updated in the serial EEPROM and the checksum
recalculated. The two mask ROMs are graphics ROMs. After the POST completes, there are a couple of
multi-colored screens (similar to the start-up screens) then 'PLEASE WAIT' and 'Now Loading'
messages for about 35 seconds while the game transfers the data from those two ROMs and stores the
data in RAM on the video boards. The reason for doing that is because the network board connector
only has an 8-bit data bus and 12-bit address bus.
***************************************************************************/
#include "emu.h"
#include "k037122.h"
#include "konami_gn676_lan.h"
#include "konppc.h"
#include "konppc_jvshost.h"
#include "windy2.h"
#include "cpu/m68000/m68000.h"
#include "cpu/powerpc/ppc.h"
#include "cpu/sharc/sharc.h"
#include "machine/adc1213x.h"
#include "machine/ds2401.h"
#include "machine/eepromser.h"
#include "machine/k033906.h"
#include "machine/timekpr.h"
#include "machine/watchdog.h"
#include "machine/x76f041.h"
#include "sound/k056800.h"
#include "sound/rf5c400.h"
#include "video/voodoo_2.h"
#include "emupal.h"
#include "screen.h"
#include "speaker.h"
#include "layout/generic.h"
#define LOG_SYSREG (1 << 1)
#define LOG_COMM (1 << 2)
#define LOG_ALL (LOG_SYSREG | LOG_COMM)
#define VERBOSE (0)
#include "logmacro.h"
#define LOGSYSREG(...) LOGMASKED(LOG_SYSREG, __VA_ARGS__)
#define LOGCOMM(...) LOGMASKED(LOG_COMM, __VA_ARGS__)
namespace {
class hornet_state : public driver_device
{
public:
hornet_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_workram(*this, "workram"),
m_sharc_dataram(*this, "sharc%u_dataram", 0U),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu"),
m_k056800(*this, "k056800"),
m_dsp(*this, "dsp%u", 1U),
m_k037122(*this, "k037122_%u", 0U),
m_adc12138(*this, "adc12138"),
m_adc12138_sscope(*this, "adc12138_sscope"),
m_konppc(*this, "konppc"),
m_x76f041(*this, "security_eeprom"),
m_voodoo(*this, "voodoo%u", 0U),
m_watchdog(*this, "watchdog"),
m_jvs_host(*this, "jvs_host"),
m_k033906(*this, "k033906_%u", 1U),
m_gn676_lan(*this, "gn676_lan"),
m_cgboard_bank(*this, "cgboard_%u_bank", 0U),
m_in(*this, "IN%u", 0U),
m_dsw(*this, "DSW"),
m_eepromout(*this, "EEPROMOUT"),
m_analog(*this, "ANALOG%u", 1U),
m_pcb_digit(*this, "pcbdigit%u", 0U),
m_cg_view(*this, "cg_view")
{ }
void hornet(machine_config &config) ATTR_COLD;
void hornet_x76(machine_config &config) ATTR_COLD;
void hornet_lan(machine_config &config) ATTR_COLD;
void nbapbp(machine_config &config) ATTR_COLD;
void sscope(machine_config &config) ATTR_COLD;
void sscope_voodoo2(machine_config& config) ATTR_COLD;
void init_hornet() ATTR_COLD;
void init_sscope() ATTR_COLD;
protected:
virtual void machine_start() override ATTR_COLD;
virtual void machine_reset() override ATTR_COLD;
uint8_t sysreg_r(offs_t offset);
void sysreg_w(offs_t offset, uint8_t data);
void soundtimer_en_w(uint16_t data);
void soundtimer_ack_w(uint16_t data);
double adc12138_input_callback(uint8_t input);
void jamma_jvs_w(uint8_t data);
template <uint8_t Which> uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(sound_irq);
void hornet_map(address_map &map) ATTR_COLD;
void hornet_lan_map(address_map &map) ATTR_COLD;
void sscope_map(address_map &map) ATTR_COLD;
template <unsigned Board> void sharc_map(address_map &map) ATTR_COLD;
void sound_memmap(address_map &map) ATTR_COLD;
required_shared_ptr<uint32_t> m_workram;
optional_shared_ptr_array<uint32_t, 2> m_sharc_dataram;
required_device<ppc4xx_device> m_maincpu;
required_device<cpu_device> m_audiocpu;
required_device<k056800_device> m_k056800;
optional_device_array<adsp21062_device, 2> m_dsp;
optional_device_array<k037122_device, 2> m_k037122;
required_device<adc12138_device> m_adc12138;
optional_device<adc12138_device> m_adc12138_sscope;
required_device<konppc_device> m_konppc;
optional_device<x76f041_device> m_x76f041;
optional_device_array<generic_voodoo_device, 2> m_voodoo;
required_device<watchdog_timer_device> m_watchdog;
required_device<konppc_jvs_host_device> m_jvs_host;
optional_device_array<k033906_device, 2> m_k033906;
optional_device<konami_gn676_lan_device> m_gn676_lan;
optional_memory_bank_array<2> m_cgboard_bank;
required_ioport_array<3> m_in;
required_ioport m_dsw;
optional_ioport m_eepromout;
optional_ioport_array<5> m_analog;
output_finder<2> m_pcb_digit;
memory_view m_cg_view;
bool m_sound_irq_enabled = false;
bool m_sndres = false;
};
// with GN680 I/O board
class terabrst_state : public hornet_state
{
public:
terabrst_state(const machine_config &mconfig, device_type type, const char *tag) :
hornet_state(mconfig, type, tag),
m_gn680(*this, "gn680")
{ }
void terabrst(machine_config &config) ATTR_COLD;
protected:
virtual void machine_start() override ATTR_COLD;
virtual void machine_reset() override ATTR_COLD;
private:
uint16_t gun_r(offs_t offset);
void gun_w(offs_t offset, uint16_t data);
void gn680_sysctrl(uint16_t data);
uint16_t gn680_latch_r();
void gn680_latch_w(offs_t offset, uint16_t data);
void terabrst_map(address_map &map) ATTR_COLD;
void gn680_memmap(address_map &map) ATTR_COLD;
required_device<cpu_device> m_gn680;
uint16_t m_gn680_latch = 0;
uint16_t m_gn680_ret0 = 0;
uint16_t m_gn680_ret1 = 0;
uint16_t m_gn680_check = 0;
uint16_t m_gn680_reg0e = 0;
};
// with GQ931 LAN board
class sscope2_state : public hornet_state
{
public:
sscope2_state(const machine_config &mconfig, device_type type, const char *tag) :
hornet_state(mconfig, type, tag),
m_lan_eeprom(*this, "lan_eeprom"),
m_lan_ds2401(*this, "lan_serial_id"),
m_comm_board_rom(*this, "comm_board"),
m_comm_bank(*this, "comm_bank")
{ }
void sscope2(machine_config &config) ATTR_COLD;
void sscope2_voodoo1(machine_config& config) ATTR_COLD;
void init_sscope2() ATTR_COLD;
protected:
virtual void machine_start() override ATTR_COLD;
virtual void machine_reset() override ATTR_COLD;
private:
void comm1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void comm_rombank_w(uint32_t data);
uint32_t comm0_unk_r(offs_t offset, uint32_t mem_mask = ~0);
uint8_t comm_eeprom_r();
void comm_eeprom_w(uint8_t data);
void sscope2_map(address_map &map) ATTR_COLD;
required_device<eeprom_serial_93cxx_device> m_lan_eeprom;
required_device<ds2401_device> m_lan_ds2401;
required_region_ptr<uint32_t> m_comm_board_rom;
required_memory_bank m_comm_bank;
};
template <uint8_t Which>
uint32_t hornet_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
m_voodoo[Which]->update(bitmap, cliprect);
m_k037122[Which]->tile_draw(screen, bitmap, cliprect);
return 0;
}
/*****************************************************************************/
uint8_t hornet_state::sysreg_r(offs_t offset)
{
uint8_t r = 0;
switch (offset)
{
case 0: // I/O port 0
r = m_in[0]->read();
break;
case 1: // I/O port 1
r = m_in[1]->read();
if (m_adc12138_sscope)
{
r &= ~7;
r |= m_adc12138_sscope->do_r() | (m_adc12138_sscope->eoc_r() << 2);
}
break;
case 2: // I/O port 2
r = m_in[2]->read();
break;
case 3: // I/O port 3
/*
0x80 = JVSINIT (JAMMA I/F SENSE)
0x40 = COMMST
0x20 = GSENSE
0x08 = EEPDO (EEPROM DO)
0x04 = ADEOC (ADC EOC)
0x02 = ADDOR (ADC DOR)
0x01 = ADDO (ADC DO)
*/
r = 0x70;
r |= m_jvs_host->sense() << 7;
if (m_x76f041)
r |= m_x76f041->read_sda() << 3;
r |= m_adc12138->do_r() | (m_adc12138->eoc_r() << 2);
break;
case 4: // I/O port 4 - DIP switches
r = m_dsw->read();
break;
default:
break;
}
return r;
}
void hornet_state::sysreg_w(offs_t offset, uint8_t data)
{
switch (offset)
{
case 0: // 7seg LEDs on PCB
case 1:
m_pcb_digit[offset] = bitswap<8>(~data,7,0,1,2,3,4,5,6) & 0x7f;
break;
case 2: // Parallel data register
LOGSYSREG("Parallel data = %02X\n", data);
if (m_adc12138_sscope)
{
m_adc12138_sscope->cs_w(BIT(data, 4));
m_adc12138_sscope->conv_w(BIT(data, 3));
m_adc12138_sscope->di_w(BIT(data, 5));
m_adc12138_sscope->sclk_w(BIT(data, 7));
}
break;
case 3: // System Register 0
/*
0x80 = EEPWEN (EEPROM write enable)
0x40 = EEPCS (EEPROM CS)
0x20 = EEPSCL (EEPROM SCL?)
0x10 = EEPDT (EEPROM data) / JVSTXEN (for Gradius 4)
0x08 = JVSTXEN / LAMP3 (something about JAMMA interface)
0x04 = LAMP2
0x02 = LAMP1
0x01 = LAMP0
The bit used for JVSTXEN changes between 3 and 4 based on the lower 2 bits of IN2.
If m_in[2]->read() & 3 != 0, bit 4 is used. Otherwise, bit 3 is used.
*/
if (m_x76f041)
m_x76f041->write_cs(BIT(data, 6));
LOGSYSREG("System register 0 = %02X\n", data);
break;
case 4: // System Register 1
{
/*
0x80 = SNDRES (sound reset)
0x40 = COMRES (COM reset)
0x20 = COINRQ2 (EEPROM SCL?)
0x10 = COINRQ1 (EEPROM data)
0x08 = ADCS (ADC CS)
0x04 = ADCONV (ADC CONV)
0x02 = ADDI (ADC DI)
0x01 = ADDSCLK (ADC SCLK)
*/
// Set FPGA into a state to accept new firmware
if (m_gn676_lan)
m_gn676_lan->reset_fpga_state(BIT(data, 6));
if (m_x76f041)
{
// HACK: Figure out a way a better way to differentiate between what device it wants to talk to here.
// I haven't seen a combination of both x76 + adc usage in the available Hornet library so this hack
// works but there may be a proper way differentiate the two.
// Not emulating the x76 results in NBA Play By Play becoming regionless/bugged, and not emulating the
// ADC results in Silent Scope boot looping.
m_x76f041->write_rst(BIT(data, 2));
m_x76f041->write_sda(BIT(data, 1));
m_x76f041->write_scl(BIT(data, 0));
}
else
{
m_adc12138->cs_w(BIT(data, 3));
m_adc12138->conv_w(BIT(data, 2));
m_adc12138->di_w(BIT(data, 1));
m_adc12138->sclk_w(BIT(data, 0));
}
bool const sndres = BIT(data, 7);
m_audiocpu->set_input_line(INPUT_LINE_RESET, sndres ? CLEAR_LINE : ASSERT_LINE);
if (sndres != m_sndres)
{
// clear interrupts when reset line is triggered
m_audiocpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
}
m_sndres = sndres;
LOGSYSREG("System register 1 = %02X\n", data);
break;
}
case 5: // Sound Control Register
/*
0x80 = MODE1
0x40 = MUTE1
0x20 = DEEN1
0x10 = ATCK1
0x08 = MODE0
0x04 = MUTE0
0x02 = DEEN0
0x01 = ATCK0
*/
LOGSYSREG("Sound control register = %02X\n", data);
break;
case 6: // WDT Register
/*
0x80 = WDTCLK
*/
m_watchdog->reset_line_w(BIT(data, 7));
break;
case 7: // CG Control Register
/*
0x80 = EXRES1?
0x40 = EXRES0?
0x20 = EXID1
0x10 = EXID0
0x0C = 0x00 = 24kHz, 0x04 = 31kHz, 0x0c = 15kHz
0x01 = EXRGB
*/
// TODO: The IRQ1 clear line is causing Silent Scope's screen to not update
// at the correct rate. Bits 6 and 7 always seem to be set even if an IRQ
// hasn't been called so they don't appear to be responsible for clearing IRQs,
// and ends up clearing IRQs out of turn.
// The IRQ0 clear bit is also questionable but games run too fast and crash without it.
// if (BIT(data, 7))
// m_maincpu->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
if (BIT(data, 6))
m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
m_konppc->set_cgboard_id((data >> 4) & 3);
m_cg_view.select(m_konppc->get_cgboard_id() ? 1 : 0);
break;
}
}
/*****************************************************************************/
uint8_t sscope2_state::comm_eeprom_r()
{
uint8_t r = 0;
r |= (m_lan_eeprom->do_read() & 1) << 1;
r |= m_lan_ds2401->read() & 1;
return r;
}
void sscope2_state::comm_eeprom_w(uint8_t data)
{
m_eepromout->write(data, 0xff);
m_lan_ds2401->write(BIT(data, 4));
}
void sscope2_state::comm1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
LOGCOMM("comm1_w: %08X = %08X & %08X\n", offset, data, mem_mask);
}
void sscope2_state::comm_rombank_w(uint32_t data)
{
m_comm_bank->set_entry((data >> 24) & 0x7f);
}
uint32_t sscope2_state::comm0_unk_r(offs_t offset, uint32_t mem_mask)
{
if (!machine().side_effects_disabled())
LOGCOMM("comm0_unk_r: %08X & %08X\n", offset, mem_mask);
return 0xffffffff;
}
uint16_t terabrst_state::gun_r(offs_t offset)
{
uint16_t r = 0;
// TODO: Replace this with proper emulation of a CCD camera
// so the GN680's program can handle inputs normally.
// TODO: Check if this works when skip post is disabled (currently causes game to boot loop)
if (m_gn680_reg0e == 0 && (offset == 0 || offset == 1))
{
// All values are offset so that the range in-game is
// +/- 280 on the X and +/- 220 on the Y axis.
// Parts of Player 2's Y axis value is included with every read,
// so it doesn't have its own index for reading.
int16_t const p2y = (int16_t)m_analog[3].read_safe(0) - 220;
r = m_gn680_check;
switch (m_gn680_latch & 3)
{
case 1:
r |= ((int16_t)m_analog[0].read_safe(0) - 281) & 0x7ff;
r |= (p2y & 0x700) << 4;
break;
case 2:
r |= ((int16_t)m_analog[1].read_safe(0) - 220) & 0x7ff;
r |= (p2y & 0xf0) << 7;
break;
case 3:
r |= ((int16_t)m_analog[2].read_safe(0) - 280) & 0x7ff;
r |= (p2y & 0x0f) << 11;
break;
}
switch (offset)
{
case 0:
r = (r >> 8) & 0xff;
break;
case 1:
r &= 0xff;
if (!machine().side_effects_disabled())
m_gn680_check ^= 0x8000; // Must be in sync with the game every read or the update will be rejected
break;
}
}
else
{
if (offset == 0)
r = m_gn680_ret0;
else if (offset == 1)
r = m_gn680_ret1;
}
return r;
}
void terabrst_state::gun_w(offs_t offset, uint16_t data)
{
if (offset == 0)
{
m_gn680_latch = data;
m_gn680->set_input_line(M68K_IRQ_6, HOLD_LINE);
}
else if (offset == 0x0e/2)
{
// Always set to 0 when reading the gun inputs
m_gn680_reg0e = data;
}
}
/******************************************************************/
INTERRUPT_GEN_MEMBER(hornet_state::sound_irq)
{
if (m_sound_irq_enabled)
m_audiocpu->set_input_line(M68K_IRQ_1, ASSERT_LINE);
}
void hornet_state::soundtimer_en_w(uint16_t data)
{
m_sound_irq_enabled = !BIT(data, 0);
}
void hornet_state::soundtimer_ack_w(uint16_t data)
{
m_audiocpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
}
/*****************************************************************************/
void hornet_state::hornet_map(address_map &map)
{
map(0x00000000, 0x003fffff).ram().share(m_workram);
map(0x74000000, 0x7407ffff).view(m_cg_view);
m_cg_view[0](0x74000000, 0x740000ff).rw(m_k037122[0], FUNC(k037122_device::reg_r), FUNC(k037122_device::reg_w));
m_cg_view[0](0x74020000, 0x7403ffff).rw(m_k037122[0], FUNC(k037122_device::sram_r), FUNC(k037122_device::sram_w));
m_cg_view[0](0x74040000, 0x7407ffff).rw(m_k037122[0], FUNC(k037122_device::char_r), FUNC(k037122_device::char_w));
map(0x78000000, 0x7800ffff).rw(m_konppc, FUNC(konppc_device::cgboard_dsp_shared_r_ppc), FUNC(konppc_device::cgboard_dsp_shared_w_ppc));
map(0x780c0000, 0x780c0003).rw(m_konppc, FUNC(konppc_device::cgboard_dsp_comm_r_ppc), FUNC(konppc_device::cgboard_dsp_comm_w_ppc));
map(0x7d000000, 0x7d00ffff).r(FUNC(hornet_state::sysreg_r));
map(0x7d010000, 0x7d01ffff).w(FUNC(hornet_state::sysreg_w));
map(0x7d020000, 0x7d021fff).rw("m48t58", FUNC(timekeeper_device::read), FUNC(timekeeper_device::write)); // M48T58Y RTC/NVRAM
map(0x7d030000, 0x7d03000f).rw(m_k056800, FUNC(k056800_device::host_r), FUNC(k056800_device::host_w));
map(0x7e000000, 0x7e7fffff).rom().region("datarom", 0);
map(0x7f000000, 0x7f3fffff).rom().region("prgrom", 0);
map(0x7fc00000, 0x7fffffff).rom().region("prgrom", 0);
}
void hornet_state::hornet_lan_map(address_map &map)
{
hornet_map(map);
map(0x7d040000, 0x7d04ffff).rw(m_gn676_lan, FUNC(konami_gn676_lan_device::lanc1_r), FUNC(konami_gn676_lan_device::lanc1_w));
map(0x7d050000, 0x7d05ffff).rw(m_gn676_lan, FUNC(konami_gn676_lan_device::lanc2_r), FUNC(konami_gn676_lan_device::lanc2_w));
}
void terabrst_state::terabrst_map(address_map &map)
{
hornet_map(map);
map(0x74080000, 0x7408000f).rw(FUNC(terabrst_state::gun_r), FUNC(terabrst_state::gun_w));
}
void hornet_state::sscope_map(address_map &map)
{
hornet_map(map);
m_cg_view[1](0x74000000, 0x740000ff).rw(m_k037122[1], FUNC(k037122_device::reg_r), FUNC(k037122_device::reg_w));
m_cg_view[1](0x74020000, 0x7403ffff).rw(m_k037122[1], FUNC(k037122_device::sram_r), FUNC(k037122_device::sram_w));
m_cg_view[1](0x74040000, 0x7407ffff).rw(m_k037122[1], FUNC(k037122_device::char_r), FUNC(k037122_device::char_w));
}
void sscope2_state::sscope2_map(address_map &map)
{
sscope_map(map);
map(0x7d040004, 0x7d040007).rw(FUNC(sscope2_state::comm_eeprom_r), FUNC(sscope2_state::comm_eeprom_w));
map(0x7d042000, 0x7d043fff).ram(); // COMM BOARD 0
map(0x7d044000, 0x7d044007).r(FUNC(sscope2_state::comm0_unk_r));
map(0x7d048000, 0x7d048003).w(FUNC(sscope2_state::comm1_w));
map(0x7d04a000, 0x7d04a003).w(FUNC(sscope2_state::comm_rombank_w));
map(0x7d050000, 0x7d05ffff).bankr(m_comm_bank); // COMM BOARD 1
}
/*****************************************************************************/