naomi.cpp: Explain mainboard jumper JP1 (Aica clock source) (#7484)

mamedev · Nov 16, 2020 · b03500d0758c5329c4ad44a944eb3ce3b8c06254 · b03500d
1 parent fee9a29
commit b03500d0758c5329c4ad44a944eb3ce3b8c06254
Unified Split

Showing with 1 addition and 1 deletion.

+1 −1 src/mame/drivers/naomi.cpp
diff --git a/src/mame/drivers/naomi.cpp b/src/mame/drivers/naomi.cpp
@@ -141,7 +141,7 @@ EPF8452AQC160-3 - Altera FLEX EPF8452AQC160-3 FPGA (QFP160)
           A179B - TI SN75179B Differential Driver and Receiver Pair (DIP8)
          ADM485 - Analog Devices ADM485 +5 V Low Power EIA RS-485 Transceiver (SOIC8)
         PCM1725 - Burr-Brown PCM1725 Stereo Audio Digital to Analog Converter 16 Bits, 96kHz Sampling (SOIC14)
-            JP1 - set to 2-3. Alt setting is 1-2
+            JP1 - AICA clock Source; Default From Motherboard set to 2-3. Alt setting is 1-2 from Cart Bus (G2 Expansion BD; Multiboard Clock; other Cart Slot Peripherals that provide Aica Clock)
             JP4 - set to 2-3. Alt setting is 1-2
         CN1/2/3 - Connectors for ROM cart or GDROM DIMM Unit
         CN25/26 - Connectors for Filter Board