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machine/via6522.cpp: Don't clear all interrupts on IFR writes with bit 7 set #10875

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merged 1 commit into from Feb 6, 2023
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mzattera
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@mzattera mzattera commented Feb 6, 2023

These 3 datasheets:

http://archive.6502.org/datasheets/mos_6522_preliminary_nov_1977.pdf http://archive.6502.org/datasheets/synertek_sy6522_via_1978_jan.pdf
http://archive.6502.org/datasheets/rockwell_r6522_via.pdf

state that:

The IFR bit 7 is not a flag. Therefore, this bit is not directly cleared by writing a logic 1 into it. It can only be cleared by clearing all the flags in the register or by disabling all the active interrupts as discussed in the next section.

but this is what current code does. If more updated datasheets are available, please share the links.

These 3 datasheets:

http://archive.6502.org/datasheets/mos_6522_preliminary_nov_1977.pdf
http://archive.6502.org/datasheets/synertek_sy6522_via_1978_jan.pdf
http://archive.6502.org/datasheets/rockwell_r6522_via.pdf

state that:

The IFR bit 7 is not a flag. Therefore, this bit is not directly cleared by writing a
logic 1 into it. It can only be cleared by clearing all the flags in the register or by
disabling all the active interrupts as discussed in the next section.

but this is what current code does. If more updated datasheets are available, please share the links.
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cuavas commented Feb 6, 2023

At a quick glance, I can’t find anything that explicitly says writing 1 to this bit clears all interrupts, and I could see how misreading figure 29 in the Rockwell datasheet could give this misconception.

How well have you tested this change? Have you tried adding a log message when IFR is written with bit 7 set to 1 and seeing if it gets triggered when running any systems that use VIA interrupts?

As I said before, I get nervous about VIA changes given how many systems use it, how touchy they can be, and the history of things getting badly broken by changes to the device.

@cuavas cuavas changed the title Fixed VIA_IFR write machine/via6522.cpp: Don't clear all interrupts on IFR writes with bit 7 set Feb 6, 2023
@galibert galibert merged commit a95d1fa into mamedev:master Feb 6, 2023
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galibert commented Feb 6, 2023

He's correct. The bit 7 just doesn't exist, it's a direct access to the irq line on read and nothing on write.

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galibert commented Feb 6, 2023

Oh, and the irq line is a direct or of the other 7 bits and between ifr and ier.

@mzattera mzattera deleted the patch-1 branch February 6, 2023 18:20
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3 participants