Permalink
Browse files

Fix several warnings at compilation and execution

  • Loading branch information...
1 parent b3446bc commit 72d80f89394318f572cd6288123feaf8e894e6ca @marc-lorber committed Dec 31, 2011
Showing with 485 additions and 583 deletions.
  1. +1 −1 src/Makefile.am
  2. +6 −9 src/create-wire.c
  3. +52 −29 src/dialogs.c
  4. +2 −0 src/dialogs.h
  5. +1 −1 src/file.c
  6. +1 −1 src/main.c
  7. +0 −165 src/models.txt
  8. +14 −104 src/part-browser.c
  9. +39 −12 src/plot-add-function.c
  10. +26 −44 src/plot.c
  11. +50 −49 src/schematic-view-menu.h
  12. +142 −62 src/schematic-view.c
  13. +29 −29 src/schematic-view.h
  14. +99 −70 src/settings.c
  15. +5 −4 src/sim-settings.c
  16. +2 −2 src/simulation.c
  17. +16 −1 src/splash.c
View
@@ -81,7 +81,7 @@ oregano_SOURCES = \
save-schematic.h \
schematic-view.c \
schematic-view.h \
- schematic-view-ui.h \
+ schematic-view-menu.h \
settings.c \
settings.h \
sim-settings.c \
View
@@ -1,4 +1,4 @@
-/**
+/*
* @file create-wire.c
*
* @author Richard Hult <rhult@hem.passagen.se>
@@ -9,8 +9,7 @@
*
* The name is not really right. This part handles creation of wires and
* acts as glue between NodeStore/Wire and Sheet/WireItem.
- */
-/*
+ *
* Web page: http://arrakis.lug.fi.uba.ar/
*
* Copyright (C) 1999-2001 Richard Hult
@@ -79,7 +78,7 @@ static void cancel_wire (CreateWireContext *cwc);
static void exit_wire_mode (CreateWireContext *cwc);
-/**
+/*
* Initiates wire creation by disconnecting the signal handler that
* starts the wire-drawing and then connecting the drawing handler.
* This is an event handler.
@@ -169,7 +168,7 @@ create_wire_pre_create_event (Sheet *sheet, const GdkEvent *event,
return TRUE;
}
-/**
+/*
* This needs to be called in order to start a wire creation.
* It sets up the initial event handler that basically just
* takes care of the first button-1 press that starts the
@@ -206,7 +205,7 @@ create_wire_initiate (SchematicView *sv)
return cwc;
}
-/**
+/*
* create_wire_event
*/
static int
@@ -322,7 +321,6 @@ create_wire_event (Sheet *sheet, const GdkEvent *event, CreateWireContext *cwc)
dy = fabs (cwc->old_y - new_y);
m = sqrt (dx*dx + dy*dy);
- /* 20 == 10*10 == GRID_SIZE*GRIS_SIZE */
if (m > 20)
cwc->moved = TRUE;
}
@@ -485,7 +483,6 @@ fixate_wire (CreateWireContext *cwc, gboolean always_fixate_both, int x, int y)
* If the user clicks when wire length is zero, cancel the wire.
*/
if (p1.x == p2.x && p1.y == p2.y) {
- /* g_print ("cancel wire\n");*/
cancel_wire (cwc);
return;
}
@@ -673,7 +670,7 @@ create_wire_exit (CreateWireContext *cwc)
}
}
-/**
+/*
* Signal handler for the "cancel" signal that the sheet emits
* when <escape> is pressed.
*/
View
@@ -71,6 +71,44 @@ oregano_error_with_title (gchar *title, gchar *desc)
gtk_widget_destroy (dialog);
}
+void
+oregano_warning (gchar *msg)
+{
+ oregano_warning_with_title(msg, NULL);
+}
+
+
+void
+oregano_warning_with_title (gchar *title, gchar *desc)
+{
+ GtkWidget *dialog;
+ gint result;
+
+ GString* span_msg;
+
+ span_msg = g_string_new("<span weight=\"bold\" size=\"large\">");
+ span_msg = g_string_append(span_msg, title);
+ span_msg = g_string_append(span_msg,"</span>");
+
+ if (desc && desc[0] != '\0') {
+ span_msg = g_string_append(span_msg,"\n\n");
+ span_msg = g_string_append(span_msg, desc);
+ }
+
+ dialog = gtk_message_dialog_new_with_markup (
+ NULL,
+ GTK_DIALOG_MODAL,
+ GTK_MESSAGE_WARNING,
+ GTK_BUTTONS_OK,
+ span_msg->str);
+
+ gtk_dialog_set_default_response (GTK_DIALOG (dialog), GTK_RESPONSE_OK);
+
+ result = gtk_dialog_run (GTK_DIALOG (dialog));
+
+ g_string_free(span_msg, TRUE);
+ gtk_widget_destroy (dialog);
+}
gint
oregano_question (gchar *msg)
{
@@ -102,18 +140,14 @@ void
dialog_about (void)
{
GdkPixbuf *logo;
- GError *error = NULL;
const gchar *authors[] = {
+ "Richard Hult",
"Margarita Manterola",
"Andres de Barbara",
"Gustavo M. Pereyra",
"Maximiliano Curia",
"Ricardo Markiewicz",
- /* TODO : What should we do with the Richard Hult credits? */
- /*"Richard Hult <richard.hult@telia.com>",*/
- /* maxy> I believe it should stay, and it should be the first on the
- * list */
NULL
};
@@ -131,30 +165,19 @@ dialog_about (void)
return;
}
- error = NULL;
logo = gdk_pixbuf_new_from_xpm_data ((const char **) logo_xpm);
- about = gnome_about_new (
- "Oregano",
- VERSION,
- copy,
- _("Schematic capture and circuit simulation.\n"),
- authors,
- docs, NULL,
- logo);
-
- g_signal_connect (
- G_OBJECT (about),
- "destroy",
- G_CALLBACK(about_destroy_event),
- NULL);
-
- gtk_widget_show (about);
+ about = gtk_about_dialog_new ();
+ gtk_about_dialog_set_name (GTK_ABOUT_DIALOG (about), "Oregano");
+ gtk_about_dialog_set_version (GTK_ABOUT_DIALOG (about), VERSION);
+ gtk_about_dialog_set_copyright (GTK_ABOUT_DIALOG (about), copy);
+ gtk_about_dialog_set_comments (GTK_ABOUT_DIALOG (about), _("Schematic capture and circuit simulation.\n"));
+ gtk_about_dialog_set_license (GTK_ABOUT_DIALOG (about), "GNU General Public License");
+ gtk_about_dialog_set_website (GTK_ABOUT_DIALOG (about), "http://arrakis.gforge.lug.fi.uba.ar");
+ gtk_about_dialog_set_authors (GTK_ABOUT_DIALOG (about), authors);
+ gtk_about_dialog_set_documenters (GTK_ABOUT_DIALOG (about), docs);
+ gtk_about_dialog_set_logo (GTK_ABOUT_DIALOG (about), logo);
+ gtk_dialog_run (GTK_DIALOG (about));
+ gtk_widget_destroy (about);
+
}
-
-static void
-about_destroy_event (void)
-{
- about = NULL;
-}
-
View
@@ -35,6 +35,8 @@
void oregano_error (gchar *msg);
void oregano_error_with_title (gchar *title, gchar *desc);
+void oregano_warning (gchar *msg);
+void oregano_warning_with_title (gchar *title, gchar *desc);
gint oregano_question (gchar *msg);
void dialog_about (void);
View
@@ -108,7 +108,7 @@ dialog_save_as (SchematicView *sv)
GTK_FILE_CHOOSER (dialog));
if (name [strlen (name) - 1] != '/') {
gchar *tmp;
- const gchar *base = g_basename (name);
+ const gchar *base = g_path_get_basename (name);
if (strchr (base, '.') == NULL){
tmp = g_strconcat (name, ".oregano", NULL);
View
@@ -130,7 +130,7 @@ main (int argc, char **argv)
oregano_config_load ();
- if (!g_file_test (OREGANO_GLADEDIR "/sim-settings.glade2",
+ if (!g_file_test (OREGANO_GLADEDIR "/sim-settings.glade",
G_FILE_TEST_EXISTS)) {
msg = g_strdup_printf (
_("You seem to be running Oregano without\n"
View
@@ -1,165 +0,0 @@
-zener: .MODEL wally D IS 1E-14 N 1 BV 15 IBV 5M
-
-
- 1) Diode 1N4148�� SPICE Model Parameter
-
- .model D1N4148 (Is=0.1pA Rs=16 CJO=2p Tt=12n Bv=100 Ibv=0.1p)
-
-
- 2) Zener Diode 1N3020�� SPICE Macro Model netlist
-
- .subckt zener_diode 1 2
-
- Dforward 1 2 1mA_diode
-
- Dreverse 2 4 ideal_diode
-
- Vzo 4 3 DC 4.9V
-
- Rz 1 3 10
-
- .model 1mA_diode D (Is=100pA n=1.679)
-
- .model ideal_diode D (Is=100pA n=0.01)
-
- .ends zener_diode
-
-* zener diode subcircuit
-.subckt zener_diode 1 2
-* connections: | |
-* anode |
-* cathode
-Dforward 1 2 1mA_diode
-Dreverse 2 4 ideal_diode
-Vz0 4 3 DC 7.3V
-Rz 1 3 10
-* diode model statement
-.model 1mA_diode D (Is=100pA n=1.679 )
-.model ideal_diode D (Is=100pA n=0.01 )
-.ends zener_diode
-
-** Circuit Description **
-* dc supplies
-Vdd 1 0 DC +10V
-* JFET circuit
-J1 2 0 3 n_jfet
-Rd 1 2 1k
-Rs 3 0 0.5k
-* n-channel jfet model statement
-.model n_jfet NJF (beta=1m Vto=-4V lambda=0)
-** Analysis Requests **
-* calculate DC bias point
-.OP
-** Output Requests **
-* none required
-.end
-
-
-
-** Circuit Description **
-* dc supplies
-Vdd 1 0 DC +5V
-Vss 4 0 DC -5V
-Ib 1 2 DC 1mA
-* JFET circuit
-J1 3 0 2 p_jfet
-Rd 3 4 2k
-* p-channel jfet model statement
-.model p_jfet PJF (beta=1m Vto=-2V lambda=0)
-** Analysis Requests **
-* calculate DC bias point
-.OP
-** Output Requests **
-* none required
-.end
-
-
-
-Subcircuit for the 741 Op Amp Circuit
-
-.subckt uA741 1 2 3 4 5
-* connections: | | | | |
-* | | | | |
-* non-inverting input | | | |
-* inverting input | | |
-* positive power supply | |
-* negative power supply |
-* output
-*
-*
- c1 11 12 8.661E-12
- c2 6 7 30.00E-12
- dc 5 53 dx
- de 54 5 dx
- dlp 90 91 dx
- dln 92 90 dx
- dp 4 3 dx
- egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
- fb 7 99 poly(5) vb vc ve vlp vln 0 10.61E6 -10E6 10E6 10E6 -10E6
- ga 6 0 11 12 188.5E-6
- gcm 0 6 10 99 5.961E-9
- iee 10 4 dc 15.16E-6
- hlim 90 0 vlim 1K
- q1 11 2 13 qx
- q2 12 1 14 qx
- r2 6 9 100.0E3
- rc1 3 11 5.305E3
- rc2 3 12 5.305E3
- re1 13 10 1.836E3
- re2 14 10 1.836E3
- ree 10 99 13.19E6
- ro1 8 5 50
- ro2 7 99 100
- rp 3 4 18.16E3
- vb 9 0 dc 0
- vc 3 53 dc 1
- ve 54 4 dc 1
- vlim 7 8 dc 0
- vlp 91 0 dc 40
- vln 0 92 dc 40
-.model dx D(Is=800.0E-18 Rs=1)
-.model qx NPN(Is=800.0E-18 Bf=93.75)
-.ends UA741
-
-
-
-
-* TTL Two-input NAND Gate
-.subckt NAND 10 9 4 1
-* connections: | | | |
-* inputA | | |
-* inputB | |
-* output |
-* Vcc
-*
-Q1a 7 8 10 npn_transistor
-Q1b 7 8 9 npn_transistor
-Q2 6 7 5 npn_transistor
-Q3 4 5 0 npn_transistor
-Q4 2 6 3 npn_transistor
-QD1 3 3 4 npn_transistor
-R1 1 8 4k TC=1200u
-R2 1 6 1.6k TC=1200u
-R3 5 0 1k TC=1200u
-R4 1 2 130 TC=1200u
-* BJT model statement
-.model npn_transistor npn (Is=1.81e-15 Bf=50 Br=0.02 Va=100
-+ Tf=0.1ns Cje=1pF Cjc=1.5pF)
-.ends NAND
-
-** Main Circuit **
-* dc supplies
-Vcc 1 0 DC +5V
-* input digital signals
-Va 10 0 DC 0V
-Vb 9 0 DC +5V
-* 1st NAND gate: inputB is held high
-Xnand_gate1 10 9 4 1 NAND
-* 2nd NAND gate: inputB is held high
-Xnand_gate2 4 9 40 1 NAND
-** Analysis Requests **
-.DC Va 0V 5V 40mV
-** Output Requests **
-.Plot DC V(4) I(Va)
-.probe
-.end
Oops, something went wrong.

0 comments on commit 72d80f8

Please sign in to comment.