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1db7d33 @maxn7 Les fichiers sources suffiront...
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1 ----------------------------------------------------------------------------------
2 -- Company:
3 -- Engineer:
4 --
5 -- Create Date: 16:30:12 04/23/2012
6 -- Design Name:
7 -- Module Name: trouver_digit - Behavioral
8 -- Project Name:
9 -- Target Devices:
10 -- Tool versions:
11 -- Description:
12 --
13 -- Dependencies:
14 --
15 -- Revision:
16 -- Revision 0.01 - File Created
17 -- Additional Comments:
18 --
19 ----------------------------------------------------------------------------------
20 library IEEE;
21 use IEEE.STD_LOGIC_1164.ALL;
22 use IEEE.STD_LOGIC_UNSIGNED.ALL;
23 use IEEE.STD_LOGIC_ARITH.ALL;
24
25 -- Uncomment the following library declaration if using
26 -- arithmetic functions with Signed or Unsigned values
27 --use IEEE.NUMERIC_STD.ALL;
28
29 -- Uncomment the following library declaration if instantiating
30 -- any Xilinx primitives in this code.
31 --library UNISIM;
32 --use UNISIM.VComponents.all;
33
34 entity trouver_digit is
35 Port ( frequence : in STD_LOGIC_VECTOR (23 downto 0);
36 puissance : in STD_LOGIC_VECTOR (2 downto 0);
37 position_point : in STD_LOGIC_VECTOR (1 downto 0);
38 digit : out STD_LOGIC_VECTOR (3 downto 0);
39 point_on : out STD_LOGIC;
40 clk : in STD_LOGIC;
41 rst : in STD_LOGIC;
42 selecteur : out STD_LOGIC_VECTOR (3 downto 0));
43 end trouver_digit;
44
45 architecture Behavioral of trouver_digit is
46
47 type etat is (init,calc_digit,attente, incremente,affiche,calc_comp,soustraction);
48 signal etatf : etat; --etat futur
49 signal etatp : etat; --etat present
50
51 signal Spuissance : STD_LOGIC_VECTOR (2 downto 0);
52 signal Sfrequence : STD_LOGIC_VECTOR (23 downto 0);
53 signal comp : STD_LOGIC_VECTOR (23 downto 0);
54 signal Sdigit : STD_LOGIC_VECTOR (3 downto 0);
55 signal step : STD_LOGIC_VECTOR (1 downto 0);
56
57
58 begin
59
60 --Bloc F
61 process(etatp, rst)
62 begin
63 if rst='0' then etatf <=init ;
64 else
65 case etatp is
66 when init => etatf <= calc_comp;
67
68 when calc_comp => etatf <= soustraction;
69
70 when soustraction => etatf <= calc_digit;
71
72 when calc_digit =>
73 if(Sfrequence < comp) then etatf <= affiche;
74 else etatf <= soustraction;
75 end if;
76
77 when affiche => etatf<= attente;
78
79 when attente =>
80 if(comp = X"00C350") then
81 if(step = "00") then etatf <= init;
82 else etatf <= calc_comp;
83 end if;
84 else etatf <= incremente;
85 end if;
86
87 when incremente => etatf <= attente;
88
89 when others => etatf <= init;
90
91 end case;
92 end if;
93 end process;
94
95 --Bloc M
96 process(clk, rst)
97 begin
98 if (clk'event and clk = '1') then etatp <= etatf ;
99 end if;
100 end process;
101
102 --Bloc G
103 process(clk)
104 begin
105 if(clk'event and clk='1') then
106
107 case etatp is
108 when init => step <= "00"; Sfrequence <= frequence; Spuissance<=puissance;
109
110 when calc_comp => Sdigit <= "0001";
111 if(Spuissance="110") then comp <= X"0F4240"; --10^6
112 elsif(Spuissance="101") then comp <= X"0186A0"; --10^5
113 elsif(Spuissance="100") then comp <= X"002710"; --10^4
114 elsif(Spuissance="011") then comp <= X"0003E8"; --10^3
115 elsif(Spuissance="010") then comp <= X"000064"; --10^2
116 elsif(Spuissance="001") then comp <= X"00000A"; --10^1
117 elsif(Spuissance="000") then comp <= X"000001"; --10^0
118 else comp <= X"000001"; --10^0
119 end if;
120
121 when soustraction => Sfrequence <= Sfrequence - comp;
122
123 when calc_digit =>
124 if(Sfrequence >= comp) then Sdigit <= Sdigit + 1;
125 --elsif(Sfrequence = comp) then Sdigit <= Sdigit + 1;
126 end if;
127
128 when affiche =>
129 step <= step - 1 ;
130 Spuissance <= Spuissance - 1;
131 comp <= X"000000"; --Le signal va servir pour le comptage
132 digit <= Sdigit;
133 --dec_sel affiche valeur
134 --dec_point affiche point
135
136 when incremente =>
137 comp <= comp + 1; -- c'est le bloc F qui vérifie si on dépasse la valeur
138
139 when others =>
140
141 end case;
142
143 end if;
144 end process;
145
146 --dec_sel
147 process(step)
148 begin
149 if(step="11") then selecteur <= "1000";
150 elsif(step="10") then selecteur <= "0100";
151 elsif(step="01") then selecteur <= "0010";
152 else selecteur <= "0001";
153 end if;
154 end process;
155
156 --point_sel
157 process(position_point, step)
158 begin
159 if(position_point = step) then point_on <='1';
160 else point_on <= '0';
161 end if;
162 end process;
163
164
165 end Behavioral;
166
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