Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>

…scottwood/linux into next

Freescale updates from Scott:

"Highlights include 8xx breakpoints and perf, t1042rdb display support,
and board updates."

Commit b91e130 ("mm: optimize PageWaiters bit use for
unlock_page()") added a special bitop function to speed up
unlock_page(). Implement this for 64-bit powerpc.

This improves the unlock_page() core code from this:

	li	9,1
	lwsync
1:	ldarx	10,0,3,0
	andc	10,10,9
	stdcx.	10,0,3
	bne-	1b
	ori	2,2,0
	ld	9,0(3)
	andi.	10,9,0x80
	beqlr
	li	4,0
	b	wake_up_page_bit

To this:

	li	10,1
	lwsync
1:	ldarx	9,0,3,0
	andc	9,9,10
	stdcx.	9,0,3
	bne-	1b
	andi.	10,9,0x80
	beqlr
	li	4,0
	b	wake_up_page_bit

In a test of elapsed time for dd writing into 16GB of already-dirty
pagecache on a POWER8 with 4K pages, which has one unlock_page per 4kB
this patch reduced overhead by 1.1%:

    N           Min           Max        Median           Avg        Stddev
x  19         2.578         2.619         2.594         2.595         0.011
+  19         2.552         2.592         2.564         2.565         0.008
Difference at 95.0% confidence
	-0.030  +/- 0.006
	-1.142% +/- 0.243%

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Made 64-bit only until I can test it properly on 32-bit]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

The local variable @Iov isn't used, to remove it.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

The CAPI driver creates virtual PHB (vPHB) from the CAPI adapter.
The vPHB's IO and memory windows aren't built from device-tree node
as we do for normal PHBs. A error message is thrown in below path
when trying to probe AFUs contained in the adapter. The error message
is confusing and unnecessary.

    cxl_probe()
    pci_init_afu()
    cxl_pci_vphb_add()
    pcibios_scan_phb()
    pcibios_setup_phb_resources()

This removes the error message. We might have the case where the
first memory window on real PHB isn't populated properly because
of error in "ranges" property in the device-tree node. We can check
the device-tree instead for that. This also removes one unnecessary
blank line in the function.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

This fixes the typo about the _PAGE_PTE in set_pte_at() by changing
"tryint" to "trying to".

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

pnv_php_disable_irq() can be called in two paths: Bailing path in
pnv_php_enable_irq() or releasing slot. The MSI (or MSIx) interrupts
is disabled unconditionally in pnv_php_disable_irq(). It's wrong
because that might be enabled by drivers other than pnv-php.

This disables MSI (or MSIx) interrupts and the PCI device only if
it was enabled by pnv-php. In the error path of pnv_php_enable_irq(),
we rely on the newly added parameter @disable_device. In the path
of releasing slot, @pnv_php->irq is checked.

Cc: <stable@vger.kernel.org> # v4.9+
Fixes: 360aebd ("drivers/pci/hotplug: Support surprise hotplug in powernv driver")
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

The root port or PCIe switch downstream port might have been associated
with driver other than pnv-php. The MSI or MSIx might also have been
enabled by that driver (e.g. pcieport_drv). Attempt to enable MSI incurs
below backtrace:

 PowerPC PowerNV PCI Hotplug Driver version: 0.1
 ------------[ cut here ]------------
 WARNING: CPU: 19 PID: 1004 at drivers/pci/msi.c:1071 \
                              __pci_enable_msi_range+0x84/0x4e0
 NIP [c000000000665c34] __pci_enable_msi_range+0x84/0x4e0
 LR [c000000000665c24] __pci_enable_msi_range+0x74/0x4e0
 Call Trace:
 [c000000384d67600] [c000000000665c24] __pci_enable_msi_range+0x74/0x4e0
 [c000000384d676e0] [d00000000aa31b04] pnv_php_register+0x564/0x5a0 [pnv_php]
 [c000000384d677c0] [d00000000aa31658] pnv_php_register+0xb8/0x5a0 [pnv_php]
 [c000000384d678a0] [d00000000aa31658] pnv_php_register+0xb8/0x5a0 [pnv_php]
 [c000000384d67980] [d00000000aa31dfc] pnv_php_init+0x60/0x98 [pnv_php]
 [c000000384d679f0] [c00000000000cfdc] do_one_initcall+0x6c/0x1d0
 [c000000384d67ab0] [c000000000b92354] do_init_module+0x94/0x254
 [c000000384d67b40] [c00000000019719c] load_module+0x258c/0x2c60
 [c000000384d67d30] [c000000000197bb0] SyS_finit_module+0xf0/0x170
 [c000000384d67e30] [c00000000000b184] system_call+0x38/0xe0

This fixes the issue by skipping enabling the surprise hotplug
capability if the MSI or MSIx on the PCI slot's upstream port has
been enabled by other driver.

Cc: <stable@vger.kernel.org> # v4.9+
Fixes: 360aebd ("drivers/pci/hotplug: Support surprise hotplug in powernv driver")
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Tested-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

The WARN_ON() causes unnecessary backtrace when putting the parent
slot, which is likely to be NULL.

 WARNING: CPU: 2 PID: 1071 at drivers/pci/hotplug/pnv_php.c:85 \
                              pnv_php_release+0xcc/0x150 [pnv_php]
    :
 Call Trace:
 [c0000003bc007c10] [d00000000ad613c4] pnv_php_release+0x144/0x150 [pnv_php]
 [c0000003bc007c40] [c0000000006641d8] pci_hp_deregister+0x238/0x330
 [c0000003bc007cd0] [d00000000ad61440] pnv_php_unregister_one+0x70/0xa0 [pnv_php]
 [c0000003bc007d10] [d00000000ad614c0] pnv_php_unregister+0x50/0x80 [pnv_php]
 [c0000003bc007d40] [d00000000ad61e84] pnv_php_exit+0x50/0xcb4 [pnv_php]
 [c0000003bc007d70] [c00000000019499c] SyS_delete_module+0x1fc/0x2a0
 [c0000003bc007e30] [c00000000000b184] system_call+0x38/0xe0

Cc: <stable@vger.kernel.org> # v4.8+
Fixes: 6672515 ("PCI/hotplug: PowerPC PowerNV PCI hotplug driver")
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Tested-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

PVR value of 0x0F000005 means we are arch v3.00 compliant (i.e. POWER9).

Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Russell Currey <ruscur@russell.cc>
[mpe: Don't set num_pmcs, so we keep the PMU fields from the raw entry]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Cleanup to use is_kernel_addr macro.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Since power9 does not support FAB_*_MATCH bits in MMCR1,
avoid these checks for power9. For this, patch factor out
code in isa207_get_constraint() to retain these checks
only for power8.

Patch also updates the comment in power9-pmu raw event
encode layout to remove FAB_*_MATCH.

Finally for power9, patch adds additional check for
threshold events when adding the thresh mask and value in
isa207_get_constraint().

fixes: 7ffd948 ('powerpc/perf: factor out power8 pmu functions')
fixes: 18201b2 ('powerpc/perf: power9 raw event format encoding')
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

PMC5 on POWER9 DD1 may not provide right counts in all
sampling scenarios, hence use PM_INST_DISP event instead
in PMC2 or PMC3 in preference.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Since PM_INST_DISP include speculative instruction,
based on the workload the dispatch count could vary
considerably. Hence as an alternative, for completed
instruction counting, program the PM_INST_DISP event
to the MMCR* but use Instruction Counter register value.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Since PM_INST_CMPL may not provide right counts in all
sampling scenarios in power9 DD1, instead use PM_INST_DISP.
Patch also update generic instruction sampling with the same.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Factor out the power8 event_alternative function to share
the code with power9.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Indexed-count remove for memory hotplug guarantees that a contiguous block
of <count> lmbs beginning at a specified <index> will be unassigned (NOT
that <count> lmbs will be removed). Because of Qemu's per-DIMM memory
management, the removal of a contiguous block of memory currently
requires a series of individual calls. Indexed-count remove reduces
this series into a single call.

Signed-off-by: Sahil Mehta <sahilmehta17@gmail.com>
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Indexed-count add for memory hotplug guarantees that a contiguous block
of <count> lmbs beginning at a specified <drc index> will be assigned,
any LMBs in this range that are not already assigned will be DLPAR added.
Because of Qemu's per-DIMM memory management, the addition of a contiguous
block of memory currently requires a series of individual calls to add
each LMB in the block. Indexed-count add reduces this series of calls to
a single call for the entire block.

Signed-off-by: Sahil Mehta <sahilmehta17@gmail.com>
Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

We can't sensibly take a trap at this point. So, blacklist these
symbols.

Reported-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

slb_finish_load and slb_finish_load_1T are both only used within
slb_low.S, so make them local symbols.

This makes the code a little clearer, as it's more obvious neither is
intended to be an entry point from arbitrary other code, only the uses
in this file.

It also prevents them being used with kprobes and other tracing tools,
which is good because we're not able to safely take traps at these
locations, so making them local symbols avoids us needing to blacklist
them.

Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

The block guys have merged a new driver called "sed-opal", which is
getting caught by our pattern match on "opal".

So drop our "opal" pattern and replace it with matches against the
specific paths for our drivers. We should try and remember to add new
drivers as they're added in future.

Suggested-by: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
[mpe: Fix ic2/i2c typo, write change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

We broke the build when CONFIG_MEMORY_HOTREMOVE=n:

  arch/powerpc/platforms/pseries/hotplug-memory.c:821:8: error: implicit
  declaration of function 'dlpar_memory_readd_by_index'

Add a dummy to fix it.

Fixes: e70d597 ("powerpc/pseries: Introduce memory hotplug READD operation")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

There are quite a few entries in asm-offests.c which look like:

  DEFINE(REG, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, reg));

So define a macro to do it once.

Signed-off-by: Rashmica Gupta <rashmicy@gmail.com>
[mpe: Rename to STACK_PT_REGS_OFFSET for excruciating explicitness]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

A lot of entries in asm-offests.c look like this:

  DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));

But there is a common macro, OFFSET, which makes this cleaner:

  OFFSET(TI_flags, thread_info, flags)

So use it.

Signed-off-by: Rashmica Gupta <rashmicy@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

In all the years it's been in the tree it had never been used by
anything - it would instantly trigger BUG_ON() in fs/fcntl.c due to
bogus band argument (ie. POLLIN not POLL_IN) passed to kill_fasync().
Since nobody had ever used it in ten years, let's just rip it out and be
done with that.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

WARN_ONCE() takes a condition and a format string. We were passing a
constant string as the condition, and the function name as the format
string. It would work, but the message would be just the function name.

Fix it by just using WARN_ONCE() directly instead of if (x) WARN_ONCE().

Noticed-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

We're supporting surprise hotplug on PCI slots behind root port
or PCIe switch downstream ports, which don't claim the capability
in hardware register (offset: PCIe cap + PCI_EXP_SLTCAP). PEX8718
is one of the examples. For those PCI slots, the PDC (Presence
Detection Change) event isn't reliable and the underly (skiboot)
firmware has best judgement.

This masks the PDC event when skiboot requests by "ibm,slot-broken-pdc"
property in PCI slot's device-tree node.

Reported-by: Hank Chang <hankmax0000@gmail.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Tested-by: Willie Liauw <williel@supermicro.com.tw>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

In PowerNV PCI hotplug driver, the initial PCI slot's state is set
to PNV_PHP_STATE_POPULATED if no PCI devices are connected to the
slot. The PCI devices that are hot added to the slot won't be probed
and populated because of the check in pnv_php_enable():

        /* Check if the slot has been configured */
        if (php_slot->state != PNV_PHP_STATE_REGISTERED)
                return 0;

This fixes the issue by leaving the slot in PNV_PHP_STATE_REGISTERED
state initially if nothing is connected to the slot.

Fixes: 360aebd ("drivers/pci/hotplug: Support surprise hotplug in powernv driver")
Cc: stable@vger.kernel.org #v4.9+
Reported-by: Hank Chang <hankmax0000@gmail.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Tested-by: Willie Liauw <williel@supermicro.com.tw>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

The surprise hotplug is driven by interrupt in PowerNV PCI hotplug
driver. In the interrupt handler, pnv_php_interrupt(), we bail when
pnv_pci_get_presence_state() returns zero wrongly. It causes the
presence change event is always ignored incorrectly.

This fixes the issue by bailing on error (non-zero value) returned
from pnv_pci_get_presence_state().

Fixes: 360aebd ("drivers/pci/hotplug: Support surprise hotplug in powernv driver")
Cc: stable@vger.kernel.org #v4.9+
Reported-by: Hank Chang <hankmax0000@gmail.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Tested-by: Willie Liauw <williel@supermicro.com.tw>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

After updating ppc-dis.c, ppc-opc.c and ppc.h the following changes were
made to enable compilation and working of xmon:

  1.  Remove all disassembler_info
  2.  Use xmon's printf/print_address to output data and addresses
      respectively.
  3.  All bfd_* types and casts have been removed.
  4.  Optimizations related to opcd_indices have been removed.
  5.  The dialect is set based on cpu features.
  6.  PPC_OPCODE_CLASSIC is no longer supported in the new
      disassembler.
  7.  VLE opcode parsing and printing has been stripped.
  8.  Coding style conventions used for those routines has
      been retained and it does not match our CodingStyle.
  9.  The highest supported dialect is POWER9.
  10. Defined ATTRIBUTE_UNUSED in ppc-dis.c.
  11. Defined _(x) in ppc-dis.c.

Finally, we remove the dependency on BROKEN so that XMON_DISASSEMBLY can
be enabled again.

Signed-off-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

The following commit-ids from the binutils project were applied on the
xmon branch and relicensed with the permission of the authors under
GPLv2 for the following files:

  ppc-opc.c
  ppc-dis.c
  ppc.h

Working off of binutils commit 65b650b4c746 we have now moved up to
binutils commit a5721ba270dd.

Some commit logs have been taken verbatim, some are summarized for ease
of understanding.

Here is a summary of the commits:

 33e8d5ac613d PPC7450 New.  (powerpc_opcodes): Use it in dcba.
 c3d65c1ced61 New opcodes and mask
 8dbcd839b1bb Instruction Sorting
 91eb7075e370 (powerpc_opcodes): Fix the first two operands of dquaiq.
 548b1dcfcbab ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix.
 930bb4cfae30 Support optional L form mtmsr.
 de866fccd87d (powerpc_opcodes): Order and format.
 19a6653ce8c6 ppc e500mc support
 fa452fa6833c (ppc_cpu_t): New typedef.
 c8187e1509b2 (parse_cpu): Handle -m464.
 081ba1b3c08b Define. (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI)
 9b4e57660d38 Rename altivec_or_spe to retain_flags. Handle -mvsx and -mpower7.
 899d85beadd0 (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 e1c93c699b7d (extract_sprg): Correct operand range check.
 2f3bb96af796 (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
 1cb0a7674666 (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test
 21169fcfadfa (print_insn_powerpc): Skip insn if it is deprecated
 80890a619b85 ("dcbt", "dcbtst")
 0e55be1624c2 ("lfdepx", "stfdepx")
 066be9f7bd8e (parse_cpu): Extend -mpower7 to accept power7 and isel instructions.
 c72ab5f2c55d (powerpc_opcodes): Reorder the opcode table so that instructions
 69fe9ce501f5 (ppc_parse_cpu): New function. 	(powerpc_init_dialect)
 e401b04ca7cd (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and E500MC entries.
 70dc4e324b9a (powerpc_init_dialect): Do not choose a default dialect due to -many/-Many.
 858d7a6db20b (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva", "tlbilx"
 bdc7fcfe59f1 (powerpc_macros <extrdi>): Allow n+b of 64
 e0d602ecffb0 (md_show_usage): Document -mpcca2
 b961e85b6ebe (ppc_cpu_t): Typedef to uint64_t
 8765b5569284 (powerpc_opcodes): Remove support for the the "lxsdux", "lxvd2ux"
 634b50f2a623 Rename "ppca2" to "a2"
 9fe54b1ca1c0 (md_show_usage): Document -m476
 0dc9305793c8 Add bfd_mach_ppc_e500mc64
 ce3d2015b21b Define. bfd/ 	* archures.c (bfd_mach_ppc_titan)
 cdc51b0748c4 Add -mpwr4, -mpwr5, -mpwr5x, -mpwr6 and -mpwr7
 63d0fa4e9e57 Add PPC_OPCODE_E500MC for "e500mc64"
 cee62821d472 New Define. ("dccci"): Enable for PPCA2
 85d4ac0b3c0b Correct wclr encoding.
 51b5d4a8c5e5 (powerpc_opcodes): Enable divdeu, devweu, divde, divwe, divdeuo
 e01d869a3be2 (md_assemble): Emit APUinfo section for PPC_OPCODE_E500
 09a8ad8d8f56 (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf and mtocrf on EFS.
 f2bae120dcef (PPC_OPCODE_COMMON): Expand comment.
 81a0b7e2ae09 (PPCPWR2): Add PPC_OPCODE_COMMON. (powerpc_opcodes): Add "subc"
 bdc70b4a03fd (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC)
 7102e95e4943 (ppc_set_cpu): Cast PPC_OPCODE_xxx to ppc_cpu_t before inverting
 f383de6633cb (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate on E500 and E500MC
 6b069ee70de3 Remove PPC_OPCODE_PPCPS
 2f7f77101279 (powerpc_opcodes): Enable icswx for POWER7
 989993d80a97 (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX, RBX)
 a08fc94222d1 <drrndq, drrndq., dtstexq, dctqpq, dctqpq., dctfixq, dctfixq.
 8ebac3aae962 (ISA_V2): Define and use for relevant BO field tests
 aea77599d0db Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR
 b240011aba98 (disassemble_init_for_target): Handle ppc init.
 d668828207c2 (powerpc_opcd_indices): Bump array size
 b9c361e0ad33 Add support for PowerPC VLE.
 e1dad58d73dc (has_tls_reloc, has_tls_get_addr_call, has_vle_insns, is_ppc_vle)
 df7b86aa4cb6 Add check that sysdep.h has been included before
 98c76446ea6b (extract_sprg): Use ALLOW8_SPRG to include VLE.
 a4ebc835cbcb (powerpc_macros): Add entries for e_extlwi to e_clrlslwi
 94caa966375d (has_vle_insns, is_ppc_vle): Delete
 c7a8dbf91f37 Change RA to RA0
 d908c8af5a1d Add necessary casts for printing integer values
 03edbe3bfb93 Add/remove PPCVLE for some 32-bit insns
 9f6a6cc022e1 <xnop, yield, mdoio, mdoom>: New extended mnemonics
 588925d06545 <RSQ, RTQ>: Use PPC_OPERAND_GPR
 8baf7b78b5d9 <"lswx">: Use RAX for the second and RBX for the third operand
 e67ed0e885d6 Changed opcode for vabsdub, vabsduh, vabsduw, mviwsplt
 fb048c26f19f (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK, VXVDVA_MASK
 382c72e90441 (VXASHB_MASK): New define
 c7a5aa9c64fc (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2
 ab4437c3224f <vcfpsxws>: Fix opcode spelling
 62082a42b9cd "lfdp" and "stfdp" use DS offset.
 776fc41826bb (ppc_parse_cpu): Update prototype
 943d398f4c52 (insert_sci8, extract_sci8): Rewrite.
 5817ffd1f81c New define (PPC_OPCODE_HTM/POWER8)
 9f0682fe89d9 (extract_vlesi): Properly sign extend
 c0637f3af686 (powerpc_init_dialect): Set default dialect to power8.
 58ae08f29af8 (powerpc_opcodes): Add tdui, twui, tdu, twu, tui, tu
 4f6ffcd38d90 (powerpc_init_dialect): Use ppc_parse_cpu() to set dialect
 4b95cf5c0c75 Update copyright years
 a47622ac1bad Allow both signed and unsigned fields in PowerPC cmpli insn
 12e87fac5c76 ppc: enable msgclr and msgsnd on Power8
 8514e4db84cc Don't deprecate powerpc mftb insn
 db76a70026ab Power4 should treat mftb as extended mfspr mnemonic
 b90efa5b79ac ChangeLog rotatation and copyright year update
 c4e676f19656 powerpc: Add slbfee. instruction
 27c49e9a8fc0 powerpc: Only initialise opcode indices once
 4fff86c517ab DCBT_EO): New define
 4bc0608a8b69 Fix some PPC assembler errors
 dc302c00611b Add hwsync extended mnemonic
 99a2c5612124 Remove unused MTMSRD_L macro and re-add accidentally deleted comment
 11a0cf2ec0ed Allow for optional operands with non-zero default values
 7b9341139a69 PPC sync instruction accepts invalid and incompatible operands
 ef5a96d564a2 Remove ppc860, ppc750cl, ppc7450 insns from common ppc
 43e65147c07b Remove trailing spaces in opcodes
 6dca4fd141fd Add dscr and ctrl SPR mnemonics
 b6518b387185 Fix compile time warnings generated when compiling with clang
 36f7a9411dcd Patches for illegal ppc 500 instructions
 a680de9a980e Add assembler, disassembler and linker support for power9
 dd2887fc3de4 Reorder some power9 insns
 b817670b52b7 Enable 2 operand form of powerpc mfcr with -many
 6f2750feaf28 Copyright update for binutils
 afa8d4054b8e Delete opcodes that have been removed from ISA 3.0
 1178da445ad5 Accept valid one byte signed and unsigned values for the IMM8 operand
 e43de63c8fd1 Fix powerpc subis range
 514e58b72633 Correct "Fix powerpc subis range"
 19dfcc89e8d9 Add support for new POWER ISA 3.0 instructions
 1fe0971e41a4 add more extern C
 026122a67044 Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu
 14b57c7c6a53 PowerPC VLE
 6fd3a02da554 Add support for yet some more new ISA 3.0 instructions
 dfdaec14b0db Fix some PowerPC VLE BFD issues and add some PowerPC VLE instructions
 fd486b633e87 Modify POWER9 support to match final ISA 3.0 documentation
 a5721ba270dd Disallow 3-operand cmp[l][i] for ppc64

This updates the disassembly capabilities to add support for newer
processors.

Signed-off-by: Balbir Singh <bsingharora@gmail.com>
[mpe: Reformat commit list for brevity]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Upgrade ppc-opc.c, ppc-dis.c and ppc.h to the versions belonging to the
following binutils commit:

  65b650b4c7463f4508bed523c24ab0031a5ae5cd
  * ppc-dis.c (print_insn_powerpc): Don't skip all operands after
    setting skip_optional.

That is the last version of those files that were licensed under GPLv2.

This leaves the code in a state that does not compile, because the
binutils code needs to be tweaked to work in the kernel. We don't fix
that in this commit, because we want to import more binutils changes in
subsequent commits. So for now we mark XMON_DISASSEMBLY as BROKEN, so it
can't be built.

Signed-off-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>