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@@ -184,26 +184,40 @@ static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) { |
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// Instruction definitions
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// Beware pre-processor antics
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+ATTRIBUTE_NOINLINE static void _additionS(struct ARMCore* cpu, int32_t m, int32_t n, int32_t d) {
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+ cpu->cpsr.n = ARM_SIGN(d);
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+ cpu->cpsr.z = !d;
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+ cpu->cpsr.c = ARM_CARRY_FROM(m, n, d);
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+ cpu->cpsr.v = ARM_V_ADDITION(m, n, d);
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+}
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+
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+ATTRIBUTE_NOINLINE static void _subtractionS(struct ARMCore* cpu, int32_t m, int32_t n, int32_t d) {
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+ cpu->cpsr.n = ARM_SIGN(d);
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+ cpu->cpsr.z = !d;
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+ cpu->cpsr.c = ARM_BORROW_FROM(m, n, d);
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+ cpu->cpsr.v = ARM_V_SUBTRACTION(m, n, d);
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+}
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+
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+ATTRIBUTE_NOINLINE static void _neutralS(struct ARMCore* cpu, int32_t d) {
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+ cpu->cpsr.n = ARM_SIGN(d);
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+ cpu->cpsr.z = !d; \
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+ cpu->cpsr.c = cpu->shifterCarryOut; \
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+}
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+
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#define ARM_ADDITION_S(M, N, D) \
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if (rd == ARM_PC && _ARMModeHasSPSR(cpu->cpsr.priv)) { \
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cpu->cpsr = cpu->spsr; \
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_ARMReadCPSR(cpu); \
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} else { \
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- cpu->cpsr.n = ARM_SIGN(D); \
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- cpu->cpsr.z = !(D); \
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- cpu->cpsr.c = ARM_CARRY_FROM(M, N, D); \
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- cpu->cpsr.v = ARM_V_ADDITION(M, N, D); \
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+ _additionS(cpu, M, N, D); \
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}
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#define ARM_SUBTRACTION_S(M, N, D) \
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if (rd == ARM_PC && _ARMModeHasSPSR(cpu->cpsr.priv)) { \
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cpu->cpsr = cpu->spsr; \
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_ARMReadCPSR(cpu); \
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} else { \
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- cpu->cpsr.n = ARM_SIGN(D); \
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- cpu->cpsr.z = !(D); \
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- cpu->cpsr.c = ARM_BORROW_FROM(M, N, D); \
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- cpu->cpsr.v = ARM_V_SUBTRACTION(M, N, D); \
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+ _subtractionS(cpu, M, N, D); \
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}
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#define ARM_SUBTRACTION_CARRY_S(M, N, D, C) \
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@@ -222,9 +236,7 @@ static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) { |
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cpu->cpsr = cpu->spsr; \
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_ARMReadCPSR(cpu); \
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} else { \
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- cpu->cpsr.n = ARM_SIGN(D); \
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- cpu->cpsr.z = !(D); \
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- cpu->cpsr.c = cpu->shifterCarryOut; \
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+ _neutralS(cpu, D); \
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}
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#define ARM_NEUTRAL_HI_S(DLO, DHI) \
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