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Observed at 4aed125.
The disassembler appears not to note the writeback flag when disassembling ldr/str instructions.
For example:
ldrh r8, [r7, r2]! ; opcode e1b780b2 ldrh r8, [r7, r2] ; opcode e19780b2
mGBA will display both instructions as ldrh r8, [r7, r2], missing the trailing !, but will correctly perform the writeback when executing.
ldrh r8, [r7, r2]
!
This appears to affect all forms - all of ldr, ldrh, ldrb, str, strh, strb, with both register offsets and immediate offsets.
ldr
ldrh
ldrb
str
strh
strb
The text was updated successfully, but these errors were encountered:
I'm pretty sure this used to work. It may be a recent regression. Checking now.
Sorry, something went wrong.
a2cd8f6
ARM Decoder: Fix decoding pre-indexed writeback instructions (fixes #…
67cf9b7
…1915)
This was indeed a regression, but not a recent one. It broke in 0.2.0.
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Observed at 4aed125.
The disassembler appears not to note the writeback flag when disassembling ldr/str instructions.
For example:
mGBA will display both instructions as
ldrh r8, [r7, r2]
, missing the trailing!
, but will correctly perform the writeback when executing.This appears to affect all forms - all of
ldr
,ldrh
,ldrb
,str
,strh
,strb
, with both register offsets and immediate offsets.The text was updated successfully, but these errors were encountered: