HALTCNT accesses should only work via BIOS code

[fleroviux]

I found two edge-cases when accessing HALTCNT:

1. writes to HALTCNT seem to not work when R15 is not inside the BIOS region. I.e. on hardware a direct write from IWRAM or ROM code to HALTCNT doesn't appear to have any effect, but performing a CpuSet to it appears to work.
2. writing a halfword to HALTCNT & ~1 appears to work on HW but doesn't seem to work on mGBA?

I attached a test ROM which I used to confirm the behavior on AGB-001, AGS-100 and a N3DS.
The first value should be around 2, the second should be around 1038 but the exact values don't matter.

haltcnt.zip

[endrift]

Strange, I was pretty sure HALTCNT could be used to HALT outside of BIOS too.

But yes, I handle HALTCNT a bit weirdly internally to mGBA due to the POSTFLG flag being on the high byte. This is something I should fix.

[endrift]

I have a fix in preparation for this, but I'm not going to backport it into 0.10.3.

@fleroviux, do you know if the behavior of HALTCNT depends on the old state of POSTFLG? It seems like it should try to do a halt if you write to POSTFLG at the same time.

[fleroviux]

@endrift I'm not sure if I understand your question, could you elaborate? As far as I am aware POSTFLG cannot change after being set by the BIOS and HALTCNT doesn't really care / works the same regardless of what you write to the lower/POSTFLG byte.

[profi200]

My experience with the "POSTFLG" reg has been that it doesn't do anything besides changing the code path the BIOS takes on cold boot and it's write once. It didn't have any effect on HALTCNT. Games work fine if you don't set this reg and boot straight into them.