diff --git a/src/Ethernet.h b/src/Ethernet.h index 376e6c5..548da06 100644 --- a/src/Ethernet.h +++ b/src/Ethernet.h @@ -36,7 +36,7 @@ #if defined(RAMEND) && defined(RAMSTART) && ((RAMEND - RAMSTART) <= 2048) #define MAX_SOCK_NUM 4 #else -#define MAX_SOCK_NUM 8 +#define MAX_SOCK_NUM 4 #endif // By default, each socket uses 2K buffers inside the Wiznet chip. If @@ -45,7 +45,7 @@ // can really help with UDP protocols like Artnet. In theory larger // buffers should allow faster TCP over high-latency links, but this // does not always seem to work in practice (maybe Wiznet bugs?) -//#define ETHERNET_LARGE_BUFFERS +#define ETHERNET_LARGE_BUFFERS #include @@ -59,6 +59,10 @@ enum EthernetLinkStatus { LinkOFF }; +#if (ARDUINO_ARCH_SPRESENSE) +typedef enum EthernetLinkStatus link; +#endif + enum EthernetHardwareStatus { EthernetNoHardware, EthernetW5100, @@ -237,6 +241,7 @@ class EthernetClient : public Client { uint8_t getSocketNumber() const { return sockindex; } virtual uint16_t localPort(); virtual IPAddress remoteIP(); + virtual uint8_t getSockNum(); virtual uint16_t remotePort(); virtual void setConnectionTimeout(uint16_t timeout) { _timeout = timeout; } diff --git a/src/EthernetClient.cpp b/src/EthernetClient.cpp index e2406d7..d9a7c02 100644 --- a/src/EthernetClient.cpp +++ b/src/EthernetClient.cpp @@ -50,7 +50,7 @@ int EthernetClient::connect(IPAddress ip, uint16_t port) #if defined(ESP8266) || defined(ESP32) if (ip == IPAddress((uint32_t)0) || ip == IPAddress(0xFFFFFFFFul)) return 0; #else - if (ip == IPAddress(0ul) || ip == IPAddress(0xFFFFFFFFul)) return 0; + if (ip == IPAddress((uint32_t)0ul) || ip == IPAddress(0xFFFFFFFFul)) return 0; #endif sockindex = Ethernet.socketBegin(SnMR::TCP, 0); if (sockindex >= MAX_SOCK_NUM) return 0; @@ -213,3 +213,7 @@ uint16_t EthernetClient::remotePort() } +uint8_t EthernetClient::getSockNum(){ + if (sockindex >= MAX_SOCK_NUM) return 0; + return sockindex; +} diff --git a/src/utility/w5100.cpp b/src/utility/w5100.cpp index 4ae4ee7..dceb7c9 100644 --- a/src/utility/w5100.cpp +++ b/src/utility/w5100.cpp @@ -43,7 +43,7 @@ // As a final fallback, use pin 10 #else -#define SS_PIN_DEFAULT 10 +#define SS_PIN_DEFAULT 8 #endif @@ -110,32 +110,33 @@ uint8_t W5100Class::init(void) // reset its SPI state when CS goes high (inactive). Communication // from detecting the other chips can leave the W5200 in a state // where it won't recover, unless given a reset pulse. - if (isW5200()) { - CH_BASE_MSB = 0x40; -#ifdef ETHERNET_LARGE_BUFFERS -#if MAX_SOCK_NUM <= 1 - SSIZE = 16384; -#elif MAX_SOCK_NUM <= 2 - SSIZE = 8192; -#elif MAX_SOCK_NUM <= 4 - SSIZE = 4096; -#else - SSIZE = 2048; -#endif - SMASK = SSIZE - 1; -#endif - for (i=0; i> 10); - writeSnTX_SIZE(i, SSIZE >> 10); - } - for (; i<8; i++) { - writeSnRX_SIZE(i, 0); - writeSnTX_SIZE(i, 0); - } - // Try W5500 next. Wiznet finally seems to have implemented - // SPI well with this chip. It appears to be very resilient, - // so try it after the fragile W5200 - } else if (isW5500()) { +// if (isW5200()) { +// CH_BASE_MSB = 0x40; +// #ifdef ETHERNET_LARGE_BUFFERS +// #if MAX_SOCK_NUM <= 1 +// SSIZE = 16384; +// #elif MAX_SOCK_NUM <= 2 +// SSIZE = 8192; +// #elif MAX_SOCK_NUM <= 4 +// SSIZE = 4096; +// #else +// SSIZE = 2048; +// #endif +// SMASK = SSIZE - 1; +// #endif +// for (i=0; i> 10); +// writeSnTX_SIZE(i, SSIZE >> 10); +// } +// for (; i<8; i++) { +// writeSnRX_SIZE(i, 0); +// writeSnTX_SIZE(i, 0); +// } +// // Try W5500 next. Wiznet finally seems to have implemented +// // SPI well with this chip. It appears to be very resilient, +// // so try it after the fragile W5200 +// } else + if (isW5500()) { CH_BASE_MSB = 0x10; #ifdef ETHERNET_LARGE_BUFFERS #if MAX_SOCK_NUM <= 1 @@ -162,34 +163,37 @@ uint8_t W5100Class::init(void) // it recovers from "hearing" unsuccessful W5100 or W5200 // communication. W5100 is also the only chip without a VERSIONR // register for identification, so we check this last. - } else if (isW5100()) { - CH_BASE_MSB = 0x04; -#ifdef ETHERNET_LARGE_BUFFERS -#if MAX_SOCK_NUM <= 1 - SSIZE = 8192; - writeTMSR(0x03); - writeRMSR(0x03); -#elif MAX_SOCK_NUM <= 2 - SSIZE = 4096; - writeTMSR(0x0A); - writeRMSR(0x0A); -#else - SSIZE = 2048; - writeTMSR(0x55); - writeRMSR(0x55); -#endif - SMASK = SSIZE - 1; -#else - writeTMSR(0x55); - writeRMSR(0x55); -#endif - // No hardware seems to be present. Or it could be a W5200 - // that's heard other SPI communication if its chip select - // pin wasn't high when a SD card or other SPI chip was used. - } else { + } +// else if (isW5100()) { +// CH_BASE_MSB = 0x04; +// #ifdef ETHERNET_LARGE_BUFFERS +// #if MAX_SOCK_NUM <= 1 +// SSIZE = 8192; +// writeTMSR(0x03); +// writeRMSR(0x03); +// #elif MAX_SOCK_NUM <= 2 +// SSIZE = 4096; +// writeTMSR(0x0A); +// writeRMSR(0x0A); +// #else +// SSIZE = 2048; +// writeTMSR(0x55); +// writeRMSR(0x55); +// #endif +// SMASK = SSIZE - 1; +// #else +// writeTMSR(0x55); +// writeRMSR(0x55); +// #endif +// // No hardware seems to be present. Or it could be a W5200 +// // that's heard other SPI communication if its chip select +// // pin wasn't high when a SD card or other SPI chip was used. +// } + else { //Serial.println("no chip :-("); chip = 0; SPI.endTransaction(); + return 0; // no known chip is responding :-( } SPI.endTransaction(); @@ -202,14 +206,15 @@ uint8_t W5100Class::softReset(void) { uint16_t count=0; - //Serial.println("Wiznet soft reset"); + // Serial.println("Wiznet soft reset"); // write to reset bit writeMR(0x80); // then wait for soft reset to complete do { uint8_t mr = readMR(); - //Serial.print("mr="); - //Serial.println(mr, HEX); + // mr &= 0xBA; // mask reserved register fields + // Serial.print("mr="); + // Serial.println(mr, HEX); if (mr == 0) return 1; delay(1); } while (++count < 20); @@ -255,17 +260,30 @@ uint8_t W5100Class::isW5500(void) chip = 55; //Serial.println("w5100.cpp: detect W5500 chip"); if (!softReset()) return 0; + delay(1); writeMR(0x08); - if (readMR() != 0x08) return 0; + if (readMR() != 0x08) { + // Serial.println("isW5500 readMR != 0x08"); + return 0; + } writeMR(0x10); - if (readMR() != 0x10) return 0; + if (readMR() != 0x10) { + // Serial.println("isW5500 readMR != 0x10"); + return 0; + } writeMR(0x00); - if (readMR() != 0x00) return 0; + if (readMR() != 0x00) { + // Serial.println("isW5500 readMR != 0x00"); + return 0; + } int ver = readVERSIONR_W5500(); //Serial.print("version="); //Serial.println(ver); - if (ver != 4) return 0; - //Serial.println("chip is W5500"); + if (ver != 4) { + // Serial.println("isW5500 ver != 4"); + return 0; + } + // Serial.println("chip is W5500"); return 1; } @@ -314,7 +332,8 @@ uint16_t W5100Class::write(uint16_t addr, const uint8_t *buf, uint16_t len) cmd[3] = len & 0xFF; SPI.transfer(cmd, 4); #ifdef SPI_HAS_TRANSFER_BUF - SPI.transfer(buf, NULL, len); + SPI.transfer((void *)buf, (size_t)len); + // SPI.transfer(buf, NULL, len); #else // TODO: copy 8 bytes at a time to cmd[] and block transfer for (uint16_t i=0; i < len; i++) { @@ -370,7 +389,8 @@ uint16_t W5100Class::write(uint16_t addr, const uint8_t *buf, uint16_t len) } else { SPI.transfer(cmd, 3); #ifdef SPI_HAS_TRANSFER_BUF - SPI.transfer(buf, NULL, len); + SPI.transfer((void *)buf, (size_t)len); + // SPI.transfer(buf, NULL, len); #else // TODO: copy 8 bytes at a time to cmd[] and block transfer for (uint16_t i=0; i < len; i++) { diff --git a/src/utility/w5100.h b/src/utility/w5100.h index e6e01e1..1d56cbb 100644 --- a/src/utility/w5100.h +++ b/src/utility/w5100.h @@ -19,6 +19,7 @@ // Safe for all chips #define SPI_ETHERNET_SETTINGS SPISettings(14000000, MSBFIRST, SPI_MODE0) +#define SPI_HAS_TRANSFER_BUF // Safe for W5200 and W5500, but too fast for W5100 // Uncomment this if you know you'll never need W5100 support.