This repository contains examples of bare metal source code for the Configurable Custom Logic (CCL) as described in TB3218-Getting Started with Configurable Custom Logic (CCL) document from Microchip. The repository contains a Microchip Studio Solution with multiple projects inside:
- Logic AND Gate: This use case shows how to configure and use the CCL peripheral to implement an AND gate with three inputs (for more details, see Logic AND Gate).
- State Decoder: This use case shows how to configure the CCL peripheral to decode the presence of the
b'10110pattern on the input pins. A circuit composed of LUT0 and LUT1 is implemented to trigger its output when the inputs are in the form of the given pattern (for more details, see State Decoder). - SR Latch: This use case shows how to use the CCL combinational and sequential logic to implement an SR latch. This functionality is obtained by using two adjacent LUTs connected through a sequential logic block (for more details, see SR Latch).
More details and code examples on the ATMEGA4809 can be found at the following links:
- TB3218 - Getting Started with Configurable Custom Logic (CCL)
- ATMEGA4809 Product Page
- ATMEGA4809 Code Examples on GitHub
- ATMEGA4809 Project Examples in START
- Microchip Studio 7.0.2542 or newer (https://www.microchip.com/mplab/microchip-studio)
- ATmega_DFP 1.5.362 or newer Device Pack
- ATMEGA4809 Xplained Pro (ATMEGA4809-XPRO)