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stm32/flashbdev: Fix bug with L4 block cache, dereferencing block size.
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The code was dereferencing 0x800 and loading a value from there, trying to
use a literal value (not address) defined in the linker script
(_ram_fs_cache_block_size) which was 0x800.
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doc-hex authored and dpgeorge committed Jul 19, 2018
1 parent 3ffcef8 commit a8736e5
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Showing 4 changed files with 9 additions and 8 deletions.
2 changes: 1 addition & 1 deletion ports/stm32/boards/stm32l476xe.ld
Expand Up @@ -25,7 +25,7 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);

/* RAM extents for the garbage collector */
_ram_fs_cache_start = ORIGIN(FS_CACHE);
_ram_fs_cache_block_size = LENGTH(FS_CACHE);
_ram_fs_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE);
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
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2 changes: 1 addition & 1 deletion ports/stm32/boards/stm32l476xg.ld
Expand Up @@ -25,7 +25,7 @@ _estack = ORIGIN(RAM) + LENGTH(RAM);

/* RAM extents for the garbage collector */
_ram_fs_cache_start = ORIGIN(FS_CACHE);
_ram_fs_cache_block_size = LENGTH(FS_CACHE);
_ram_fs_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE);
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
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2 changes: 1 addition & 1 deletion ports/stm32/boards/stm32l496xg.ld
Expand Up @@ -25,7 +25,7 @@ _estack = ORIGIN(RAM) + LENGTH(RAM) + LENGTH(SRAM2);

/* RAM extents for the garbage collector */
_ram_fs_cache_start = ORIGIN(FS_CACHE);
_ram_fs_cache_block_size = LENGTH(FS_CACHE);
_ram_fs_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE);
_ram_start = ORIGIN(RAM);
_ram_end = ORIGIN(RAM) + LENGTH(RAM) + LENGTH(SRAM2);
_heap_start = _ebss; /* heap starts just after statically allocated memory */
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11 changes: 6 additions & 5 deletions ports/stm32/flashbdev.c
Expand Up @@ -95,14 +95,15 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k

#elif defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L496xx)

// The STM32L475/6 doesn't have CCRAM, so we use the 32K SRAM2 for this, although
// actual location and size is defined by the linker script.
extern uint8_t _flash_fs_start;
extern uint8_t _flash_fs_end;
extern uint32_t _ram_fs_cache_start[2048 / 4];
extern uint32_t _ram_fs_cache_block_size;
extern uint8_t _ram_fs_cache_start[]; // size determined by linker file
extern uint8_t _ram_fs_cache_end[];

// The STM32L475/6 doesn't have CCRAM, so we use the 32K SRAM2 for this.
#define CACHE_MEM_START_ADDR (&_ram_fs_cache_start) // End of SRAM2 RAM segment-2k
#define FLASH_SECTOR_SIZE_MAX (_ram_fs_cache_block_size) // 2k max
#define CACHE_MEM_START_ADDR ((uintptr_t)&_ram_fs_cache_start[0])
#define FLASH_SECTOR_SIZE_MAX (&_ram_fs_cache_end[0] - &_ram_fs_cache_start[0]) // 2k max
#define FLASH_MEM_SEG1_START_ADDR ((long)&_flash_fs_start)
#define FLASH_MEM_SEG1_NUM_BLOCKS ((&_flash_fs_end - &_flash_fs_start) / 512)

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