diff --git a/CATALOG.md b/CATALOG.md
index 7c57163..5d6cade 100644
--- a/CATALOG.md
+++ b/CATALOG.md
@@ -3,7 +3,7 @@
 
 # PromptKit Component Catalog
 
-> **168 components** across 5 layers — auto-generated from `manifest.yaml` (v0.4.0).
+> **171 components** across 5 layers — auto-generated from `manifest.yaml` (v0.4.0).
 
 ## Quick Reference
 
@@ -13,7 +13,7 @@
 | Protocols | 56 | Guardrails (5), Analysis (18), Reasoning (33) |
 | Formats | 24 | Output structure definitions |
 | Taxonomies | 5 | Classification schemes |
-| Templates | 68 | Task orchestration prompts |
+| Templates | 71 | Task orchestration prompts |
 
 ## Templates by Category
 
@@ -87,11 +87,14 @@
 | `audit-link-budget` | rf-engineer | investigation-report | Audit a wireless link budget for transmitter chain, path loss model validity, receiver chain, margin adequacy, regulatory compliance, and sensitivity to environmental assumptions. |
 | `review-enclosure` | mechanical-engineer | investigation-report | Audit an enclosure design for an electronic assembly. Reviews PCB fit, environmental protection, thermal management, antenna compatibility, sensor access, manufacturing feasibility, and mounting provisions. |
 
-### hardware-design (1)
+### hardware-design (4)
 
 | Template | Persona | Format | Description |
 |----------|---------|--------|-------------|
 | `design-schematic` | electrical-engineer | — | Interactive schematic design session. Guides the user from project requirements through component selection to a complete KiCad schematic with adversarial audits at each gate. |
+| `design-pcb-layout` | electrical-engineer | — | Interactive PCB layout session. Guides the user from a completed schematic through placement, automated routing, and DRC validation with layout-to-schematic feedback loop. |
+| `emit-manufacturing-artifacts` | electrical-engineer | — | Interactive manufacturing artifact generation session. Produces fab-ready Gerbers, drill files, BOM, pick-and-place, and assembly drawings with fab-specific formatting for JLCPCB and PCBWay. |
+| `hardware-design-workflow` | electrical-engineer | — | End-to-end hardware design workflow from initial idea to manufacturable artifacts. Guides through requirements, component selection, schematic, PCB layout, and manufacturing with adversarial audits and user review at every gate. |
 
 ### testing (2)
 
@@ -161,8 +164,8 @@
 
 | Protocol | Language | Used by | Description |
 |----------|----------|---------|-------------|
-| `anti-hallucination` | — | `author-requirements-doc`, `author-architecture-spec`, `interactive-design`, `author-north-star`, `author-design-doc`, `author-validation-plan`, `reverse-engineer-requirements`, `audit-traceability`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `audit-spec-invariants`, `diff-specifications`, `author-interface-contract`, `audit-interface-contract`, `validate-budget`, `extract-rfc-requirements`, `reconcile-requirements`, `extract-invariants`, `author-rfc`, `author-presentation`, `author-implementation-prompt`, `author-test-prompt`, `author-workflow-prompts`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `profile-session`, `classify-findings`, `review-code`, `review-cpp-code`, `exhaustive-bug-hunt`, `reconstruct-behavior`, `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `audit-link-budget`, `review-enclosure`, `design-schematic`, `discover-tests-for-changes`, `scaffold-test-project`, `plan-implementation`, `plan-refactoring`, `author-agent-instructions`, `extend-library`, `decompose-prompt`, `audit-library-consistency`, `audit-library-health`, `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`, `generate-commit-message`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation`, `engineering-workflow`, `collaborate-requirements-change`, `generate-spec-changes`, `generate-implementation-changes`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow` | Prevents fabrication. Enforces epistemic labeling (KNOWN/INFERRED/ASSUMED), uncertainty disclosure, and source attribution. Apply to all tasks. |
-| `self-verification` | — | `author-requirements-doc`, `author-architecture-spec`, `interactive-design`, `author-north-star`, `author-design-doc`, `author-validation-plan`, `reverse-engineer-requirements`, `audit-traceability`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `audit-spec-invariants`, `diff-specifications`, `author-interface-contract`, `audit-interface-contract`, `validate-budget`, `extract-rfc-requirements`, `reconcile-requirements`, `extract-invariants`, `author-rfc`, `author-presentation`, `author-implementation-prompt`, `author-test-prompt`, `author-workflow-prompts`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `profile-session`, `classify-findings`, `review-code`, `review-cpp-code`, `exhaustive-bug-hunt`, `reconstruct-behavior`, `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `audit-link-budget`, `review-enclosure`, `design-schematic`, `discover-tests-for-changes`, `scaffold-test-project`, `plan-implementation`, `plan-refactoring`, `author-agent-instructions`, `extend-library`, `decompose-prompt`, `audit-library-consistency`, `audit-library-health`, `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`, `generate-commit-message`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation`, `engineering-workflow`, `collaborate-requirements-change`, `generate-spec-changes`, `generate-implementation-changes`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow` | Quality gate requiring the LLM to verify its own output before finalizing. Sampling checks, citation audits, coverage confirmation, consistency checks. |
+| `anti-hallucination` | — | `author-requirements-doc`, `author-architecture-spec`, `interactive-design`, `author-north-star`, `author-design-doc`, `author-validation-plan`, `reverse-engineer-requirements`, `audit-traceability`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `audit-spec-invariants`, `diff-specifications`, `author-interface-contract`, `audit-interface-contract`, `validate-budget`, `extract-rfc-requirements`, `reconcile-requirements`, `extract-invariants`, `author-rfc`, `author-presentation`, `author-implementation-prompt`, `author-test-prompt`, `author-workflow-prompts`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `profile-session`, `classify-findings`, `review-code`, `review-cpp-code`, `exhaustive-bug-hunt`, `reconstruct-behavior`, `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `audit-link-budget`, `review-enclosure`, `design-schematic`, `design-pcb-layout`, `emit-manufacturing-artifacts`, `hardware-design-workflow`, `discover-tests-for-changes`, `scaffold-test-project`, `plan-implementation`, `plan-refactoring`, `author-agent-instructions`, `extend-library`, `decompose-prompt`, `audit-library-consistency`, `audit-library-health`, `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`, `generate-commit-message`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation`, `engineering-workflow`, `collaborate-requirements-change`, `generate-spec-changes`, `generate-implementation-changes`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow` | Prevents fabrication. Enforces epistemic labeling (KNOWN/INFERRED/ASSUMED), uncertainty disclosure, and source attribution. Apply to all tasks. |
+| `self-verification` | — | `author-requirements-doc`, `author-architecture-spec`, `interactive-design`, `author-north-star`, `author-design-doc`, `author-validation-plan`, `reverse-engineer-requirements`, `audit-traceability`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `audit-spec-invariants`, `diff-specifications`, `author-interface-contract`, `audit-interface-contract`, `validate-budget`, `extract-rfc-requirements`, `reconcile-requirements`, `extract-invariants`, `author-rfc`, `author-presentation`, `author-implementation-prompt`, `author-test-prompt`, `author-workflow-prompts`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `profile-session`, `classify-findings`, `review-code`, `review-cpp-code`, `exhaustive-bug-hunt`, `reconstruct-behavior`, `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `audit-link-budget`, `review-enclosure`, `design-schematic`, `design-pcb-layout`, `emit-manufacturing-artifacts`, `hardware-design-workflow`, `discover-tests-for-changes`, `scaffold-test-project`, `plan-implementation`, `plan-refactoring`, `author-agent-instructions`, `extend-library`, `decompose-prompt`, `audit-library-consistency`, `audit-library-health`, `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`, `generate-commit-message`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation`, `engineering-workflow`, `collaborate-requirements-change`, `generate-spec-changes`, `generate-implementation-changes`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow` | Quality gate requiring the LLM to verify its own output before finalizing. Sampling checks, citation audits, coverage confirmation, consistency checks. |
 | `operational-constraints` | — | `reverse-engineer-requirements`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `author-presentation`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `review-code`, `review-cpp-code`, `reconstruct-behavior`, `discover-tests-for-changes`, `audit-library-health`, `engineering-workflow`, `generate-implementation-changes`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow` | Governs how the LLM scopes work, uses tools, manages context, and prefers deterministic analysis. Prevents over-ingestion and ensures reproducibility. |
 | `minimal-edit-discipline` | — | `find-and-fix-bugs`, `fix-compiler-warnings` | Constrains code modifications to be minimal, type-preserving, encoding-safe, and verifiable. Prevents collateral damage from automated fixes, refactoring, and code generation. |
 | `adversarial-falsification` | — | `exhaustive-bug-hunt`, `engineering-workflow`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow` | Enforces adversarial self-falsification discipline. Requires the reviewer to disprove every candidate finding before reporting it, reject known-safe patterns, and resist premature summarization. |
@@ -182,20 +185,20 @@
 | `compiler-diagnostics-cpp` | C++ | `fix-compiler-warnings` | Systematic protocol for analyzing and remediating C++ compiler diagnostics. Covers variable shadowing, implicit conversions, unused variables, deprecated features, and pragma suppression handling with specific resolution strategies. |
 | `msvc-clang-portability` | C++ | — | C++ cross-compiler portability analysis between MSVC and Clang/GCC. Identifies MSVC extensions and non-standard patterns that fail on standards-conforming compilers. Covers template rules, const correctness, exception specs, dependent types, implicit conversions, and deprecated features. |
 | `kernel-correctness` | C | — | Correctness analysis for OS kernel and driver code. Lock/refcount symmetry, cleanup path completeness, PFN/PTE state transitions, interlocked sequences, charge/uncharge accounting, and known-safe kernel pattern suppression. |
-| `schematic-compliance-audit` | — | `review-schematic`, `design-schematic` | Systematic schematic review protocol. Audits a netlist or schematic against requirements and datasheet specifications. Covers power architecture, pin-level verification, bus integrity, protection circuits, power sequencing, passive components, and completeness. |
+| `schematic-compliance-audit` | — | `review-schematic`, `design-schematic`, `hardware-design-workflow` | Systematic schematic review protocol. Audits a netlist or schematic against requirements and datasheet specifications. Covers power architecture, pin-level verification, bus integrity, protection circuits, power sequencing, passive components, and completeness. |
 | `simulation-validation` | — | `validate-simulation` | Systematic review of circuit simulation output (SPICE, power budget, thermal analysis) against specification constraints. Covers setup verification, result interpretation, constraint compliance, corner-case coverage, and model validity. |
 | `bom-consistency` | — | `review-bom` | Systematic BOM review protocol. Audits a bill of materials against the schematic and requirements for part number correctness, voltage and temperature ratings, package matches, cost compliance, sourcing risks, and completeness. |
-| `layout-design-review` | — | `review-layout` | Systematic PCB layout review protocol. Audits layout decisions and DRC output against schematic intent and requirements. Covers trace widths, impedance control, ground plane integrity, component placement, thermal design, and manufacturing constraints. |
+| `layout-design-review` | — | `review-layout`, `design-pcb-layout`, `hardware-design-workflow` | Systematic PCB layout review protocol. Audits layout decisions and DRC output against schematic intent and requirements. Covers trace widths, impedance control, ground plane integrity, component placement, thermal design, and manufacturing constraints. |
 | `link-budget-audit` | — | `audit-link-budget` | Systematic link budget review protocol. Audits a wireless link budget for transmitter chain, path loss model selection, receiver chain, margin adequacy, regulatory compliance, and sensitivity to environmental assumptions. |
 | `enclosure-design-review` | — | `review-enclosure` | Systematic enclosure design review protocol for electronic assemblies. Audits for PCB fit, thermal management, environmental protection, antenna compatibility, sensor access, manufacturing feasibility, and mounting provisions. |
-| `component-selection-audit` | — | `design-schematic` | Adversarial audit of a component selection against requirements and real-world data. Independently verifies part numbers exist, datasheet specs match claims, sourcing data is current, and compatibility assertions hold. Catches hallucinated parts and stale specifications. |
+| `component-selection-audit` | — | `design-schematic`, `hardware-design-workflow` | Adversarial audit of a component selection against requirements and real-world data. Independently verifies part numbers exist, datasheet specs match claims, sourcing data is current, and compatibility assertions hold. Catches hallucinated parts and stale specifications. |
 
 ### reasoning (33)
 
 | Protocol | Language | Used by | Description |
 |----------|----------|---------|-------------|
 | `root-cause-analysis` | — | `investigate-bug`, `root-cause-ci-failure` | Systematic root cause analysis. Symptom characterization, hypothesis generation, evidence evaluation, and causal chain tracing. |
-| `requirements-elicitation` | — | `author-requirements-doc`, `interactive-design`, `engineering-workflow`, `collaborate-requirements-change`, `spec-extraction-workflow` | Requirements extraction from natural language. Produces numbered, atomic, testable requirements with RFC 2119 keywords. |
+| `requirements-elicitation` | — | `author-requirements-doc`, `interactive-design`, `hardware-design-workflow`, `engineering-workflow`, `collaborate-requirements-change`, `spec-extraction-workflow` | Requirements extraction from natural language. Produces numbered, atomic, testable requirements with RFC 2119 keywords. |
 | `iterative-refinement` | — | `interactive-design`, `engineering-workflow`, `collaborate-requirements-change`, `spec-extraction-workflow`, `maintenance-workflow` | Protocol for revising documents through feedback cycles while preserving structural integrity, numbering, cross-references, and internal consistency. |
 | `promptkit-design` | — | `extend-library` | Reasoning protocol for designing new PromptKit components. Scoping, component type selection, dependency analysis, and convention compliance. |
 | `devops-platform-analysis` | — | `author-pipeline`, `root-cause-ci-failure` | Systematic reasoning about DevOps platform constructs: pipelines, triggers, jobs, environments, secrets, approvals, and artifacts. Platform-agnostic methodology with platform-specific instantiation. |
@@ -221,11 +224,11 @@
 | `change-propagation` | — | `engineering-workflow`, `generate-spec-changes`, `generate-implementation-changes`, `maintenance-workflow` | Systematic reasoning protocol for propagating changes through artifact layers while maintaining alignment. Covers impact analysis, change derivation, invariant checking, completeness verification, and conflict detection. Domain-agnostic. |
 | `step-retrospective` | — | — | Protocol for learning from execution experience in iterative workflows. After completing a step, systematically analyze variances (tooling gaps, process gaps, knowledge gaps), trace root causes, and feed concrete improvements back into the tooling and process for the next iteration. |
 | `presentation-design` | — | `author-presentation` | Systematic reasoning protocol for designing technical presentations. Covers audience analysis, narrative arc construction, slide decomposition, visual design decisions, time budgeting, and demo choreography. Domain-agnostic. |
-| `component-selection` | — | `design-schematic` | Systematic reasoning protocol for selecting electronic components from requirements. Covers functional decomposition, candidate identification via real-time search, technical evaluation, sourcing verification, cross-component compatibility, and decision matrix generation. Scoped to core functional components. |
-| `schematic-design` | — | `design-schematic` | Systematic reasoning protocol for designing a circuit schematic from requirements and selected components. Covers power architecture, supporting circuitry derivation from datasheets, signal routing, protection circuits, and KiCad .kicad_sch S-expression generation with explicit visual layout rules. |
-| `pcb-layout-design` | — | — | Systematic reasoning protocol for PCB layout and routing from a completed schematic. Covers layout requirements gathering, board definition, design rules, component placement, routing strategy, and automated execution via Python pcbnew API with FreeRouting autorouter and KiCad DRC validation loop. Supports 2-layer and 4-layer stackups. |
+| `component-selection` | — | `design-schematic`, `hardware-design-workflow` | Systematic reasoning protocol for selecting electronic components from requirements. Covers functional decomposition, candidate identification via real-time search, technical evaluation, sourcing verification, cross-component compatibility, and decision matrix generation. Scoped to core functional components. |
+| `schematic-design` | — | `design-schematic`, `hardware-design-workflow` | Systematic reasoning protocol for designing a circuit schematic from requirements and selected components. Covers power architecture, supporting circuitry derivation from datasheets, signal routing, protection circuits, and KiCad .kicad_sch S-expression generation with explicit visual layout rules. |
+| `pcb-layout-design` | — | `design-pcb-layout`, `hardware-design-workflow` | Systematic reasoning protocol for PCB layout and routing from a completed schematic. Covers layout requirements gathering, board definition, design rules, component placement, routing strategy, and automated execution via Python pcbnew API with FreeRouting autorouter and KiCad DRC validation loop. Supports 2-layer and 4-layer stackups. |
 | `prompt-decomposition` | — | `decompose-prompt` | Systematic reasoning protocol for decomposing an existing hand-written prompt into PromptKit's semantic layers. Extracts persona, protocol, taxonomy, format, and task instruction segments. Maps each to existing library components or marks as novel for assimilation. |
-| `manufacturing-artifact-generation` | — | — | Systematic reasoning protocol for generating manufacturing deliverables from a completed PCB design. Covers Gerber files, Excellon drill files, BOM formatting, pick-and-place centroid files, and assembly drawings with fab-specific formatting for JLCPCB, PCBWay, and other services. |
+| `manufacturing-artifact-generation` | — | `emit-manufacturing-artifacts`, `hardware-design-workflow` | Systematic reasoning protocol for generating manufacturing deliverables from a completed PCB design. Covers Gerber files, Excellon drill files, BOM formatting, pick-and-place centroid files, and assembly drawings with fab-specific formatting for JLCPCB, PCBWay, and other services. |
 | `corpus-safety-audit` | — | `audit-library-health` | Systematic audit of a prompt component corpus for assimilation risks. Checks provenance and attribution, detects verbatim copying from external sources, screens for confidential or internal-only content, and verifies license compliance. |
 
 ## Personas
@@ -243,7 +246,7 @@
 | `implementation-engineer` | `author-implementation-prompt` | Senior implementation engineer. Builds correct, maintainable code from specifications. Traces every implementation decision back to a requirement. |
 | `test-engineer` | `author-test-prompt`, `discover-tests-for-changes`, `scaffold-test-project` | Senior test engineer. Writes thorough, specification-driven tests that verify every requirement and acceptance criterion. Prioritizes coverage breadth, negative cases, and boundary conditions. |
 | `embedded-firmware-engineer` | — | Senior embedded firmware engineer. Deep expertise in boot sequences, flash memory management, OTA updates, power-fail-safe operations, watchdog timers, and device recovery mechanisms. Reasons about every failure mode at every execution point. |
-| `electrical-engineer` | `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `design-schematic` | Senior electrical engineer. Deep expertise in power delivery, signal integrity, PCB design, component selection, and schematic review. Thinks in voltage domains and current paths. Conservative about datasheet margins. |
+| `electrical-engineer` | `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `design-schematic`, `design-pcb-layout`, `emit-manufacturing-artifacts`, `hardware-design-workflow` | Senior electrical engineer. Deep expertise in power delivery, signal integrity, PCB design, component selection, and schematic review. Thinks in voltage domains and current paths. Conservative about datasheet margins. |
 | `rf-engineer` | `audit-link-budget` | Senior RF systems engineer. Deep expertise in link budget analysis, antenna characterization, propagation modeling, transceiver design, regulatory compliance, and RF test and measurement. |
 | `mechanical-engineer` | `review-enclosure` | Senior mechanical engineer. Deep expertise in enclosure design for electronics, 3D printing design-for-manufacturing, material selection, thermal management, environmental protection, and physical integration of PCB assemblies. |
 | `protocol-architect` | `author-rfc`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation` | Senior protocol architect. Deep expertise in protocol design, evolution, and formal specification. Reasons about state machines, message formats, backward compatibility, and interoperability across protocol layers. |
@@ -313,15 +316,18 @@ Protocol specification lifecycle from requirements extraction through evolution
 
 ### hardware-lifecycle
 
-Spec-first hardware design lifecycle from requirements through manufacturing review. Each stage audits a hardware artifact against the requirements document. Stages can be used independently or sequentially as design artifacts become available.
+Full hardware design lifecycle from requirements through manufacturing. Interleaves generative design stages with adversarial audit stages. Stages consume the artifacts declared in their contracts and may be used independently or sequentially as those artifacts become available. Audit stages provide an independent review pass even when the preceding design stage includes a self-audit. The full workflow can also be run as a single interactive session using the hardware-design-workflow template.
 
 | Stage | Template | Consumes | Produces |
 |-------|----------|----------|----------|
 | 1 | `author-requirements-doc` | — | requirements-document |
-| 2 | `review-schematic` | requirements-document | investigation-report |
-| 3 | `validate-simulation` | requirements-document | investigation-report |
-| 4 | `review-bom` | requirements-document | investigation-report |
-| 5 | `review-layout` | requirements-document | investigation-report |
+| 2 | `design-schematic` | — | artifact-set |
+| 3 | `review-schematic` | requirements-document, artifact-set | investigation-report |
+| 4 | `validate-simulation` | requirements-document | investigation-report |
+| 5 | `review-bom` | requirements-document, artifact-set | investigation-report |
+| 6 | `design-pcb-layout` | artifact-set | artifact-set |
+| 7 | `review-layout` | requirements-document, artifact-set | investigation-report |
+| 8 | `emit-manufacturing-artifacts` | artifact-set | artifact-set |
 
 ### engineering-workflow
 
@@ -340,13 +346,13 @@ Domain-agnostic incremental engineering workflow with human-in-the-loop review.
 ### Which templates use a given protocol?
 
 - **`adversarial-falsification`** → `exhaustive-bug-hunt`, `engineering-workflow`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow`
-- **`anti-hallucination`** → `author-requirements-doc`, `author-architecture-spec`, `interactive-design`, `author-north-star`, `author-design-doc`, `author-validation-plan`, `reverse-engineer-requirements`, `audit-traceability`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `audit-spec-invariants`, `diff-specifications`, `author-interface-contract`, `audit-interface-contract`, `validate-budget`, `extract-rfc-requirements`, `reconcile-requirements`, `extract-invariants`, `author-rfc`, `author-presentation`, `author-implementation-prompt`, `author-test-prompt`, `author-workflow-prompts`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `profile-session`, `classify-findings`, `review-code`, `review-cpp-code`, `exhaustive-bug-hunt`, `reconstruct-behavior`, `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `audit-link-budget`, `review-enclosure`, `design-schematic`, `discover-tests-for-changes`, `scaffold-test-project`, `plan-implementation`, `plan-refactoring`, `author-agent-instructions`, `extend-library`, `decompose-prompt`, `audit-library-consistency`, `audit-library-health`, `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`, `generate-commit-message`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation`, `engineering-workflow`, `collaborate-requirements-change`, `generate-spec-changes`, `generate-implementation-changes`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow`
+- **`anti-hallucination`** → `author-requirements-doc`, `author-architecture-spec`, `interactive-design`, `author-north-star`, `author-design-doc`, `author-validation-plan`, `reverse-engineer-requirements`, `audit-traceability`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `audit-spec-invariants`, `diff-specifications`, `author-interface-contract`, `audit-interface-contract`, `validate-budget`, `extract-rfc-requirements`, `reconcile-requirements`, `extract-invariants`, `author-rfc`, `author-presentation`, `author-implementation-prompt`, `author-test-prompt`, `author-workflow-prompts`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `profile-session`, `classify-findings`, `review-code`, `review-cpp-code`, `exhaustive-bug-hunt`, `reconstruct-behavior`, `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `audit-link-budget`, `review-enclosure`, `design-schematic`, `design-pcb-layout`, `emit-manufacturing-artifacts`, `hardware-design-workflow`, `discover-tests-for-changes`, `scaffold-test-project`, `plan-implementation`, `plan-refactoring`, `author-agent-instructions`, `extend-library`, `decompose-prompt`, `audit-library-consistency`, `audit-library-health`, `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`, `generate-commit-message`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation`, `engineering-workflow`, `collaborate-requirements-change`, `generate-spec-changes`, `generate-implementation-changes`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow`
 - **`bom-consistency`** → `review-bom`
 - **`change-propagation`** → `engineering-workflow`, `generate-spec-changes`, `generate-implementation-changes`, `maintenance-workflow`
 - **`code-compliance-audit`** → `audit-code-compliance`, `engineering-workflow`, `audit-implementation-alignment`, `maintenance-workflow`
 - **`compiler-diagnostics-cpp`** → `fix-compiler-warnings`
-- **`component-selection`** → `design-schematic`
-- **`component-selection-audit`** → `design-schematic`
+- **`component-selection`** → `design-schematic`, `hardware-design-workflow`
+- **`component-selection-audit`** → `design-schematic`, `hardware-design-workflow`
 - **`corpus-safety-audit`** → `audit-library-health`
 - **`cpp-best-practices`** → `review-cpp-code`
 - **`devops-platform-analysis`** → `author-pipeline`, `root-cause-ci-failure`
@@ -358,15 +364,15 @@ Domain-agnostic incremental engineering workflow with human-in-the-loop review.
 - **`invariant-extraction`** → `extract-invariants`, `reconstruct-behavior`
 - **`iterative-refinement`** → `interactive-design`, `engineering-workflow`, `collaborate-requirements-change`, `spec-extraction-workflow`, `maintenance-workflow`
 - **`kernel-correctness`** → —
-- **`layout-design-review`** → `review-layout`
+- **`layout-design-review`** → `review-layout`, `design-pcb-layout`, `hardware-design-workflow`
 - **`link-budget-audit`** → `audit-link-budget`
-- **`manufacturing-artifact-generation`** → —
+- **`manufacturing-artifact-generation`** → `emit-manufacturing-artifacts`, `hardware-design-workflow`
 - **`memory-safety-c`** → `review-cpp-code`
 - **`memory-safety-rust`** → —
 - **`minimal-edit-discipline`** → `find-and-fix-bugs`, `fix-compiler-warnings`
 - **`msvc-clang-portability`** → —
 - **`operational-constraints`** → `reverse-engineer-requirements`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `author-presentation`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `review-code`, `review-cpp-code`, `reconstruct-behavior`, `discover-tests-for-changes`, `audit-library-health`, `engineering-workflow`, `generate-implementation-changes`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow`
-- **`pcb-layout-design`** → —
+- **`pcb-layout-design`** → `design-pcb-layout`, `hardware-design-workflow`
 - **`performance-critical-c-api`** → —
 - **`presentation-design`** → `author-presentation`
 - **`prompt-decomposition`** → `decompose-prompt`
@@ -375,15 +381,15 @@ Domain-agnostic incremental engineering workflow with human-in-the-loop review.
 - **`protocol-evolution`** → `evolve-protocol`
 - **`protocol-validation-design`** → `author-protocol-validation`
 - **`quantitative-constraint-validation`** → `validate-budget`
-- **`requirements-elicitation`** → `author-requirements-doc`, `interactive-design`, `engineering-workflow`, `collaborate-requirements-change`, `spec-extraction-workflow`
+- **`requirements-elicitation`** → `author-requirements-doc`, `interactive-design`, `hardware-design-workflow`, `engineering-workflow`, `collaborate-requirements-change`, `spec-extraction-workflow`
 - **`requirements-from-implementation`** → `reverse-engineer-requirements`, `spec-extraction-workflow`
 - **`requirements-reconciliation`** → `reconcile-requirements`
 - **`rfc-extraction`** → `extract-rfc-requirements`
 - **`root-cause-analysis`** → `investigate-bug`, `root-cause-ci-failure`
-- **`schematic-compliance-audit`** → `review-schematic`, `design-schematic`
-- **`schematic-design`** → `design-schematic`
+- **`schematic-compliance-audit`** → `review-schematic`, `design-schematic`, `hardware-design-workflow`
+- **`schematic-design`** → `design-schematic`, `hardware-design-workflow`
 - **`security-vulnerability`** → `investigate-security`, `review-infrastructure`
-- **`self-verification`** → `author-requirements-doc`, `author-architecture-spec`, `interactive-design`, `author-north-star`, `author-design-doc`, `author-validation-plan`, `reverse-engineer-requirements`, `audit-traceability`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `audit-spec-invariants`, `diff-specifications`, `author-interface-contract`, `audit-interface-contract`, `validate-budget`, `extract-rfc-requirements`, `reconcile-requirements`, `extract-invariants`, `author-rfc`, `author-presentation`, `author-implementation-prompt`, `author-test-prompt`, `author-workflow-prompts`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `profile-session`, `classify-findings`, `review-code`, `review-cpp-code`, `exhaustive-bug-hunt`, `reconstruct-behavior`, `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `audit-link-budget`, `review-enclosure`, `design-schematic`, `discover-tests-for-changes`, `scaffold-test-project`, `plan-implementation`, `plan-refactoring`, `author-agent-instructions`, `extend-library`, `decompose-prompt`, `audit-library-consistency`, `audit-library-health`, `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`, `generate-commit-message`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation`, `engineering-workflow`, `collaborate-requirements-change`, `generate-spec-changes`, `generate-implementation-changes`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow`
+- **`self-verification`** → `author-requirements-doc`, `author-architecture-spec`, `interactive-design`, `author-north-star`, `author-design-doc`, `author-validation-plan`, `reverse-engineer-requirements`, `audit-traceability`, `audit-code-compliance`, `audit-test-compliance`, `audit-integration-compliance`, `audit-spec-invariants`, `diff-specifications`, `author-interface-contract`, `audit-interface-contract`, `validate-budget`, `extract-rfc-requirements`, `reconcile-requirements`, `extract-invariants`, `author-rfc`, `author-presentation`, `author-implementation-prompt`, `author-test-prompt`, `author-workflow-prompts`, `investigate-bug`, `find-and-fix-bugs`, `fix-compiler-warnings`, `investigate-security`, `profile-session`, `classify-findings`, `review-code`, `review-cpp-code`, `exhaustive-bug-hunt`, `reconstruct-behavior`, `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `audit-link-budget`, `review-enclosure`, `design-schematic`, `design-pcb-layout`, `emit-manufacturing-artifacts`, `hardware-design-workflow`, `discover-tests-for-changes`, `scaffold-test-project`, `plan-implementation`, `plan-refactoring`, `author-agent-instructions`, `extend-library`, `decompose-prompt`, `audit-library-consistency`, `audit-library-health`, `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`, `generate-commit-message`, `evolve-protocol`, `analyze-protocol-conflicts`, `author-protocol-validation`, `engineering-workflow`, `collaborate-requirements-change`, `generate-spec-changes`, `generate-implementation-changes`, `audit-spec-alignment`, `audit-implementation-alignment`, `spec-extraction-workflow`, `maintenance-workflow`
 - **`session-profiling`** → `profile-session`
 - **`simulation-validation`** → `validate-simulation`
 - **`spec-evolution-diff`** → `diff-specifications`
@@ -399,7 +405,7 @@ Domain-agnostic incremental engineering workflow with human-in-the-loop review.
 ### Which templates use a given persona?
 
 - **`devops-engineer`** → `author-pipeline`, `triage-issues`, `triage-pull-requests`, `root-cause-ci-failure`, `author-release`, `review-infrastructure`
-- **`electrical-engineer`** → `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `design-schematic`
+- **`electrical-engineer`** → `review-schematic`, `validate-simulation`, `review-bom`, `review-layout`, `design-schematic`, `design-pcb-layout`, `emit-manufacturing-artifacts`, `hardware-design-workflow`
 - **`embedded-firmware-engineer`** → —
 - **`implementation-engineer`** → `author-implementation-prompt`
 - **`mechanical-engineer`** → `review-enclosure`
diff --git a/README.md b/README.md
index 68c0160..33c9b58 100644
--- a/README.md
+++ b/README.md
@@ -304,9 +304,13 @@ author-requirements-doc  →  author-design-doc  →  author-validation-plan  
 **Hardware Lifecycle**
 
 ```
-author-requirements-doc  →  review-schematic  →  validate-simulation  →  review-bom  →  review-layout
-  (produces: requirements)    (consumes: req,      (consumes: req,         (consumes: req,  (consumes: req,
-                               audits netlist)      audits sim output)      audits BOM)      audits PCB)
+author-requirements-doc  →  design-schematic  →  review-schematic  →  validate-simulation  →  review-bom
+  (produces: requirements)   (produces:           (consumes: req +      (consumes: req,         (consumes: req +
+                              artifact-set)        artifact-set)         audits sim output)      artifact-set)
+
+                          →  design-pcb-layout  →  review-layout  →  emit-manufacturing-artifacts
+                             (consumes:             (consumes: req +    (consumes: artifact-set,
+                              artifact-set)          artifact-set)       produces: artifact-set)
 ```
 
 **Protocol Engineering**
diff --git a/manifest.yaml b/manifest.yaml
index af1b576..c7a904b 100644
--- a/manifest.yaml
+++ b/manifest.yaml
@@ -1613,26 +1613,38 @@ pipelines:
 
   hardware-lifecycle:
     description: >
-      Spec-first hardware design lifecycle from requirements through
-      manufacturing review. Each stage audits a hardware artifact
-      against the requirements document. Stages can be used
-      independently or sequentially as design artifacts become
-      available.
+      Full hardware design lifecycle from requirements through
+      manufacturing. Interleaves generative design stages with
+      adversarial audit stages. Stages consume the artifacts
+      declared in their contracts and may be used independently
+      or sequentially as those artifacts become available. Audit
+      stages provide an independent review pass even when the
+      preceding design stage includes a self-audit. The full
+      workflow can also be run as a single interactive session
+      using the hardware-design-workflow template.
     stages:
       - template: author-requirements-doc
         produces: requirements-document
+      - template: design-schematic
+        produces: artifact-set
       - template: review-schematic
-        consumes: requirements-document
+        consumes: [requirements-document, artifact-set]
         produces: investigation-report
       - template: validate-simulation
         consumes: requirements-document
         produces: investigation-report
       - template: review-bom
-        consumes: requirements-document
+        consumes: [requirements-document, artifact-set]
         produces: investigation-report
+      - template: design-pcb-layout
+        consumes: artifact-set
+        produces: artifact-set
       - template: review-layout
-        consumes: requirements-document
+        consumes: [requirements-document, artifact-set]
         produces: investigation-report
+      - template: emit-manufacturing-artifacts
+        consumes: artifact-set
+        produces: artifact-set
 
   engineering-workflow:
     description: >