The Raspberry Pi 4B has enough changes that the project is currently incompatible. Some discussion has occurred in #8.
At least the following issues exists
- Selected DMA channel is in use on the Pi 4B.
- PLLD frequency was increased from 500 MHz to 750 MHz.
Currently we assumed a fixed PLLD frequency when calculating the divisor:
|
double divisor = (500e6 / spdif_clock); |
The Raspberry Pi 4B has enough changes that the project is currently incompatible. Some discussion has occurred in #8.
At least the following issues exists
Currently we assumed a fixed PLLD frequency when calculating the divisor:
raspdif/source/main.c
Line 199 in facd46e