From fdfd29f138f36ff02768349ee94bf98aec553e07 Mon Sep 17 00:00:00 2001 From: Hannes Mehnert Date: Wed, 29 Apr 2020 22:43:34 +0200 Subject: [PATCH] minor fixes, use cpuid detection from mirage-crypto (detect_cpu_features) also in mirage-crypto-entropy (entropy_cpu_stubs) --- config/cfg.ml | 2 +- src/dune | 5 ++-- src/native/detect_cpu_features.c | 17 +++++++---- src/native/entropy_cpu_stubs.c | 51 +++++++++++--------------------- src/native/mirage_crypto.h | 8 ++++- 5 files changed, 41 insertions(+), 42 deletions(-) diff --git a/config/cfg.ml b/config/cfg.ml index 2d487b6d..f8364308 100644 --- a/config/cfg.ml +++ b/config/cfg.ml @@ -8,7 +8,7 @@ let _ = in let accelerate_flags = match arch with - | "x86_64" -> [ "-DACCELERATE"; "-mssse3"; "-maes"; "-mpclmul" ] + | "x86_64" | "amd64" -> [ "-DACCELERATE"; "-mssse3"; "-maes"; "-mpclmul" ] | _ -> [] in let ent_flags = diff --git a/src/dune b/src/dune index 87ab6ccd..0c66fe44 100644 --- a/src/dune +++ b/src/dune @@ -3,11 +3,12 @@ (public_name mirage-crypto) (libraries cstruct) (private_modules ccm cipher_block cipher_stream hash native uncommon) - (c_names misc misc_sse + (c_names detect_cpu_features + misc misc_sse md5 sha1 sha256 sha512 hash_stubs aes_generic aes_aesni ghash_generic ghash_pclmul des_generic - entropy_cpu_stubs detect_cpu_features) + entropy_cpu_stubs) (c_flags (:standard) (:include cflags.sexp))) (include_subdirs unqualified) diff --git a/src/native/detect_cpu_features.c b/src/native/detect_cpu_features.c index 734fb5da..0bb97d9b 100644 --- a/src/native/detect_cpu_features.c +++ b/src/native/detect_cpu_features.c @@ -1,6 +1,6 @@ #include "mirage_crypto.h" -#ifdef __mc_ACCELERATE__ +#if defined (__i386__) || defined (__x86_64__) #include @@ -10,23 +10,30 @@ CAMLprim value mc_detect_cpu_features (__unit ()) { unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0; - if (__get_cpuid(1, &eax, &ebx, &ecx, &edx)) - { + if (__get_cpuid(1, &eax, &ebx, &ecx, &edx)) { if (ecx & bit_PCLMUL) mc_detected_cpu_features.pclmul = 1; if (ecx & bit_SSSE3) mc_detected_cpu_features.ssse3 = 1; if (ecx & bit_AES) mc_detected_cpu_features.aesni = 1; + if (ecx & bit_RDRND) + mc_detected_cpu_features.rdrand = 1; } + + if (__get_cpuid_count(7, 0, &eax, &ebx, &ecx, &edx)) { + if (ebx & bit_RDSEED) + mc_detected_cpu_features.rdseed = 1; + } + return Val_unit; } -#else /* __mc_ACCELERATE__ */ +#else /* i386 || x86_64 */ CAMLprim value mc_detect_cpu_features (__unit ()) { return Val_unit; } -#endif /* __mc_ACCELERATE__ */ +#endif /* i386 || x86_64 */ diff --git a/src/native/entropy_cpu_stubs.c b/src/native/entropy_cpu_stubs.c index b6980ff4..7d6ccc39 100644 --- a/src/native/entropy_cpu_stubs.c +++ b/src/native/entropy_cpu_stubs.c @@ -10,12 +10,6 @@ #define __x86__ #include -#include - -/* because clang... */ -#if !defined(bit_RDSEED) -#define bit_RDSEED 0x00040000 -#endif #if defined (__x86_64__) #define random_t unsigned long long @@ -40,6 +34,7 @@ static inline uint32_t read_virtual_count () { return c_lo; } #endif /* arm */ + #if defined (__aarch64__) #define isb() __asm __volatile("isb" : : : "memory") static inline uint64_t read_virtual_count(void) @@ -63,35 +58,25 @@ static enum cpu_rng_t __cpu_rng = RNG_NONE; static void detect () { #if defined (__x86__) - - unsigned int sig, eax, ebx, ecx, edx; - int max = __get_cpuid_max (0, &sig); random_t r = 0; - if (max < 1) return; - - if (sig == signature_INTEL_ebx || sig == signature_AMD_ebx) { - __cpuid (1, eax, ebx, ecx, edx); - if (ecx & bit_RDRND) - /* AMD Ryzen 3000 bug where RDRAND always returns -1 - https://arstechnica.com/gadgets/2019/10/how-a-months-old-amd-microcode-bug-destroyed-my-weekend/ */ - for (int i = 0; i < RETRIES; i++) - if (_rdrand_step(&r) == 1 && r != (random_t) (-1)) { - __cpu_rng = RNG_RDRAND; - break; - } - if (max > 7) { - __cpuid_count (7, 0, eax, ebx, ecx, edx); - if (ebx & bit_RDSEED) - /* RDSEED could return -1 as well, thus we test it here as well - https://www.reddit.com/r/Amd/comments/cmza34/agesa_1003_abb_fixes_rdrandrdseed/ */ - for (int i = 0; i < RETRIES; i++) - if (_rdseed_step(&r) == 1 && r != (random_t) (-1)) { - __cpu_rng = RNG_RDSEED; - break; - } - } - } + if (mc_detected_cpu_features.rdrand) + /* AMD Ryzen 3000 bug where RDRAND always returns -1 + https://arstechnica.com/gadgets/2019/10/how-a-months-old-amd-microcode-bug-destroyed-my-weekend/ */ + for (int i = 0; i < RETRIES; i++) + if (_rdrand_step(&r) == 1 && r != (random_t) (-1)) { + __cpu_rng = RNG_RDRAND; + break; + } + + if (mc_detected_cpu_features.rdseed) + /* RDSEED could return -1, thus we test it here + https://www.reddit.com/r/Amd/comments/cmza34/agesa_1003_abb_fixes_rdrandrdseed/ */ + for (int i = 0; i < RETRIES; i++) + if (_rdseed_step(&r) == 1 && r != (random_t) (-1)) { + __cpu_rng = RNG_RDSEED; + break; + } #endif } diff --git a/src/native/mirage_crypto.h b/src/native/mirage_crypto.h index 7c34503d..f27657b7 100644 --- a/src/native/mirage_crypto.h +++ b/src/native/mirage_crypto.h @@ -12,17 +12,23 @@ #define __mc_ACCELERATE__ #endif -#ifdef __mc_ACCELERATE__ +#if defined (__i386__) || defined (__x86_64__) struct _mc_cpu_features { int aesni; int pclmul; int ssse3; + int rdrand; + int rdseed; }; /* Supported accelerations */ extern struct _mc_cpu_features mc_detected_cpu_features; +#endif /* __i386__ || __x86_64__ */ + +#ifdef __mc_ACCELERATE__ + #define _mc_switch_accel(FEATURE, GENERIC_CALL, ACCELERATED_CALL) \ if (!(mc_detected_cpu_features.FEATURE)) { GENERIC_CALL; } \ else { ACCELERATED_CALL; }