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Commits on Sep 4, 2014
  1. @vargaz

    Bump mono api version.

    vargaz authored
  2. @vargaz

    Fix rebase problems.

    vargaz authored
  3. @vargaz

    Reserve x28 as well since we exclude it from the callee saved registe…

    vargaz authored
    …rs, and llvm can use it as a caller saved register otherwise.
  4. @vargaz

    Remove x27 from callee saved regs on arm64. Also remove x28 since it …

    vargaz authored
    …LLVM expects odd-even register pairs to exist.
  5. @vargaz

    Revert "Move EmitDwarfAdvanceLineAddr and EmitDwarfAdvanceFrameAddr t…

    vargaz authored
    …o the obj streamer."
    This reverts commit fd51ead.
    Revert this as DwarfMonoException.cpp depends on it.
  6. @vargaz
  7. @vargaz
  8. @vargaz
  9. @vargaz

    Use DWARF EH on ARM.

    vargaz authored
  10. @vargaz

    Add a mono specific flag in the form of custom metadata, toh make it …

    vargaz authored
    …possible/easier for LLVM to hoist loads out of loops.
  11. @vargaz
  12. @vargaz

    Add support for Mono EH to the JIT and the static compiler. For the J…

    vargaz authored
    …IT, emit a variant of the C++ EH structures which contains extra information required by mono, i.e. the stack location of 'this'. For the static compiler, emit separate tables instead of the normal C++ tables. Add back parts of the LLVM JIT EH support code removed in r181354 and r181649.
  13. @vargaz

    Fix some conflicts between command line arguments and the arguments u…

    vargaz authored
    …sed to control passes, sometimes they are the same, which causes problems if both the optimization and the code generation passes are linked into the same executable.
  14. @vargaz

    Add a --mono-api-version option to llvm-config which can be increment…

    vargaz authored
    …ed every time llvm breaks public api. This allows mono to compile with different versions of LLVM.
  15. @vargaz
  16. @vargaz

    Add a workaround to the problem where the amd64 JIT would make all ca…

    vargaz authored
    …lls as register indirect.
  17. @vargaz
  18. @vargaz

    Allow intrinsics which throw exceptions. Allow them to be called usin…

    vargaz authored
    …g invoke.
    Add mono.load/ intrinsics which are the same as load/store, and
    lowered to the same code, but can throw exceptions. This enables support for
    load/store operations which throw implicit exceptions.
  19. @vargaz
  20. @vargaz
  21. @vargaz

    Add a test for movfs on x86.

    vargaz authored
Commits on Sep 2, 2014
  1. @hfinkel


    hfinkel authored
    The number is just a constant, and this should make MSVC happy (or at least
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  2. [X86] Allow atomic operations using immediates to avoid using a register

    Robin Morisset authored
    The only valid lowering of atomic stores in the X86 backend was mov from
    register to memory. As a result, storing an immediate required a useless copy
    of the immediate in a register. Now these can be compiled as a simple mov.
    Similarily, adding/and-ing/or-ing/xor-ing an
    immediate to an atomic location (but through an atomic_store/atomic_load,
    not a fetch_whatever intrinsic) can now make use of an 'add $imm, x(%rip)'
    instead of using a register. And the same applies to inc/dec.
    This second point matches the first issue identified in
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  3. @hfinkel

    [CFLAA] constexpr -> LLVM_CONSTEXPR

    hfinkel authored
    Attempt to fix the MSVC build by not using constexpr.
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  4. @hfinkel

    Add pass-manager flags to use CFL AA

    hfinkel authored
    Add -use-cfl-aa (and -use-cfl-aa-in-codegen) to add CFL AA in the default pass
    managers (for easy testing).
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  5. @zmodem

    BumpPtrAllocator: use uintptr_t when aligning addresses to avoid unde…

    zmodem authored
    …fined behaviour
    In theory, alignPtr() could push a pointer beyond the end of the current slab, making
    comparisons with that pointer undefined behaviour. Use an integer type to avoid this.
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  6. [asan] Assign a low branch weight to ASan's slow path, patch by Jonas…

    Kostya Serebryany authored
    … Wagner. This speeds up asan (at least on SPEC) by 1%-5% or more. Also fix lint in dfsan.
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  7. @arsenm

    R600/SI: Relax some ordering in tests.

    arsenm authored
    This will help with enabling misched
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  8. @hfinkel

    Add a CFL Alias Analysis implementation

    hfinkel authored
    This provides an implementation of CFL alias analysis (including some
    supporting data structures). Currently, we don't have any extremely fancy
    features, sans some interprocedural analysis (i.e. no field sensitivity, etc.),
    and we do best sitting behind BasicAA + TBAA. In such a configuration, we take
    ~0.6-0.8% of total compile time, and give ~7-8% NoAlias responses to queries
    TBAA and BasicAA couldn't answer when bootstrapping LLVM. In testing this on
    other projects, we've seen up to 10.5% of queries dropped by BasicAA+TBAA
    answered with NoAlias by this algorithm.
    Patch by George Burgess IV (with minor modifications by me -- mostly adapting
    some BasicAA tests), thanks!
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  9. [FastISel][AArch64] Move over to target-dependent instruction selecti…

    Juergen Ributzka authored
    …on only.
    This change moves FastISel for AArch64 to target-dependent instruction selection
    only. This change replicates the existing target-independent behavior, therefore
    there are no changes to the unit tests or new tests.
    Future changes will take advantage of this change and update functionality
    and unit tests.
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  10. [FastISel] Provide the option to skip target-independent instruction …

    Juergen Ributzka authored
    …selection. NFC.
    This allows the target to disable target-independent instruction selection and
    jump directly into the target-dependent instruction selection code.
    This can be beneficial for targets, such as AArch64, which could emit much
    better code, but never got a chance to do so, because the target-independent
    instruction selector was able to find an instruction sequence.
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  11. Generate extract for in-tree uses if the use is scalar operand in vec…

    Yi Jiang authored
    …torized instruction. radar://18144665
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  12. @arsenm

    R600/SI: Fix hardcoded register numbers in test

    arsenm authored
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  13. Refactor LowerFABS and LowerFNEG into one function (x86) (NFC)

    Sanjay Patel authored
    We duplicate ~30 lines of code to lower FABS and FNEG for x86, so this patch combines them into one function. 
    No functional change intended, so no additional test cases. Test-suite behavior is unchanged.
    Differential Revision:
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
  14. @arsenm

    cmake: Don't reject unknown cpp files that start with .

    arsenm authored
    Some editors create hidden file backups in the same
    directory as the file, and it's annoying when cmake
    errors on them.
    git-svn-id: 91177308-0d34-0410-b5e6-96231b3b80d8
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