…rs, and llvm can use it as a caller saved register otherwise.
…LLVM expects odd-even register pairs to exist.
…o the obj streamer." This reverts commit fd51ead. Revert this as DwarfMonoException.cpp depends on it.
…sn't support it yet.
… negative offset.
…possible/easier for LLVM to hoist loads out of loops.
…IT, emit a variant of the C++ EH structures which contains extra information required by mono, i.e. the stack location of 'this'. For the static compiler, emit separate tables instead of the normal C++ tables. Add back parts of the LLVM JIT EH support code removed in r181354 and r181649.
…sed to control passes, sometimes they are the same, which causes problems if both the optimization and the code generation passes are linked into the same executable.
…ed every time llvm breaks public api. This allows mono to compile with different versions of LLVM.
…lls as register indirect.
…g invoke. Add mono.load/mono.store intrinsics which are the same as load/store, and lowered to the same code, but can throw exceptions. This enables support for load/store operations which throw implicit exceptions.
…n a non-abi register.
The number is just a constant, and this should make MSVC happy (or at least happier). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216981 91177308-0d34-0410-b5e6-96231b3b80d8
The only valid lowering of atomic stores in the X86 backend was mov from register to memory. As a result, storing an immediate required a useless copy of the immediate in a register. Now these can be compiled as a simple mov. Similarily, adding/and-ing/or-ing/xor-ing an immediate to an atomic location (but through an atomic_store/atomic_load, not a fetch_whatever intrinsic) can now make use of an 'add $imm, x(%rip)' instead of using a register. And the same applies to inc/dec. This second point matches the first issue identified in http://llvm.org/bugs/show_bug.cgi?id=17281 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216980 91177308-0d34-0410-b5e6-96231b3b80d8
Attempt to fix the MSVC build by not using constexpr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216979 91177308-0d34-0410-b5e6-96231b3b80d8
Add -use-cfl-aa (and -use-cfl-aa-in-codegen) to add CFL AA in the default pass managers (for easy testing). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216978 91177308-0d34-0410-b5e6-96231b3b80d8
…fined behaviour In theory, alignPtr() could push a pointer beyond the end of the current slab, making comparisons with that pointer undefined behaviour. Use an integer type to avoid this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216973 91177308-0d34-0410-b5e6-96231b3b80d8
… Wagner. This speeds up asan (at least on SPEC) by 1%-5% or more. Also fix lint in dfsan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216972 91177308-0d34-0410-b5e6-96231b3b80d8
This will help with enabling misched git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216971 91177308-0d34-0410-b5e6-96231b3b80d8
This provides an implementation of CFL alias analysis (including some supporting data structures). Currently, we don't have any extremely fancy features, sans some interprocedural analysis (i.e. no field sensitivity, etc.), and we do best sitting behind BasicAA + TBAA. In such a configuration, we take ~0.6-0.8% of total compile time, and give ~7-8% NoAlias responses to queries TBAA and BasicAA couldn't answer when bootstrapping LLVM. In testing this on other projects, we've seen up to 10.5% of queries dropped by BasicAA+TBAA answered with NoAlias by this algorithm. Patch by George Burgess IV (with minor modifications by me -- mostly adapting some BasicAA tests), thanks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216970 91177308-0d34-0410-b5e6-96231b3b80d8
…on only. This change moves FastISel for AArch64 to target-dependent instruction selection only. This change replicates the existing target-independent behavior, therefore there are no changes to the unit tests or new tests. Future changes will take advantage of this change and update functionality and unit tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216955 91177308-0d34-0410-b5e6-96231b3b80d8
…selection. NFC. This allows the target to disable target-independent instruction selection and jump directly into the target-dependent instruction selection code. This can be beneficial for targets, such as AArch64, which could emit much better code, but never got a chance to do so, because the target-independent instruction selector was able to find an instruction sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216947 91177308-0d34-0410-b5e6-96231b3b80d8
…torized instruction. radar://18144665 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216946 91177308-0d34-0410-b5e6-96231b3b80d8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216944 91177308-0d34-0410-b5e6-96231b3b80d8
We duplicate ~30 lines of code to lower FABS and FNEG for x86, so this patch combines them into one function. No functional change intended, so no additional test cases. Test-suite behavior is unchanged. Differential Revision: http://reviews.llvm.org/D5064 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216942 91177308-0d34-0410-b5e6-96231b3b80d8
Some editors create hidden file backups in the same directory as the file, and it's annoying when cmake errors on them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216941 91177308-0d34-0410-b5e6-96231b3b80d8