@@ -0,0 +1,311 @@
/*****************************************************************************
*
* Copyright (C) 2009 Atmel Corporation
*
* Model : UC3B1512
* Revision : $Revision: 62294 $
* Checkin Date : $Date: 2008-12-16 13:03:18 +0100 (ti., 16 des. 2008) $
*
****************************************************************************/
#ifndef AVR32_FREQM_2311_H_INCLUDED
#define AVR32_FREQM_2311_H_INCLUDED

#include "avr32/abi.h"


/*
Note to user:
The following defines are always generated:
- Register offset: AVR32_FREQM_<register>
- Bitfield mask: AVR32_FREQM_<register>_<bitfield>
- Bitfield offset: AVR32_FREQM_<register>_<bitfield>_OFFSET
- Bitfield size: AVR32_FREQM_<register>_<bitfield>_SIZE
- Bitfield values: AVR32_FREQM_<register>_<bitfield>_<value name>
The following defines are generated if they don't cause ambiguities,
i.e. the name is unique, or all values with that name are the same.
- Bitfield mask: AVR32_FREQM_<bitfield>
- Bitfield offset: AVR32_FREQM_<bitfield>_OFFSET
- Bitfield size: AVR32_FREQM_<bitfield>_SIZE
- Bitfield values: AVR32_FREQM_<bitfield>_<value name>
- Bitfield values: AVR32_FREQM_<value name>
All defines are sorted alphabetically.
*/


#define AVR32_FREQM_BUSY 0
#define AVR32_FREQM_BUSY_MASK 0x00000001
#define AVR32_FREQM_BUSY_OFFSET 0
#define AVR32_FREQM_BUSY_SIZE 1
#define AVR32_FREQM_CLKSEL 16
#define AVR32_FREQM_CLKSEL_CPU 0x00000000
#define AVR32_FREQM_CLKSEL_CRIPLEL 0x0000000a
#define AVR32_FREQM_CLKSEL_GENCLK0 0x0000000b
#define AVR32_FREQM_CLKSEL_GENCLK1 0x0000000c
#define AVR32_FREQM_CLKSEL_GENCLK2 0x0000000d
#define AVR32_FREQM_CLKSEL_GENCLK3 0x0000000e
#define AVR32_FREQM_CLKSEL_GENCLK4 0x0000000f
#define AVR32_FREQM_CLKSEL_GENCLK5 0x00000010
#define AVR32_FREQM_CLKSEL_HSB 0x00000001
#define AVR32_FREQM_CLKSEL_MASK 0x001f0000
#define AVR32_FREQM_CLKSEL_OFFSET 16
#define AVR32_FREQM_CLKSEL_OSC0 0x00000004
#define AVR32_FREQM_CLKSEL_OSC1 0x00000005
#define AVR32_FREQM_CLKSEL_OSC32 0x00000006
#define AVR32_FREQM_CLKSEL_PBA 0x00000002
#define AVR32_FREQM_CLKSEL_PBB 0x00000003
#define AVR32_FREQM_CLKSEL_PLL0 0x00000008
#define AVR32_FREQM_CLKSEL_PLL1 0x00000009
#define AVR32_FREQM_CLKSEL_RCOSC 0x00000007
#define AVR32_FREQM_CLKSEL_SIZE 5
#define AVR32_FREQM_CPU 0x00000000
#define AVR32_FREQM_CRIPLEL 0x0000000a
#define AVR32_FREQM_CTRL 0x00000000
#define AVR32_FREQM_CTRL_MASK 0x00000001
#define AVR32_FREQM_CTRL_RESETVALUE 0x00000000
#define AVR32_FREQM_CTRL_START 0
#define AVR32_FREQM_CTRL_START_MASK 0x00000001
#define AVR32_FREQM_CTRL_START_OFFSET 0
#define AVR32_FREQM_CTRL_START_SIZE 1
#define AVR32_FREQM_DONE 0
#define AVR32_FREQM_DONE_MASK 0x00000001
#define AVR32_FREQM_DONE_OFFSET 0
#define AVR32_FREQM_DONE_SIZE 1
#define AVR32_FREQM_GENCLK0 0x0000000b
#define AVR32_FREQM_GENCLK1 0x0000000c
#define AVR32_FREQM_GENCLK2 0x0000000d
#define AVR32_FREQM_GENCLK3 0x0000000e
#define AVR32_FREQM_GENCLK4 0x0000000f
#define AVR32_FREQM_GENCLK5 0x00000010
#define AVR32_FREQM_HSB 0x00000001
#define AVR32_FREQM_ICR 0x00000020
#define AVR32_FREQM_ICR_DONE 0
#define AVR32_FREQM_ICR_DONE_MASK 0x00000001
#define AVR32_FREQM_ICR_DONE_OFFSET 0
#define AVR32_FREQM_ICR_DONE_SIZE 1
#define AVR32_FREQM_ICR_MASK 0x00000001
#define AVR32_FREQM_ICR_RESETVALUE 0x00000000
#define AVR32_FREQM_IDR 0x00000014
#define AVR32_FREQM_IDR_DONE 0
#define AVR32_FREQM_IDR_DONE_MASK 0x00000001
#define AVR32_FREQM_IDR_DONE_OFFSET 0
#define AVR32_FREQM_IDR_DONE_SIZE 1
#define AVR32_FREQM_IDR_MASK 0x00000001
#define AVR32_FREQM_IDR_RESETVALUE 0x00000000
#define AVR32_FREQM_IER 0x00000010
#define AVR32_FREQM_IER_DONE 0
#define AVR32_FREQM_IER_DONE_MASK 0x00000001
#define AVR32_FREQM_IER_DONE_OFFSET 0
#define AVR32_FREQM_IER_DONE_SIZE 1
#define AVR32_FREQM_IER_MASK 0x00000001
#define AVR32_FREQM_IER_RESETVALUE 0x00000000
#define AVR32_FREQM_IMR 0x00000018
#define AVR32_FREQM_IMR_DONE 0
#define AVR32_FREQM_IMR_DONE_MASK 0x00000001
#define AVR32_FREQM_IMR_DONE_OFFSET 0
#define AVR32_FREQM_IMR_DONE_SIZE 1
#define AVR32_FREQM_IMR_MASK 0x00000001
#define AVR32_FREQM_IMR_RESETVALUE 0x00000000
#define AVR32_FREQM_ISR 0x0000001c
#define AVR32_FREQM_ISR_DONE 0
#define AVR32_FREQM_ISR_DONE_MASK 0x00000001
#define AVR32_FREQM_ISR_DONE_OFFSET 0
#define AVR32_FREQM_ISR_DONE_SIZE 1
#define AVR32_FREQM_ISR_MASK 0x00000001
#define AVR32_FREQM_ISR_RESETVALUE 0x00000000
#define AVR32_FREQM_MODE 0x00000004
#define AVR32_FREQM_MODE_CLKSEL 16
#define AVR32_FREQM_MODE_CLKSEL_CPU 0x00000000
#define AVR32_FREQM_MODE_CLKSEL_CRIPLEL 0x0000000a
#define AVR32_FREQM_MODE_CLKSEL_GENCLK0 0x0000000b
#define AVR32_FREQM_MODE_CLKSEL_GENCLK1 0x0000000c
#define AVR32_FREQM_MODE_CLKSEL_GENCLK2 0x0000000d
#define AVR32_FREQM_MODE_CLKSEL_GENCLK3 0x0000000e
#define AVR32_FREQM_MODE_CLKSEL_GENCLK4 0x0000000f
#define AVR32_FREQM_MODE_CLKSEL_GENCLK5 0x00000010
#define AVR32_FREQM_MODE_CLKSEL_HSB 0x00000001
#define AVR32_FREQM_MODE_CLKSEL_MASK 0x001f0000
#define AVR32_FREQM_MODE_CLKSEL_OFFSET 16
#define AVR32_FREQM_MODE_CLKSEL_OSC0 0x00000004
#define AVR32_FREQM_MODE_CLKSEL_OSC1 0x00000005
#define AVR32_FREQM_MODE_CLKSEL_OSC32 0x00000006
#define AVR32_FREQM_MODE_CLKSEL_PBA 0x00000002
#define AVR32_FREQM_MODE_CLKSEL_PBB 0x00000003
#define AVR32_FREQM_MODE_CLKSEL_PLL0 0x00000008
#define AVR32_FREQM_MODE_CLKSEL_PLL1 0x00000009
#define AVR32_FREQM_MODE_CLKSEL_RCOSC 0x00000007
#define AVR32_FREQM_MODE_CLKSEL_SIZE 5
#define AVR32_FREQM_MODE_MASK 0x001fff01
#define AVR32_FREQM_MODE_REFNUM 8
#define AVR32_FREQM_MODE_REFNUM_MASK 0x0000ff00
#define AVR32_FREQM_MODE_REFNUM_OFFSET 8
#define AVR32_FREQM_MODE_REFNUM_SIZE 8
#define AVR32_FREQM_MODE_REFSEL 0
#define AVR32_FREQM_MODE_REFSEL_MASK 0x00000001
#define AVR32_FREQM_MODE_REFSEL_OFFSET 0
#define AVR32_FREQM_MODE_REFSEL_REF_OSC32 0x00000001
#define AVR32_FREQM_MODE_REFSEL_REF_RCOSC 0x00000000
#define AVR32_FREQM_MODE_REFSEL_SIZE 1
#define AVR32_FREQM_MODE_RESETVALUE 0x00000000
#define AVR32_FREQM_OSC0 0x00000004
#define AVR32_FREQM_OSC1 0x00000005
#define AVR32_FREQM_OSC32 0x00000006
#define AVR32_FREQM_PBA 0x00000002
#define AVR32_FREQM_PBB 0x00000003
#define AVR32_FREQM_PLL0 0x00000008
#define AVR32_FREQM_PLL1 0x00000009
#define AVR32_FREQM_RCOSC 0x00000007
#define AVR32_FREQM_REFNUM 8
#define AVR32_FREQM_REFNUM_MASK 0x0000ff00
#define AVR32_FREQM_REFNUM_OFFSET 8
#define AVR32_FREQM_REFNUM_SIZE 8
#define AVR32_FREQM_REFSEL 0
#define AVR32_FREQM_REFSEL_MASK 0x00000001
#define AVR32_FREQM_REFSEL_OFFSET 0
#define AVR32_FREQM_REFSEL_REF_OSC32 0x00000001
#define AVR32_FREQM_REFSEL_REF_RCOSC 0x00000000
#define AVR32_FREQM_REFSEL_SIZE 1
#define AVR32_FREQM_REF_OSC32 0x00000001
#define AVR32_FREQM_REF_RCOSC 0x00000000
#define AVR32_FREQM_START 0
#define AVR32_FREQM_START_MASK 0x00000001
#define AVR32_FREQM_START_OFFSET 0
#define AVR32_FREQM_START_SIZE 1
#define AVR32_FREQM_STATUS 0x00000008
#define AVR32_FREQM_STATUS_BUSY 0
#define AVR32_FREQM_STATUS_BUSY_MASK 0x00000001
#define AVR32_FREQM_STATUS_BUSY_OFFSET 0
#define AVR32_FREQM_STATUS_BUSY_SIZE 1
#define AVR32_FREQM_STATUS_MASK 0x00000001
#define AVR32_FREQM_STATUS_RESETVALUE 0x00000000
#define AVR32_FREQM_VALUE 0x0000000c
#define AVR32_FREQM_VALUE_MASK 0x00ffffff
#define AVR32_FREQM_VALUE_OFFSET 0
#define AVR32_FREQM_VALUE_RESETVALUE 0x00000000
#define AVR32_FREQM_VALUE_SIZE 24
#define AVR32_FREQM_VALUE_VALUE 0
#define AVR32_FREQM_VALUE_VALUE_MASK 0x00ffffff
#define AVR32_FREQM_VALUE_VALUE_OFFSET 0
#define AVR32_FREQM_VALUE_VALUE_SIZE 24




#ifdef __AVR32_ABI_COMPILER__


typedef struct avr32_freqm_ctrl_t {
unsigned int :31;
unsigned int start : 1;
} avr32_freqm_ctrl_t;



typedef struct avr32_freqm_mode_t {
unsigned int :11;
unsigned int clksel : 5;
unsigned int refnum : 8;
unsigned int : 7;
unsigned int refsel : 1;
} avr32_freqm_mode_t;



typedef struct avr32_freqm_status_t {
unsigned int :31;
unsigned int busy : 1;
} avr32_freqm_status_t;



typedef struct avr32_freqm_value_t {
unsigned int : 8;
unsigned int value :24;
} avr32_freqm_value_t;



typedef struct avr32_freqm_ier_t {
unsigned int :31;
unsigned int done : 1;
} avr32_freqm_ier_t;



typedef struct avr32_freqm_idr_t {
unsigned int :31;
unsigned int done : 1;
} avr32_freqm_idr_t;



typedef struct avr32_freqm_imr_t {
unsigned int :31;
unsigned int done : 1;
} avr32_freqm_imr_t;



typedef struct avr32_freqm_isr_t {
unsigned int :31;
unsigned int done : 1;
} avr32_freqm_isr_t;



typedef struct avr32_freqm_icr_t {
unsigned int :31;
unsigned int done : 1;
} avr32_freqm_icr_t;



typedef struct avr32_freqm_t {
union {
unsigned long ctrl ;//0x0000
avr32_freqm_ctrl_t CTRL ;
};
union {
unsigned long mode ;//0x0004
avr32_freqm_mode_t MODE ;
};
union {
const unsigned long status ;//0x0008
const avr32_freqm_status_t STATUS ;
};
union {
unsigned long value ;//0x000c
avr32_freqm_value_t VALUE ;
};
union {
unsigned long ier ;//0x0010
avr32_freqm_ier_t IER ;
};
union {
unsigned long idr ;//0x0014
avr32_freqm_idr_t IDR ;
};
union {
const unsigned long imr ;//0x0018
const avr32_freqm_imr_t IMR ;
};
union {
const unsigned long isr ;//0x001c
const avr32_freqm_isr_t ISR ;
};
union {
unsigned long icr ;//0x0020
avr32_freqm_icr_t ICR ;
};
} avr32_freqm_t;



/*#ifdef __AVR32_ABI_COMPILER__*/
#endif

/*#ifdef AVR32_FREQM_2311_H_INCLUDED*/
#endif

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@@ -0,0 +1,198 @@
/*****************************************************************************
*
* Copyright (C) 2008 Atmel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* * Neither the name of the copyright holders nor the names of
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Model : UC3A0512ES
* Revision : $Revision: 62595 $
* Checkin Date : $Date: 2009-10-21 13:31:31 +0200 (on., 21 okt. 2009) $
*
****************************************************************************/
#ifndef AVR32_GPIO_100_H_INCLUDED
#define AVR32_GPIO_100_H_INCLUDED

#include "avr32/abi.h"


/*
Note to user:
The following defines are always generated:
- Register offset: AVR32_GPIO_<register>
- Bitfield mask: AVR32_GPIO_<register>_<bitfield>
- Bitfield offset: AVR32_GPIO_<register>_<bitfield>_OFFSET
- Bitfield size: AVR32_GPIO_<register>_<bitfield>_SIZE
- Bitfield values: AVR32_GPIO_<register>_<bitfield>_<value name>
The following defines are generated if they don't cause ambiguities,
i.e. the name is unique, or all values with that name are the same.
- Bitfield mask: AVR32_GPIO_<bitfield>
- Bitfield offset: AVR32_GPIO_<bitfield>_OFFSET
- Bitfield size: AVR32_GPIO_<bitfield>_SIZE
- Bitfield values: AVR32_GPIO_<bitfield>_<value name>
- Bitfield values: AVR32_GPIO_<value name>
All defines are sorted alphabetically.
*/


#define AVR32_GPIO_GFER 0x000000c0
#define AVR32_GPIO_GFERC 0x000000c8
#define AVR32_GPIO_GFERS 0x000000c4
#define AVR32_GPIO_GFERT 0x000000cc
#define AVR32_GPIO_GPER 0x00000000
#define AVR32_GPIO_GPERC 0x00000008
#define AVR32_GPIO_GPERS 0x00000004
#define AVR32_GPIO_GPERT 0x0000000c
#define AVR32_GPIO_IER 0x00000090
#define AVR32_GPIO_IERC 0x00000098
#define AVR32_GPIO_IERS 0x00000094
#define AVR32_GPIO_IERT 0x0000009c
#define AVR32_GPIO_IFR 0x000000d0
#define AVR32_GPIO_IFRC 0x000000d8
#define AVR32_GPIO_IMR0 0x000000a0
#define AVR32_GPIO_IMR0C 0x000000a8
#define AVR32_GPIO_IMR0S 0x000000a4
#define AVR32_GPIO_IMR0T 0x000000ac
#define AVR32_GPIO_IMR1 0x000000b0
#define AVR32_GPIO_IMR1C 0x000000b8
#define AVR32_GPIO_IMR1S 0x000000b4
#define AVR32_GPIO_IMR1T 0x000000bc
#define AVR32_GPIO_ODER 0x00000040
#define AVR32_GPIO_ODERC 0x00000048
#define AVR32_GPIO_ODERS 0x00000044
#define AVR32_GPIO_ODERT 0x0000004c
#define AVR32_GPIO_ODMER 0x00000080
#define AVR32_GPIO_ODMERC 0x00000088
#define AVR32_GPIO_ODMERS 0x00000084
#define AVR32_GPIO_ODMERT 0x0000008c
#define AVR32_GPIO_OVR 0x00000050
#define AVR32_GPIO_OVRC 0x00000058
#define AVR32_GPIO_OVRS 0x00000054
#define AVR32_GPIO_OVRT 0x0000005c
#define AVR32_GPIO_PMR0 0x00000010
#define AVR32_GPIO_PMR0C 0x00000018
#define AVR32_GPIO_PMR0S 0x00000014
#define AVR32_GPIO_PMR0T 0x0000001c
#define AVR32_GPIO_PMR1 0x00000020
#define AVR32_GPIO_PMR1C 0x00000028
#define AVR32_GPIO_PMR1S 0x00000024
#define AVR32_GPIO_PMR1T 0x0000002c
#define AVR32_GPIO_PUER 0x00000070
#define AVR32_GPIO_PUERC 0x00000078
#define AVR32_GPIO_PUERS 0x00000074
#define AVR32_GPIO_PUERT 0x0000007c
#define AVR32_GPIO_PVR 0x00000060




#ifdef __AVR32_ABI_COMPILER__

typedef struct avr32_gpio_port_t {
unsigned long gper ;//0x0000
unsigned long gpers ;//0x0004
unsigned long gperc ;//0x0008
unsigned long gpert ;//0x000c
unsigned long pmr0 ;//0x0010
unsigned long pmr0s ;//0x0014
unsigned long pmr0c ;//0x0018
unsigned long pmr0t ;//0x001c
unsigned long pmr1 ;//0x0020
unsigned long pmr1s ;//0x0024
unsigned long pmr1c ;//0x0028
unsigned long pmr1t ;//0x002c
unsigned int :32 ;//0x0030
unsigned int :32 ;//0x0034
unsigned int :32 ;//0x0038
unsigned int :32 ;//0x003c
unsigned long oder ;//0x0040
unsigned long oders ;//0x0044
unsigned long oderc ;//0x0048
unsigned long odert ;//0x004c
unsigned long ovr ;//0x0050
unsigned long ovrs ;//0x0054
unsigned long ovrc ;//0x0058
unsigned long ovrt ;//0x005c
const unsigned long pvr ;//0x0060
unsigned int :32 ;//0x0064
unsigned int :32 ;//0x0068
unsigned int :32 ;//0x006c
unsigned long puer ;//0x0070
unsigned long puers ;//0x0074
unsigned long puerc ;//0x0078
unsigned long puert ;//0x007c
unsigned long odmer ;//0x0080
unsigned long odmers ;//0x0084
unsigned long odmerc ;//0x0088
unsigned long odmert ;//0x008c
unsigned long ier ;//0x0090
unsigned long iers ;//0x0094
unsigned long ierc ;//0x0098
unsigned long iert ;//0x009c
unsigned long imr0 ;//0x00a0
unsigned long imr0s ;//0x00a4
unsigned long imr0c ;//0x00a8
unsigned long imr0t ;//0x00ac
unsigned long imr1 ;//0x00b0
unsigned long imr1s ;//0x00b4
unsigned long imr1c ;//0x00b8
unsigned long imr1t ;//0x00bc
unsigned long gfer ;//0x00c0
unsigned long gfers ;//0x00c4
unsigned long gferc ;//0x00c8
unsigned long gfert ;//0x00cc
const unsigned long ifr ;//0x00d0
unsigned int :32 ;//0x00d4
unsigned long ifrc ;//0x00d8
unsigned int :32 ;//0x00dc
unsigned int :32 ;//0x00e0
unsigned int :32 ;//0x00e4
unsigned int :32 ;//0x00e8
unsigned int :32 ;//0x00ec
unsigned int :32 ;//0x00f0
unsigned int :32 ;//0x00f4
unsigned int :32 ;//0x00f8
unsigned int :32 ;//0x00fc
} avr32_gpio_port_t;


typedef struct avr32_gpio_t {
avr32_gpio_port_t port[AVR32_GPIO_PORT_LENGTH];//0x0
} avr32_gpio_t;



/*#ifdef __AVR32_ABI_COMPILER__*/
#endif

/*#ifdef AVR32_GPIO_100_H_INCLUDED*/
#endif

@@ -0,0 +1,281 @@
/*****************************************************************************
*
* Copyright (C) 2008 Atmel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* * Neither the name of the copyright holders nor the names of
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Model : UC3A3128
* Revision : $Revision: 62595 $
* Checkin Date : $Date: 2009-10-21 13:31:31 +0200 (on., 21 okt. 2009) $
*
****************************************************************************/
#ifndef AVR32_GPIO_110_H_INCLUDED
#define AVR32_GPIO_110_H_INCLUDED

#include "avr32/abi.h"


/*
Note to user:
The following defines are always generated:
- Register offset: AVR32_GPIO_<register>
- Bitfield mask: AVR32_GPIO_<register>_<bitfield>
- Bitfield offset: AVR32_GPIO_<register>_<bitfield>_OFFSET
- Bitfield size: AVR32_GPIO_<register>_<bitfield>_SIZE
- Bitfield values: AVR32_GPIO_<register>_<bitfield>_<value name>
The following defines are generated if they don't cause ambiguities,
i.e. the name is unique, or all values with that name are the same.
- Bitfield mask: AVR32_GPIO_<bitfield>
- Bitfield offset: AVR32_GPIO_<bitfield>_OFFSET
- Bitfield size: AVR32_GPIO_<bitfield>_SIZE
- Bitfield values: AVR32_GPIO_<bitfield>_<value name>
- Bitfield values: AVR32_GPIO_<value name>
All defines are sorted alphabetically.
*/


#define AVR32_GPIO_GFER 0x000000c0
#define AVR32_GPIO_GFERC 0x000000c8
#define AVR32_GPIO_GFERS 0x000000c4
#define AVR32_GPIO_GFERT 0x000000cc
#define AVR32_GPIO_GPER 0x00000000
#define AVR32_GPIO_GPERC 0x00000008
#define AVR32_GPIO_GPERS 0x00000004
#define AVR32_GPIO_GPERT 0x0000000c
#define AVR32_GPIO_IER 0x00000090
#define AVR32_GPIO_IERC 0x00000098
#define AVR32_GPIO_IERS 0x00000094
#define AVR32_GPIO_IERT 0x0000009c
#define AVR32_GPIO_IFR 0x000000d0
#define AVR32_GPIO_IFRC 0x000000d8
#define AVR32_GPIO_IMR0 0x000000a0
#define AVR32_GPIO_IMR0C 0x000000a8
#define AVR32_GPIO_IMR0S 0x000000a4
#define AVR32_GPIO_IMR0T 0x000000ac
#define AVR32_GPIO_IMR1 0x000000b0
#define AVR32_GPIO_IMR1C 0x000000b8
#define AVR32_GPIO_IMR1S 0x000000b4
#define AVR32_GPIO_IMR1T 0x000000bc
#define AVR32_GPIO_LOCAL_ODER 0x00000040
#define AVR32_GPIO_LOCAL_ODERC 0x00000048
#define AVR32_GPIO_LOCAL_ODERS 0x00000044
#define AVR32_GPIO_LOCAL_ODERT 0x0000004c
#define AVR32_GPIO_LOCAL_OVR 0x00000050
#define AVR32_GPIO_LOCAL_OVRC 0x00000058
#define AVR32_GPIO_LOCAL_OVRS 0x00000054
#define AVR32_GPIO_LOCAL_OVRT 0x0000005c
#define AVR32_GPIO_LOCAL_PVR 0x00000060
#define AVR32_GPIO_ODER 0x00000040
#define AVR32_GPIO_ODERC 0x00000048
#define AVR32_GPIO_ODERS 0x00000044
#define AVR32_GPIO_ODERT 0x0000004c
#define AVR32_GPIO_ODMER 0x00000080
#define AVR32_GPIO_ODMERC 0x00000088
#define AVR32_GPIO_ODMERS 0x00000084
#define AVR32_GPIO_ODMERT 0x0000008c
#define AVR32_GPIO_OVR 0x00000050
#define AVR32_GPIO_OVRC 0x00000058
#define AVR32_GPIO_OVRS 0x00000054
#define AVR32_GPIO_OVRT 0x0000005c
#define AVR32_GPIO_PMR0 0x00000010
#define AVR32_GPIO_PMR0C 0x00000018
#define AVR32_GPIO_PMR0S 0x00000014
#define AVR32_GPIO_PMR0T 0x0000001c
#define AVR32_GPIO_PMR1 0x00000020
#define AVR32_GPIO_PMR1C 0x00000028
#define AVR32_GPIO_PMR1S 0x00000024
#define AVR32_GPIO_PMR1T 0x0000002c
#define AVR32_GPIO_PUER 0x00000070
#define AVR32_GPIO_PUERC 0x00000078
#define AVR32_GPIO_PUERS 0x00000074
#define AVR32_GPIO_PUERT 0x0000007c
#define AVR32_GPIO_PVR 0x00000060




#ifdef __AVR32_ABI_COMPILER__

typedef struct avr32_gpio_local_port_t {
unsigned int :32 ;//0x0000
unsigned int :32 ;//0x0004
unsigned int :32 ;//0x0008
unsigned int :32 ;//0x000c
unsigned int :32 ;//0x0010
unsigned int :32 ;//0x0014
unsigned int :32 ;//0x0018
unsigned int :32 ;//0x001c
unsigned int :32 ;//0x0020
unsigned int :32 ;//0x0024
unsigned int :32 ;//0x0028
unsigned int :32 ;//0x002c
unsigned int :32 ;//0x0030
unsigned int :32 ;//0x0034
unsigned int :32 ;//0x0038
unsigned int :32 ;//0x003c
unsigned long oder ;//0x0040
unsigned long oders ;//0x0044
unsigned long oderc ;//0x0048
unsigned long odert ;//0x004c
unsigned long ovr ;//0x0050
unsigned long ovrs ;//0x0054
unsigned long ovrc ;//0x0058
unsigned long ovrt ;//0x005c
const unsigned long pvr ;//0x0060
unsigned int :32 ;//0x0064
unsigned int :32 ;//0x0068
unsigned int :32 ;//0x006c
unsigned int :32 ;//0x0070
unsigned int :32 ;//0x0074
unsigned int :32 ;//0x0078
unsigned int :32 ;//0x007c
unsigned int :32 ;//0x0080
unsigned int :32 ;//0x0084
unsigned int :32 ;//0x0088
unsigned int :32 ;//0x008c
unsigned int :32 ;//0x0090
unsigned int :32 ;//0x0094
unsigned int :32 ;//0x0098
unsigned int :32 ;//0x009c
unsigned int :32 ;//0x00a0
unsigned int :32 ;//0x00a4
unsigned int :32 ;//0x00a8
unsigned int :32 ;//0x00ac
unsigned int :32 ;//0x00b0
unsigned int :32 ;//0x00b4
unsigned int :32 ;//0x00b8
unsigned int :32 ;//0x00bc
unsigned int :32 ;//0x00c0
unsigned int :32 ;//0x00c4
unsigned int :32 ;//0x00c8
unsigned int :32 ;//0x00cc
unsigned int :32 ;//0x00d0
unsigned int :32 ;//0x00d4
unsigned int :32 ;//0x00d8
unsigned int :32 ;//0x00dc
unsigned int :32 ;//0x00e0
unsigned int :32 ;//0x00e4
unsigned int :32 ;//0x00e8
unsigned int :32 ;//0x00ec
unsigned int :32 ;//0x00f0
unsigned int :32 ;//0x00f4
unsigned int :32 ;//0x00f8
unsigned int :32 ;//0x00fc
} avr32_gpio_local_port_t;


typedef struct avr32_gpio_local_t {
avr32_gpio_local_port_t port[AVR32_GPIO_PORT_LENGTH];//0x0
} avr32_gpio_local_t;



typedef struct avr32_gpio_port_t {
unsigned long gper ;//0x0000
unsigned long gpers ;//0x0004
unsigned long gperc ;//0x0008
unsigned long gpert ;//0x000c
unsigned long pmr0 ;//0x0010
unsigned long pmr0s ;//0x0014
unsigned long pmr0c ;//0x0018
unsigned long pmr0t ;//0x001c
unsigned long pmr1 ;//0x0020
unsigned long pmr1s ;//0x0024
unsigned long pmr1c ;//0x0028
unsigned long pmr1t ;//0x002c
unsigned int :32 ;//0x0030
unsigned int :32 ;//0x0034
unsigned int :32 ;//0x0038
unsigned int :32 ;//0x003c
unsigned long oder ;//0x0040
unsigned long oders ;//0x0044
unsigned long oderc ;//0x0048
unsigned long odert ;//0x004c
unsigned long ovr ;//0x0050
unsigned long ovrs ;//0x0054
unsigned long ovrc ;//0x0058
unsigned long ovrt ;//0x005c
const unsigned long pvr ;//0x0060
unsigned int :32 ;//0x0064
unsigned int :32 ;//0x0068
unsigned int :32 ;//0x006c
unsigned long puer ;//0x0070
unsigned long puers ;//0x0074
unsigned long puerc ;//0x0078
unsigned long puert ;//0x007c
unsigned long odmer ;//0x0080
unsigned long odmers ;//0x0084
unsigned long odmerc ;//0x0088
unsigned long odmert ;//0x008c
unsigned long ier ;//0x0090
unsigned long iers ;//0x0094
unsigned long ierc ;//0x0098
unsigned long iert ;//0x009c
unsigned long imr0 ;//0x00a0
unsigned long imr0s ;//0x00a4
unsigned long imr0c ;//0x00a8
unsigned long imr0t ;//0x00ac
unsigned long imr1 ;//0x00b0
unsigned long imr1s ;//0x00b4
unsigned long imr1c ;//0x00b8
unsigned long imr1t ;//0x00bc
unsigned long gfer ;//0x00c0
unsigned long gfers ;//0x00c4
unsigned long gferc ;//0x00c8
unsigned long gfert ;//0x00cc
const unsigned long ifr ;//0x00d0
unsigned int :32 ;//0x00d4
unsigned long ifrc ;//0x00d8
unsigned int :32 ;//0x00dc
unsigned int :32 ;//0x00e0
unsigned int :32 ;//0x00e4
unsigned int :32 ;//0x00e8
unsigned int :32 ;//0x00ec
unsigned int :32 ;//0x00f0
unsigned int :32 ;//0x00f4
unsigned int :32 ;//0x00f8
unsigned int :32 ;//0x00fc
} avr32_gpio_port_t;


typedef struct avr32_gpio_t {
avr32_gpio_port_t port[AVR32_GPIO_PORT_LENGTH];//0x0
} avr32_gpio_t;



/*#ifdef __AVR32_ABI_COMPILER__*/
#endif

/*#ifdef AVR32_GPIO_110_H_INCLUDED*/
#endif

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/*****************************************************************************
*
* Copyright (C) 2009 Atmel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* * Neither the name of the copyright holders nor the names of
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Model : UC3L064T
* Revision : $Revision: 60652 $
* Checkin Date : $Date: 2009-09-14 14:15:07 +0200 (ma., 14 sep. 2009) $
*
****************************************************************************/
#ifndef AVR32_GPIO_LOCAL_100_H_INCLUDED
#define AVR32_GPIO_LOCAL_100_H_INCLUDED

#include "avr32/abi.h"


/*
Note to user:
The following defines are always generated:
- Register offset: AVR32_GPIO_LOCAL_<register>
- Bitfield mask: AVR32_GPIO_LOCAL_<register>_<bitfield>
- Bitfield offset: AVR32_GPIO_LOCAL_<register>_<bitfield>_OFFSET
- Bitfield size: AVR32_GPIO_LOCAL_<register>_<bitfield>_SIZE
- Bitfield values: AVR32_GPIO_LOCAL_<register>_<bitfield>_<value name>
The following defines are generated if they don't cause ambiguities,
i.e. the name is unique, or all values with that name are the same.
- Bitfield mask: AVR32_GPIO_LOCAL_<bitfield>
- Bitfield offset: AVR32_GPIO_LOCAL_<bitfield>_OFFSET
- Bitfield size: AVR32_GPIO_LOCAL_<bitfield>_SIZE
- Bitfield values: AVR32_GPIO_LOCAL_<bitfield>_<value name>
- Bitfield values: AVR32_GPIO_LOCAL_<value name>
All defines are sorted alphabetically.
*/


#define AVR32_GPIO_LOCAL_ODER 0x00000040
#define AVR32_GPIO_LOCAL_ODERC 0x00000048
#define AVR32_GPIO_LOCAL_ODERC_MASK 0x00000000
#define AVR32_GPIO_LOCAL_ODERC_RESETVALUE 0x00000000
#define AVR32_GPIO_LOCAL_ODERS 0x00000044
#define AVR32_GPIO_LOCAL_ODERS_MASK 0x00000000
#define AVR32_GPIO_LOCAL_ODERS_RESETVALUE 0x00000000
#define AVR32_GPIO_LOCAL_ODERT 0x0000004c
#define AVR32_GPIO_LOCAL_ODERT_MASK 0x00000000
#define AVR32_GPIO_LOCAL_ODERT_RESETVALUE 0x00000000
#define AVR32_GPIO_LOCAL_ODER_MASK 0x00000000
#define AVR32_GPIO_LOCAL_ODER_RESETVALUE 0x00000000
#define AVR32_GPIO_LOCAL_OVR 0x00000050
#define AVR32_GPIO_LOCAL_OVRC 0x00000058
#define AVR32_GPIO_LOCAL_OVRC_MASK 0x00000000
#define AVR32_GPIO_LOCAL_OVRC_RESETVALUE 0x00000000
#define AVR32_GPIO_LOCAL_OVRS 0x00000054
#define AVR32_GPIO_LOCAL_OVRS_MASK 0x00000000
#define AVR32_GPIO_LOCAL_OVRS_RESETVALUE 0x00000000
#define AVR32_GPIO_LOCAL_OVRT 0x0000005c
#define AVR32_GPIO_LOCAL_OVRT_MASK 0x00000000
#define AVR32_GPIO_LOCAL_OVRT_RESETVALUE 0x00000000
#define AVR32_GPIO_LOCAL_OVR_MASK 0x00000000
#define AVR32_GPIO_LOCAL_OVR_RESETVALUE 0x00000000
#define AVR32_GPIO_LOCAL_PVR 0x00000060
#define AVR32_GPIO_LOCAL_PVR_MASK 0x00000000
#define AVR32_GPIO_LOCAL_PVR_RESETVALUE 0x00000000




#ifdef __AVR32_ABI_COMPILER__

typedef struct avr32_gpio_local_port_t {
unsigned int :32 ;//0x0000
unsigned int :32 ;//0x0004
unsigned int :32 ;//0x0008
unsigned int :32 ;//0x000c
unsigned int :32 ;//0x0010
unsigned int :32 ;//0x0014
unsigned int :32 ;//0x0018
unsigned int :32 ;//0x001c
unsigned int :32 ;//0x0020
unsigned int :32 ;//0x0024
unsigned int :32 ;//0x0028
unsigned int :32 ;//0x002c
unsigned int :32 ;//0x0030
unsigned int :32 ;//0x0034
unsigned int :32 ;//0x0038
unsigned int :32 ;//0x003c
unsigned long oder ;//0x0040
unsigned long oders ;//0x0044
unsigned long oderc ;//0x0048
unsigned long odert ;//0x004c
unsigned long ovr ;//0x0050
unsigned long ovrs ;//0x0054
unsigned long ovrc ;//0x0058
unsigned long ovrt ;//0x005c
const unsigned long pvr ;//0x0060
unsigned int :32 ;//0x0064
unsigned int :32 ;//0x0068
unsigned int :32 ;//0x006c
unsigned int :32 ;//0x0070
unsigned int :32 ;//0x0074
unsigned int :32 ;//0x0078
unsigned int :32 ;//0x007c
unsigned int :32 ;//0x0080
unsigned int :32 ;//0x0084
unsigned int :32 ;//0x0088
unsigned int :32 ;//0x008c
unsigned int :32 ;//0x0090
unsigned int :32 ;//0x0094
unsigned int :32 ;//0x0098
unsigned int :32 ;//0x009c
unsigned int :32 ;//0x00a0
unsigned int :32 ;//0x00a4
unsigned int :32 ;//0x00a8
unsigned int :32 ;//0x00ac
unsigned int :32 ;//0x00b0
unsigned int :32 ;//0x00b4
unsigned int :32 ;//0x00b8
unsigned int :32 ;//0x00bc
unsigned int :32 ;//0x00c0
unsigned int :32 ;//0x00c4
unsigned int :32 ;//0x00c8
unsigned int :32 ;//0x00cc
unsigned int :32 ;//0x00d0
unsigned int :32 ;//0x00d4
unsigned int :32 ;//0x00d8
unsigned int :32 ;//0x00dc
unsigned int :32 ;//0x00e0
unsigned int :32 ;//0x00e4
unsigned int :32 ;//0x00e8
unsigned int :32 ;//0x00ec
unsigned int :32 ;//0x00f0
unsigned int :32 ;//0x00f4
unsigned int :32 ;//0x00f8
unsigned int :32 ;//0x00fc
unsigned int :32 ;//0x0100
unsigned int :32 ;//0x0104
unsigned int :32 ;//0x0108
unsigned int :32 ;//0x010c
unsigned int :32 ;//0x0110
unsigned int :32 ;//0x0114
unsigned int :32 ;//0x0118
unsigned int :32 ;//0x011c
unsigned int :32 ;//0x0120
unsigned int :32 ;//0x0124
unsigned int :32 ;//0x0128
unsigned int :32 ;//0x012c
unsigned int :32 ;//0x0130
unsigned int :32 ;//0x0134
unsigned int :32 ;//0x0138
unsigned int :32 ;//0x013c
unsigned int :32 ;//0x0140
unsigned int :32 ;//0x0144
unsigned int :32 ;//0x0148
unsigned int :32 ;//0x014c
unsigned int :32 ;//0x0150
unsigned int :32 ;//0x0154
unsigned int :32 ;//0x0158
unsigned int :32 ;//0x015c
unsigned int :32 ;//0x0160
unsigned int :32 ;//0x0164
unsigned int :32 ;//0x0168
unsigned int :32 ;//0x016c
unsigned int :32 ;//0x0170
unsigned int :32 ;//0x0174
unsigned int :32 ;//0x0178
unsigned int :32 ;//0x017c
unsigned int :32 ;//0x0180
unsigned int :32 ;//0x0184
unsigned int :32 ;//0x0188
unsigned int :32 ;//0x018c
unsigned int :32 ;//0x0190
unsigned int :32 ;//0x0194
unsigned int :32 ;//0x0198
unsigned int :32 ;//0x019c
unsigned int :32 ;//0x01a0
unsigned int :32 ;//0x01a4
unsigned int :32 ;//0x01a8
unsigned int :32 ;//0x01ac
unsigned int :32 ;//0x01b0
unsigned int :32 ;//0x01b4
unsigned int :32 ;//0x01b8
unsigned int :32 ;//0x01bc
unsigned int :32 ;//0x01c0
unsigned int :32 ;//0x01c4
unsigned int :32 ;//0x01c8
unsigned int :32 ;//0x01cc
unsigned int :32 ;//0x01d0
unsigned int :32 ;//0x01d4
unsigned int :32 ;//0x01d8
unsigned int :32 ;//0x01dc
unsigned int :32 ;//0x01e0
unsigned int :32 ;//0x01e4
unsigned int :32 ;//0x01e8
unsigned int :32 ;//0x01ec
unsigned int :32 ;//0x01f0
unsigned int :32 ;//0x01f4
unsigned int :32 ;//0x01f8
unsigned int :32 ;//0x01fc
} avr32_gpio_local_port_t;


typedef struct avr32_gpio_local_t {
avr32_gpio_local_port_t port[AVR32_GPIO_PORT_LENGTH];//0x0
avr32_gpio_local_port_t port_reserved[64 - AVR32_GPIO_PORT_LENGTH];//Padding
} avr32_gpio_local_t;



/*#ifdef __AVR32_ABI_COMPILER__*/
#endif

/*#ifdef AVR32_GPIO_LOCAL_100_H_INCLUDED*/
#endif

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/*****************************************************************************
*
* Copyright (C) 2008-2009 Atmel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* * Neither the name of the copyright holders nor the names of
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Model : AP7200
* Revision : $Revision: 62595 $
* Checkin Date : $Date: 2009-10-21 13:31:31 +0200 (on., 21 okt. 2009) $
*
****************************************************************************/
#ifndef AVR32_INTC_101_H_INCLUDED
#define AVR32_INTC_101_H_INCLUDED

#include "avr32/abi.h"


/*
Note to user:
The following defines are always generated:
- Register offset: AVR32_INTC_<register>
- Bitfield mask: AVR32_INTC_<register>_<bitfield>
- Bitfield offset: AVR32_INTC_<register>_<bitfield>_OFFSET
- Bitfield size: AVR32_INTC_<register>_<bitfield>_SIZE
- Bitfield values: AVR32_INTC_<register>_<bitfield>_<value name>
The following defines are generated if they don't cause ambiguities,
i.e. the name is unique, or all values with that name are the same.
- Bitfield mask: AVR32_INTC_<bitfield>
- Bitfield offset: AVR32_INTC_<bitfield>_OFFSET
- Bitfield size: AVR32_INTC_<bitfield>_SIZE
- Bitfield values: AVR32_INTC_<bitfield>_<value name>
- Bitfield values: AVR32_INTC_<value name>
All defines are sorted alphabetically.
*/


#define AVR32_INTC_AUTOVECTOR 0
#define AVR32_INTC_AUTOVECTOR_MASK 0x00003fff
#define AVR32_INTC_AUTOVECTOR_OFFSET 0
#define AVR32_INTC_AUTOVECTOR_SIZE 14
#define AVR32_INTC_CAUSE 0
#define AVR32_INTC_CAUSE_MASK 0x0000003f
#define AVR32_INTC_CAUSE_OFFSET 0
#define AVR32_INTC_CAUSE_SIZE 6
#define AVR32_INTC_ICR 0x00000200
#define AVR32_INTC_ICR_CAUSE 0
#define AVR32_INTC_ICR_CAUSE_MASK 0x0000003f
#define AVR32_INTC_ICR_CAUSE_OFFSET 0
#define AVR32_INTC_ICR_CAUSE_SIZE 6
#define AVR32_INTC_INT0 0x00000000
#define AVR32_INTC_INT1 0x00000001
#define AVR32_INTC_INT2 0x00000002
#define AVR32_INTC_INT3 0x00000003
#define AVR32_INTC_INTLEVEL 30
#define AVR32_INTC_INTLEVEL_INT0 0x00000000
#define AVR32_INTC_INTLEVEL_INT1 0x00000001
#define AVR32_INTC_INTLEVEL_INT2 0x00000002
#define AVR32_INTC_INTLEVEL_INT3 0x00000003
#define AVR32_INTC_INTLEVEL_MASK 0xc0000000
#define AVR32_INTC_INTLEVEL_OFFSET 30
#define AVR32_INTC_INTLEVEL_SIZE 2
#define AVR32_INTC_IPR 0x00000000
#define AVR32_INTC_IPR_AUTOVECTOR 0
#define AVR32_INTC_IPR_AUTOVECTOR_MASK 0x00003fff
#define AVR32_INTC_IPR_AUTOVECTOR_OFFSET 0
#define AVR32_INTC_IPR_AUTOVECTOR_SIZE 14
#define AVR32_INTC_IPR_INTLEVEL 30
#define AVR32_INTC_IPR_INTLEVEL_INT0 0x00000000
#define AVR32_INTC_IPR_INTLEVEL_INT1 0x00000001
#define AVR32_INTC_IPR_INTLEVEL_INT2 0x00000002
#define AVR32_INTC_IPR_INTLEVEL_INT3 0x00000003
#define AVR32_INTC_IPR_INTLEVEL_MASK 0xc0000000
#define AVR32_INTC_IPR_INTLEVEL_OFFSET 30
#define AVR32_INTC_IPR_INTLEVEL_SIZE 2
#define AVR32_INTC_IRR 0x00000100




#ifdef __AVR32_ABI_COMPILER__


typedef struct avr32_intc_ipr_t {
unsigned int intlevel : 2;
unsigned int :16;
unsigned int autovector :14;
} avr32_intc_ipr_t;



typedef struct avr32_intc_icr_t {
unsigned int :26;
unsigned int cause : 6;
} avr32_intc_icr_t;



typedef struct avr32_intc_t {
union {
unsigned long ipr [AVR32_INTC_NUM_INT_GRPS];//0x0000
avr32_intc_ipr_t IPR [AVR32_INTC_NUM_INT_GRPS];
};
union {
unsigned long ipr_reserved[64 - AVR32_INTC_NUM_INT_GRPS];//Padding
avr32_intc_ipr_t IPR_RESERVED[64 - AVR32_INTC_NUM_INT_GRPS];
};
const unsigned long irr [AVR32_INTC_NUM_INT_GRPS];//0x0100
const unsigned long irr_reserved[64 - AVR32_INTC_NUM_INT_GRPS];//Padding
union {
const unsigned long icr [4];//0x0200
const avr32_intc_icr_t ICR [4];
};
} avr32_intc_t;



/*#ifdef __AVR32_ABI_COMPILER__*/
#endif


#if !defined (DEPRECATED_DISABLE)

#define AVR32_INTC_ICR_CAUSEGRP 0
#define AVR32_INTC_ICR_CAUSEGRP_MASK 0x0000003f
#define AVR32_INTC_ICR_CAUSEGRP_OFFSET 0
#define AVR32_INTC_ICR_CAUSEGRP_SIZE 6

#define AVR32_INTC_INTLEV 30
#define AVR32_INTC_INTLEV_INT0 0x00000000
#define AVR32_INTC_INTLEV_INT1 0x00000001
#define AVR32_INTC_INTLEV_INT2 0x00000002
#define AVR32_INTC_INTLEV_INT3 0x00000003
#define AVR32_INTC_INTLEV_MASK 0xc0000000
#define AVR32_INTC_INTLEV_OFFSET 30
#define AVR32_INTC_INTLEV_SIZE 2

#define AVR32_INTC_IPR_INTLEV 30
#define AVR32_INTC_IPR_INTLEV_INT0 0x00000000
#define AVR32_INTC_IPR_INTLEV_INT1 0x00000001
#define AVR32_INTC_IPR_INTLEV_INT2 0x00000002
#define AVR32_INTC_IPR_INTLEV_INT3 0x00000003
#define AVR32_INTC_IPR_INTLEV_MASK 0xc0000000
#define AVR32_INTC_IPR_INTLEV_OFFSET 30
#define AVR32_INTC_IPR_INTLEV_SIZE 2
#define AVR32_INTC_IPR_OFFSET 0
#define AVR32_INTC_IPR_OFFSET_MASK 0x00003fff
#define AVR32_INTC_IPR_OFFSET_OFFSET 0
#define AVR32_INTC_IPR_OFFSET_SIZE 14

#define AVR32_INTC_OFFSET 0
#define AVR32_INTC_OFFSET_MASK 0x00003fff
#define AVR32_INTC_OFFSET_OFFSET 0
#define AVR32_INTC_OFFSET_SIZE 14

#endif


/*#ifdef AVR32_INTC_101_H_INCLUDED*/
#endif

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/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Standard part header file.
*
* This file includes the appropriate part header file according to the defined
* MCU.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support email: avr32@atmel.com
*
******************************************************************************/

/* Copyright (c) 2007-2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/


#ifndef _IO_H_
#define _IO_H_

#if (defined __GNUC__)
# if (defined __AVR32_AP7000__)
# include <avr32/ap7000.h>
# elif (defined __AVR32_AP7001__)
# include <avr32/ap7001.h>
# elif (defined __AVR32_AP7002__)
# include <avr32/ap7002.h>
# elif (defined __AVR32_AP7200__)
# include <avr32/ap7200.h>
# elif (defined __AVR32_UC3A0128__)
# include <avr32/uc3a0128.h>
# elif (defined __AVR32_UC3A0256__)
# include <avr32/uc3a0256.h>
# elif (defined __AVR32_UC3A0512__)
# include <avr32/uc3a0512.h>
# elif (defined __AVR32_UC3A0512ES__)
# include <avr32/uc3a0512es.h>
# elif (defined __AVR32_UC3A1128__)
# include <avr32/uc3a1128.h>
# elif (defined __AVR32_UC3A1256__)
# include <avr32/uc3a1256.h>
# elif (defined __AVR32_UC3A1512__)
# include <avr32/uc3a1512.h>
# elif (defined __AVR32_UC3A1512ES__)
# include <avr32/uc3a1512es.h>
# elif (defined __AVR32_UC3A364__)
# include <avr32/uc3a364.h>
# elif (defined __AVR32_UC3A364S__)
# include <avr32/uc3a364s.h>
# elif (defined __AVR32_UC3A3128__)
# include <avr32/uc3a3128.h>
# elif (defined __AVR32_UC3A3128S__)
# include <avr32/uc3a3128s.h>
# elif (defined __AVR32_UC3A3256__)
# include <avr32/uc3a3256.h>
# elif (defined __AVR32_UC3A3256S__)
# include <avr32/uc3a3256s.h>
# elif (defined __AVR32_UC3B064__)
# include <avr32/uc3b064.h>
# elif (defined __AVR32_UC3B0128__)
# include <avr32/uc3b0128.h>
# elif (defined __AVR32_UC3B0256__)
# include <avr32/uc3b0256.h>
# elif (defined __AVR32_UC3B0256ES__)
# include <avr32/uc3b0256es.h>
# elif (defined __AVR32_UC3B164__)
# include <avr32/uc3b164.h>
# elif (defined __AVR32_UC3B1128__)
# include <avr32/uc3b1128.h>
# elif (defined __AVR32_UC3B1256__)
# include <avr32/uc3b1256.h>
# elif (defined __AVR32_UC3B1256ES__)
# include <avr32/uc3b1256es.h>
# elif (defined __AVR32_UC3B0512__)
# include <avr32/uc3b0512.h>
# elif (defined __AVR32_UC3B0512REVC__)
# include <avr32/uc3b0512.h>
# elif (defined __AVR32_UC3B1512__)
# include <avr32/uc3b1512.h>
# elif (defined __AVR32_UC3B1512REVC__)
# include <avr32/uc3b1512.h>
# elif (defined __AVR32_UC3C064C__)
# include <avr32/uc3c064c.h>
# elif (defined __AVR32_UC3C0128C__)
# include <avr32/uc3c0128c.h>
# elif (defined __AVR32_UC3C0256C__)
# include <avr32/uc3c0256c.h>
# elif (defined __AVR32_UC3C0512CREVC__)
# include <avr32/uc3c0512crevc.h>
# elif (defined __AVR32_UC3C164C__)
# include <avr32/uc3c164c.h>
# elif (defined __AVR32_UC3C1128C__)
# include <avr32/uc3c1128c.h>
# elif (defined __AVR32_UC3C1256C__)
# include <avr32/uc3c1256c.h>
# elif (defined __AVR32_UC3C1512CREVC__)
# include <avr32/uc3c1512crevc.h>
# elif (defined __AVR32_UC3C264C__)
# include <avr32/uc3c264c.h>
# elif (defined __AVR32_UC3C2128C__)
# include <avr32/uc3c2128c.h>
# elif (defined __AVR32_UC3C2256C__)
# include <avr32/uc3c2256c.h>
# elif (defined __AVR32_UC3C2512CREVC__)
# include <avr32/uc3c2512crevc.h>
# elif (defined __AVR32_UC3L016__)
# include <avr32/uc3l016.h>
# elif (defined __AVR32_UC3L032__)
# include <avr32/uc3l032.h>
# elif (defined __AVR32_UC3L064__)
# include <avr32/uc3l064.h>
# elif (defined __AVR32_UC3L064REVB__)
# include <avr32/uc3l064revb.h>
# elif (defined __AVR32_UC3L116__)
# include <avr32/uc3l116.h>
# elif (defined __AVR32_UC3L132__)
# include <avr32/uc3l132.h>
# elif (defined __AVR32_UC3L164__)
# include <avr32/uc3l164.h>
# elif (defined __AVR32_UC3L216__)
# include <avr32/uc3l216.h>
# elif (defined __AVR32_UC3L232__)
# include <avr32/uc3l232.h>
# elif (defined __AVR32_UC3L264__)
# include <avr32/uc3l264.h>
# elif (defined __AVR32_UC3L316__)
# include <avr32/uc3l316.h>
# elif (defined __AVR32_UC3L332__)
# include <avr32/uc3l332.h>
# elif (defined __AVR32_UC3L364__)
# include <avr32/uc3l364.h>
# else
# error No known AVR32 part defined
# endif /* __AVR32_<PART>__ */
#elif (defined __ICCAVR32__) ||(defined __AAVR32__)
# if (defined __AT32AP7000__)
# include <avr32/ioap7000.h>
# elif (defined __AT32AP7001__)
# include <avr32/ioap7001.h>
# elif (defined __AT32AP7002__)
# include <avr32/ioap7002.h>
# elif (defined __AT32AP7200__)
# include <avr32/ioap7200.h>
# elif (defined __AT32UC3A364__)
# include <avr32/iouc3a364.h>
# elif (defined __AT32UC3A364S__)
# include <avr32/iouc3a364s.h>
# elif (defined __AT32UC3A3128__)
# include <avr32/iouc3a3128.h>
# elif (defined __AT32UC3A3128S__)
# include <avr32/iouc3a3128s.h>
# elif (defined __AT32UC3A3256__)
# include <avr32/iouc3a3256.h>
# elif (defined __AT32UC3A3256S__)
# include <avr32/iouc3a3256s.h>
# elif (defined __AT32UC3A0512ES__)
# include <avr32/iouc3a0512es.h>
# elif (defined __AT32UC3A1512ES__)
# include <avr32/iouc3a1512es.h>
# elif (defined __AT32UC3A0128__)
# include <avr32/iouc3a0128.h>
# elif (defined __AT32UC3A0256__)
# include <avr32/iouc3a0256.h>
# elif (defined __AT32UC3A0512__)
# include <avr32/iouc3a0512.h>
# elif (defined __AT32UC3A1128__)
# include <avr32/iouc3a1128.h>
# elif (defined __AT32UC3A1256__)
# include <avr32/iouc3a1256.h>
# elif (defined __AT32UC3A1512__)
# include <avr32/iouc3a1512.h>
# elif (defined __AT32UC3B0256ES__)
# include <avr32/iouc3b0256es.h>
# elif (defined __AT32UC3B1256ES__)
# include <avr32/iouc3b1256es.h>
# elif (defined __AT32UC3B064__)
# include <avr32/iouc3b064.h>
# elif (defined __AT32UC3B0128__)
# include <avr32/iouc3b0128.h>
# elif (defined __AT32UC3B0256__)
# include <avr32/iouc3b0256.h>
# elif (defined __AT32UC3B164__)
# include <avr32/iouc3b164.h>
# elif (defined __AT32UC3B1128__)
# include <avr32/iouc3b1128.h>
# elif (defined __AT32UC3B1256__)
# include <avr32/iouc3b1256.h>
# elif (defined __AT32UC3B0512__)
# include <avr32/iouc3b0512.h>
# elif (defined __AT32UC3B1512__)
# include <avr32/iouc3b1512.h>
# elif (defined __AT32UC3C064C__)
# include <avr32/iouc3c064c.h>
# elif (defined __AT32UC3C0128C__)
# include <avr32/iouc3c0128c.h>
# elif (defined __AT32UC3C0256C__)
# include <avr32/iouc3c0256c.h>
# elif (defined __AT32UC3C0512C__)
# include <avr32/iouc3c0512c.h>
# elif (defined __AT32UC3C164C__)
# include <avr32/iouc3c164c.h>
# elif (defined __AT32UC3C1128C__)
# include <avr32/iouc3c1128c.h>
# elif (defined __AT32UC3C1256C__)
# include <avr32/iouc3c1256c.h>
# elif (defined __AT32UC3C1512C__)
# include <avr32/iouc3c1512c.h>
# elif (defined __AT32UC3C264C__)
# include <avr32/iouc3c264c.h>
# elif (defined __AT32UC3C2128C__)
# include <avr32/iouc3c2128c.h>
# elif (defined __AT32UC3C2256C__)
# include <avr32/iouc3c2256c.h>
# elif (defined __AT32UC3C2512C__)
# include <avr32/iouc3c2512c.h>
# elif (defined __AT32UC3L016__)
# include <avr32/iouc3l016.h>
# elif (defined __AT32UC3L032__)
# include <avr32/iouc3l032.h>
# elif (defined __AT32UC3L064__)
# include <avr32/iouc3l064.h>
# elif (defined __AT32UC3L116__)
# include <avr32/iouc3l116.h>
# elif (defined __AT32UC3L132__)
# include <avr32/iouc3l132.h>
# elif (defined __AT32UC3L164__)
# include <avr32/iouc3l164.h>
# elif (defined __AT32UC3L216__)
# include <avr32/iouc3l216.h>
# elif (defined __AT32UC3L232__)
# include <avr32/iouc3l232.h>
# elif (defined __AT32UC3L264__)
# include <avr32/iouc3l264.h>
# elif (defined __AT32UC3L316__)
# include <avr32/iouc3l316.h>
# elif (defined __AT32UC3L332__)
# include <avr32/iouc3l332.h>
# elif (defined __AT32UC3L364__)
# include <avr32/iouc3l364.h>
# else
# error No known AVR32 part defined
# endif /* __AT32<PART>__ */
#else
# error Unknown compiler
#endif /* __GNUC__ */

#endif /* _IO_H_ */

@@ -0,0 +1,351 @@
/**************************************************
*
* Declaration of system and I/O registers for AVR32
* IAR C/C++ Compiler and IAR Assembler.
*
* This file describes the properties of the Atmel AP7000
* device. It can be used directly, or as a template for
* creating new I/O register description files.
*
* This file has been automatically generated from the corresponding
* part description file from Atmel:
* File name: AP7000.xml
* File version: 0.01
* File release status: DRAFT
* Last file update: 2007-02-08
*
* Copyright 2007 IAR Systems. All rights reserved.
*
* $Revision: 60652 $
*
**************************************************/

#ifndef __IOAP7000_H
#define __IOAP7000_H

#if (!__AAVR32__ && !__ICCAVR32__)
#error "File ioap7000.h is for use with ICCAVR32/AAVR32 only."
#endif

#include <avr32/abi.h>
#include <avr32/ap7000.h>


/* Core definition */

/* Interrupts */

#define AVR32_CORE_IRQ_GROUP 0

/* ABDAC - Audio Bitstream DAC */

/* Interrupts */

#define AVR32_ABDAC_IRQ_GROUP 27

/* AC97C - AC97 Controller */

/* Interrupts */

#define AVR32_AC97C_IRQ_GROUP 29

/* DMACA - DMA Controller */

/* Interrupts */

#define AVR32_DMACA_IRQ_GROUP 2

/* ECC - Error Corrected Code Controller */

/* EIC - External Interrupt Controller */

/* Interrupts */

#define AVR32_EIC_IRQ_GROUP0 0
#define AVR32_EIC_IRQ_GROUP1 19

/* HMATRIX - HSB Matrix */

/* ISI - Image Sensor Interface */

/* Interrupts */

#define AVR32_ISI_IRQ_GROUP 30

/* LCDC - LCD Controller */

/* Interrupts */

#define AVR32_LCDC_IRQ_GROUP 1

/* MACB - Ethernet MAC */

/* MACB - Ethernet MAC */

/* Interrupts */

#define AVR32_MACB0_IRQ_GROUP 25

/* Interrupts */

#define AVR32_MACB1_IRQ_GROUP 26

/* MCI - MulitMedia Card Interface */

/* Interrupts */

#define AVR32_MCI_IRQ_GROUP 28

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* Interrupts */

#define AVR32_PIOA_IRQ_GROUP 13

/* Interrupts */

#define AVR32_PIOB_IRQ_GROUP 14

/* Interrupts */

#define AVR32_PIOC_IRQ_GROUP 15

/* Interrupts */

#define AVR32_PIOD_IRQ_GROUP 16

/* Interrupts */

#define AVR32_PIOE_IRQ_GROUP 17

/* PM - Power Manager */

/* Interrupts */

#define AVR32_PM_IRQ_GROUP 20

/* PSIF - PS/2 Interface */

/* Interrupts */

#define AVR32_PSIF_IRQ_GROUP 18

/* PWM - Pulse Width Modulation Controller */

/* Interrupts */

#define AVR32_PWM_IRQ_GROUP 24

/* RTC - Real Time Clock */

/* Interrupts */

#define AVR32_RTC_IRQ_GROUP 21

/* SDRAMC - SDRAM Controller */

/* Interrupts */

#define AVR32_SDRAMC_IRQ_GROUP 32

/* SMC - Static Memory Controller */

/* SPI - Serial Peripheral Interface */

/* SPI - Serial Peripheral Interface */

/* Interrupts */

#define AVR32_SPI0_IRQ_GROUP 3

/* Interrupts */

#define AVR32_SPI1_IRQ_GROUP 4

/* SSC - Synchronous Serial Controller */

/* SSC - Synchronous Serial Controller */

/* SSC - Synchronous Serial Controller */

/* Interrupts */

#define AVR32_SSC0_IRQ_GROUP 10

/* Interrupts */

#define AVR32_SSC1_IRQ_GROUP 11

/* Interrupts */

#define AVR32_SSC2_IRQ_GROUP 12

/* TC - Timer/Counter */

/* TC - Timer/Counter */

/* Interrupts */

#define AVR32_TC0_IRQ_GROUP 22

/* Interrupts */

#define AVR32_TC1_IRQ_GROUP 23

/* TWI - Two-wire Interface */

/* Interrupts */

#define AVR32_TWI_IRQ_GROUP 5

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* Interrupts */

#define AVR32_USART0_IRQ_GROUP 6

/* Interrupts */

#define AVR32_USART1_IRQ_GROUP 7

/* Interrupts */

#define AVR32_USART2_IRQ_GROUP 8

/* Interrupts */

#define AVR32_USART3_IRQ_GROUP 9

/* USBA - USB Interface */

/* Interrupts */

#define AVR32_USBA_IRQ_GROUP 31

/* WDT - Watchdog Timer */

#ifdef __IAR_SYSTEMS_ICC__
#pragma language=extended

/**************************************************
* System registers
**************************************************/
typedef struct avr32_core_t
{
/* 0x000 */
union {
unsigned long sr;
avr32_sr_t SR;
};
unsigned long evba;
unsigned long acba;
union {
unsigned long cpucr;
avr32_cpucr_t CPUCR;
};
unsigned long const ecr;
unsigned long rsr_sup;
unsigned long rsr_int0;
unsigned long rsr_int1;
unsigned long rsr_int2;
unsigned long rsr_int3;
unsigned long rsr_ex;
unsigned long rsr_nmi;
unsigned long rsr_dbg;
unsigned long rar_sup;
unsigned long rar_int0;
unsigned long rar_int1;
unsigned long rar_int2;
unsigned long rar_int3;
unsigned long rar_ex;
unsigned long rar_nmi;
unsigned long rar_dbg;
unsigned long const jecr;
unsigned long josp;
unsigned long java_lv0;
unsigned long java_lv1;
unsigned long java_lv2;
unsigned long java_lv3;
unsigned long java_lv4;
unsigned long java_lv5;
unsigned long java_lv6;
unsigned long java_lv7;
unsigned long jtba;
unsigned long jbcr;

unsigned long _pad1[31];

/* 0x100 */
union {
unsigned long const config0;
avr32_config0_t const CONFIG0;
};
union {
unsigned long const config1;
avr32_config1_t const CONFIG1;
};
unsigned long count;
unsigned long compare;
union {
unsigned long tlbehi;
avr32_tlbehi_t TLBEHI;
};
union {
unsigned long tlbelo;
avr32_tlbelo_t TLBELO;
};
unsigned long ptbr;
unsigned long const tlbear;
union {
unsigned long mmucr;
avr32_mmucr_t MMUCR;
};
unsigned long tlbarlo;
unsigned long tlbarhi;
unsigned long pccnt;
unsigned long pcnt0;
unsigned long pcnt1;
union {
unsigned long pccr;
avr32_pccr_t PCCR;
};
unsigned long const bear;

unsigned long _pad2[112];

/* 0x300 */
unsigned long sabal;
unsigned long sabah;
unsigned long sabd;
} avr32_core_t;

/* instance */
extern volatile __no_init __sysreg avr32_core_t avr32_core @ 0x000;

/**************************************************
* Non-volatile registers
**************************************************/

#pragma language=default
#endif /* __IAR_SYSTEMS_ICC__ */
#ifdef __IAR_SYSTEMS_ASM__


#endif /* __IAR_SYSTEMS_ASM__*/

#endif

@@ -0,0 +1,333 @@
/**************************************************
*
* Declaration of system and I/O registers for AVR32
* IAR C/C++ Compiler and IAR Assembler.
*
* This file describes the properties of the Atmel AP7001
* device. It can be used directly, or as a template for
* creating new I/O register description files.
*
* This file has been automatically generated from the corresponding
* part description file from Atmel:
* File name: AP7001.xml
* File version: 0.01
* File release status: DRAFT
* Last file update: 2007-02-08
*
* Copyright 2007 IAR Systems. All rights reserved.
*
* $Revision: 60652 $
*
**************************************************/

#ifndef __IOAP7001_H
#define __IOAP7001_H

#if (!__AAVR32__ && !__ICCAVR32__)
#error "File ioap7001.h is for use with ICCAVR32/AAVR32 only."
#endif

#include <avr32/abi.h>
#include <avr32/ap7001.h>


/* Core definition */

/* Interrupts */

#define AVR32_CORE_IRQ_GROUP 0

/* ABDAC - Audio Bitstream DAC */

/* Interrupts */

#define AVR32_ABDAC_IRQ_GROUP 27

/* AC97C - AC97 Controller */

/* Interrupts */

#define AVR32_AC97C_IRQ_GROUP 29

/* DMACA - DMA Controller */

/* Interrupts */

#define AVR32_DMACA_IRQ_GROUP 2

/* ECC - Error Corrected Code Controller */

/* EIC - External Interrupt Controller */

/* Interrupts */

#define AVR32_EIC_IRQ_GROUP0 0
#define AVR32_EIC_IRQ_GROUP1 19

/* HMATRIX - HSB Matrix */

/* ISI - Image Sensor Interface */

/* Interrupts */

#define AVR32_ISI_IRQ_GROUP 30

/* MCI - MulitMedia Card Interface */

/* Interrupts */

#define AVR32_MCI_IRQ_GROUP 28

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* Interrupts */

#define AVR32_PIOA_IRQ_GROUP 13

/* Interrupts */

#define AVR32_PIOB_IRQ_GROUP 14

/* Interrupts */

#define AVR32_PIOC_IRQ_GROUP 15

/* Interrupts */

#define AVR32_PIOD_IRQ_GROUP 16

/* Interrupts */

#define AVR32_PIOE_IRQ_GROUP 17

/* PM - Power Manager */

/* Interrupts */

#define AVR32_PM_IRQ_GROUP 20

/* PSIF - PS/2 Interface */

/* Interrupts */

#define AVR32_PSIF_IRQ_GROUP 18

/* PWM - Pulse Width Modulation Controller */

/* Interrupts */

#define AVR32_PWM_IRQ_GROUP 24

/* RTC - Real Time Clock */

/* Interrupts */

#define AVR32_RTC_IRQ_GROUP 21

/* SDRAMC - SDRAM Controller */

/* Interrupts */

#define AVR32_SDRAMC_IRQ_GROUP 32

/* SMC - Static Memory Controller */

/* SPI - Serial Peripheral Interface */

/* SPI - Serial Peripheral Interface */

/* Interrupts */

#define AVR32_SPI0_IRQ_GROUP 3

/* Interrupts */

#define AVR32_SPI1_IRQ_GROUP 4

/* SSC - Synchronous Serial Controller */

/* SSC - Synchronous Serial Controller */

/* SSC - Synchronous Serial Controller */

/* Interrupts */

#define AVR32_SSC0_IRQ_GROUP 10

/* Interrupts */

#define AVR32_SSC1_IRQ_GROUP 11

/* Interrupts */

#define AVR32_SSC2_IRQ_GROUP 12

/* TC - Timer/Counter */

/* TC - Timer/Counter */

/* Interrupts */

#define AVR32_TC0_IRQ_GROUP 22

/* Interrupts */

#define AVR32_TC1_IRQ_GROUP 23

/* TWI - Two-wire Interface */

/* Interrupts */

#define AVR32_TWI_IRQ_GROUP 5

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* Interrupts */

#define AVR32_USART0_IRQ_GROUP 6

/* Interrupts */

#define AVR32_USART1_IRQ_GROUP 7

/* Interrupts */

#define AVR32_USART2_IRQ_GROUP 8

/* Interrupts */

#define AVR32_USART3_IRQ_GROUP 9

/* USBA - USB Interface */

/* Interrupts */

#define AVR32_USBA_IRQ_GROUP 31

/* WDT - Watchdog Timer */

#ifdef __IAR_SYSTEMS_ICC__
#pragma language=extended

/**************************************************
* System registers
**************************************************/
typedef struct avr32_core_t
{
/* 0x000 */
union {
unsigned long sr;
avr32_sr_t SR;
};
unsigned long evba;
unsigned long acba;
union {
unsigned long cpucr;
avr32_cpucr_t CPUCR;
};
unsigned long const ecr;
unsigned long rsr_sup;
unsigned long rsr_int0;
unsigned long rsr_int1;
unsigned long rsr_int2;
unsigned long rsr_int3;
unsigned long rsr_ex;
unsigned long rsr_nmi;
unsigned long rsr_dbg;
unsigned long rar_sup;
unsigned long rar_int0;
unsigned long rar_int1;
unsigned long rar_int2;
unsigned long rar_int3;
unsigned long rar_ex;
unsigned long rar_nmi;
unsigned long rar_dbg;
unsigned long const jecr;
unsigned long josp;
unsigned long java_lv0;
unsigned long java_lv1;
unsigned long java_lv2;
unsigned long java_lv3;
unsigned long java_lv4;
unsigned long java_lv5;
unsigned long java_lv6;
unsigned long java_lv7;
unsigned long jtba;
unsigned long jbcr;

unsigned long _pad1[31];

/* 0x100 */
union {
unsigned long const config0;
avr32_config0_t const CONFIG0;
};
union {
unsigned long const config1;
avr32_config1_t const CONFIG1;
};
unsigned long count;
unsigned long compare;
union {
unsigned long tlbehi;
avr32_tlbehi_t TLBEHI;
};
union {
unsigned long tlbelo;
avr32_tlbelo_t TLBELO;
};
unsigned long ptbr;
unsigned long const tlbear;
union {
unsigned long mmucr;
avr32_mmucr_t MMUCR;
};
unsigned long tlbarlo;
unsigned long tlbarhi;
unsigned long pccnt;
unsigned long pcnt0;
unsigned long pcnt1;
union {
unsigned long pccr;
avr32_pccr_t PCCR;
};
unsigned long const bear;

unsigned long _pad2[112];

/* 0x300 */
unsigned long sabal;
unsigned long sabah;
unsigned long sabd;
} avr32_core_t;

/* instance */
extern volatile __no_init __sysreg avr32_core_t avr32_core @ 0x000;

/**************************************************
* Non-volatile registers
**************************************************/

#pragma language=default
#endif /* __IAR_SYSTEMS_ICC__ */
#ifdef __IAR_SYSTEMS_ASM__


#endif /* __IAR_SYSTEMS_ASM__*/

#endif

@@ -0,0 +1,339 @@
/**************************************************
*
* Declaration of system and I/O registers for AVR32
* IAR C/C++ Compiler and IAR Assembler.
*
* This file describes the properties of the Atmel AP7002
* device. It can be used directly, or as a template for
* creating new I/O register description files.
*
* This file has been automatically generated from the corresponding
* part description file from Atmel:
* File name: AP7002.xml
* File version: 0.01
* File release status: DRAFT
* Last file update: 2007-02-08
*
* Copyright 2007 IAR Systems. All rights reserved.
*
* $Revision: 60652 $
*
**************************************************/

#ifndef __IOAP7002_H
#define __IOAP7002_H

#if (!__AAVR32__ && !__ICCAVR32__)
#error "File ioap7002.h is for use with ICCAVR32/AAVR32 only."
#endif

#include <avr32/abi.h>
#include <avr32/ap7002.h>


/* Core definition */

/* Interrupts */

#define AVR32_CORE_IRQ_GROUP 0

/* ABDAC - Audio Bitstream DAC */

/* Interrupts */

#define AVR32_ABDAC_IRQ_GROUP 27

/* AC97C - AC97 Controller */

/* Interrupts */

#define AVR32_AC97C_IRQ_GROUP 29

/* DMACA - DMA Controller */

/* Interrupts */

#define AVR32_DMACA_IRQ_GROUP 2

/* ECC - Error Corrected Code Controller */

/* EIC - External Interrupt Controller */

/* Interrupts */

#define AVR32_EIC_IRQ_GROUP0 0
#define AVR32_EIC_IRQ_GROUP1 19

/* HMATRIX - HSB Matrix */

/* ISI - Image Sensor Interface */

/* Interrupts */

#define AVR32_ISI_IRQ_GROUP 30

/* LCDC - LCD Controller */

/* Interrupts */

#define AVR32_LCDC_IRQ_GROUP 1

/* MCI - MulitMedia Card Interface */

/* Interrupts */

#define AVR32_MCI_IRQ_GROUP 28

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* PIO - Parallel Input/Output Controller */

/* Interrupts */

#define AVR32_PIOA_IRQ_GROUP 13

/* Interrupts */

#define AVR32_PIOB_IRQ_GROUP 14

/* Interrupts */

#define AVR32_PIOC_IRQ_GROUP 15

/* Interrupts */

#define AVR32_PIOD_IRQ_GROUP 16

/* Interrupts */

#define AVR32_PIOE_IRQ_GROUP 17

/* PM - Power Manager */

/* Interrupts */

#define AVR32_PM_IRQ_GROUP 20

/* PSIF - PS/2 Interface */

/* Interrupts */

#define AVR32_PSIF_IRQ_GROUP 18

/* PWM - Pulse Width Modulation Controller */

/* Interrupts */

#define AVR32_PWM_IRQ_GROUP 24

/* RTC - Real Time Clock */

/* Interrupts */

#define AVR32_RTC_IRQ_GROUP 21

/* SDRAMC - SDRAM Controller */

/* Interrupts */

#define AVR32_SDRAMC_IRQ_GROUP 32

/* SMC - Static Memory Controller */

/* SPI - Serial Peripheral Interface */

/* SPI - Serial Peripheral Interface */

/* Interrupts */

#define AVR32_SPI0_IRQ_GROUP 3

/* Interrupts */

#define AVR32_SPI1_IRQ_GROUP 4

/* SSC - Synchronous Serial Controller */

/* SSC - Synchronous Serial Controller */

/* SSC - Synchronous Serial Controller */

/* Interrupts */

#define AVR32_SSC0_IRQ_GROUP 10

/* Interrupts */

#define AVR32_SSC1_IRQ_GROUP 11

/* Interrupts */

#define AVR32_SSC2_IRQ_GROUP 12

/* TC - Timer/Counter */

/* TC - Timer/Counter */

/* Interrupts */

#define AVR32_TC0_IRQ_GROUP 22

/* Interrupts */

#define AVR32_TC1_IRQ_GROUP 23

/* TWI - Two-wire Interface */

/* Interrupts */

#define AVR32_TWI_IRQ_GROUP 5

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* USART - Universal Synchronous/Asynchronous Receiver/Transmitter */

/* Interrupts */

#define AVR32_USART0_IRQ_GROUP 6

/* Interrupts */

#define AVR32_USART1_IRQ_GROUP 7

/* Interrupts */

#define AVR32_USART2_IRQ_GROUP 8

/* Interrupts */

#define AVR32_USART3_IRQ_GROUP 9

/* USBA - USB Interface */

/* Interrupts */

#define AVR32_USBA_IRQ_GROUP 31

/* WDT - Watchdog Timer */

#ifdef __IAR_SYSTEMS_ICC__
#pragma language=extended

/**************************************************
* System registers
**************************************************/
typedef struct avr32_core_t
{
/* 0x000 */
union {
unsigned long sr;
avr32_sr_t SR;
};
unsigned long evba;
unsigned long acba;
union {
unsigned long cpucr;
avr32_cpucr_t CPUCR;
};
unsigned long const ecr;
unsigned long rsr_sup;
unsigned long rsr_int0;
unsigned long rsr_int1;
unsigned long rsr_int2;
unsigned long rsr_int3;
unsigned long rsr_ex;
unsigned long rsr_nmi;
unsigned long rsr_dbg;
unsigned long rar_sup;
unsigned long rar_int0;
unsigned long rar_int1;
unsigned long rar_int2;
unsigned long rar_int3;
unsigned long rar_ex;
unsigned long rar_nmi;
unsigned long rar_dbg;
unsigned long const jecr;
unsigned long josp;
unsigned long java_lv0;
unsigned long java_lv1;
unsigned long java_lv2;
unsigned long java_lv3;
unsigned long java_lv4;
unsigned long java_lv5;
unsigned long java_lv6;
unsigned long java_lv7;
unsigned long jtba;
unsigned long jbcr;

unsigned long _pad1[31];

/* 0x100 */
union {
unsigned long const config0;
avr32_config0_t const CONFIG0;
};
union {
unsigned long const config1;
avr32_config1_t const CONFIG1;
};
unsigned long count;
unsigned long compare;
union {
unsigned long tlbehi;
avr32_tlbehi_t TLBEHI;
};
union {
unsigned long tlbelo;
avr32_tlbelo_t TLBELO;
};
unsigned long ptbr;
unsigned long const tlbear;
union {
unsigned long mmucr;
avr32_mmucr_t MMUCR;
};
unsigned long tlbarlo;
unsigned long tlbarhi;
unsigned long pccnt;
unsigned long pcnt0;
unsigned long pcnt1;
union {
unsigned long pccr;
avr32_pccr_t PCCR;
};
unsigned long const bear;

unsigned long _pad2[112];

/* 0x300 */
unsigned long sabal;
unsigned long sabah;
unsigned long sabd;
} avr32_core_t;

/* instance */
extern volatile __no_init __sysreg avr32_core_t avr32_core @ 0x000;

/**************************************************
* Non-volatile registers
**************************************************/

#pragma language=default
#endif /* __IAR_SYSTEMS_ICC__ */
#ifdef __IAR_SYSTEMS_ASM__


#endif /* __IAR_SYSTEMS_ASM__*/

#endif