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Fix (#708)

* - WIP

* - WIP

* - WIP

* - Removed the CIL Static Allocation Resolution Stage

* - Restored the CIL Static Allocation Resolution Stage

* - WIP

* - WIP

* - WIP
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tgiphil committed Sep 29, 2019
1 parent 3d3601a commit 4beaf81454fa1a5d1677aa6e5d4cf5defccfe2b8
Showing with 837 additions and 219 deletions.
  1. +1 −1 Demos/Run-CoolWorld.x86.bat
  2. +1 −1 Source/Data/IR-Optimizations-ConstantFolding.json
  3. +90 −0 Source/Data/IR-Optimizations-Rewrite.json
  4. +0 −5 Source/Mosa.Compiler.Framework/CompilerOptions.cs
  5. +37 −8 Source/Mosa.Compiler.Framework/Stages/LongExpansionStage.cs
  6. +9 −9 Source/Mosa.Compiler.Framework/Stages/ValueNumberingStage.cs
  7. +10 −0 Source/Mosa.Compiler.Framework/Transform/Auto/AutoInstance.cs
  8. +10 −0 Source/Mosa.Compiler.Framework/Transform/Auto/AutoTransforms.cs
  9. +1 −1 Source/Mosa.Compiler.Framework/Transform/Auto/IR/ConstantFolding/GetHigh64.cs
  10. +54 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/And32Not32Not32.cs
  11. +54 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/And64Not64Not64.cs
  12. +54 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/Or32Not32Not32.cs
  13. +54 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/Or64Not64Not64.cs
  14. +60 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/Truncate64x32Add64FromZeroExtended32x64.cs
  15. +60 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/Truncate64x32And64FromZeroExtended32x64.cs
  16. +60 −0 ...a.Compiler.Framework/Transform/Auto/IR/Rewrite/Truncate64x32MulUnsigned64FromZeroExtended32x64.cs
  17. +60 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/Truncate64x32Or64FromZeroExtended32x64.cs
  18. +60 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/Truncate64x32Sub64FromZeroExtended32x64.cs
  19. +60 −0 Source/Mosa.Compiler.Framework/Transform/Auto/IR/Rewrite/Truncate64x32Xor64FromZeroExtended32x64.cs
  20. +78 −53 Source/Mosa.Compiler.Framework/Transform/BaseTransformation.cs
  21. +0 −29 Source/Mosa.Compiler.Framework/Transform/Manual/IR/Special/Phi32Invalid.cs
  22. +0 −29 Source/Mosa.Compiler.Framework/Transform/Manual/IR/Special/Phi64Invalid.cs
  23. +0 −29 Source/Mosa.Compiler.Framework/Transform/Manual/IR/Special/PhiR4Invalid.cs
  24. +0 −29 Source/Mosa.Compiler.Framework/Transform/Manual/IR/Special/PhiR8Invalid.cs
  25. +0 −5 Source/Mosa.Compiler.Framework/Transform/Manual/ManualInstance.cs
  26. +2 −7 Source/Mosa.Compiler.Framework/Transform/Manual/ManualTransforms.cs
  27. +1 −2 Source/Mosa.DeviceSystem/DeviceService.cs
  28. +17 −1 Source/Mosa.DeviceSystem/ServiceManager.cs
  29. +0 −2 Source/Mosa.Runtime.x86/Internal.cs
  30. +0 −6 Source/Mosa.Tool.Compiler/Options.cs
  31. +1 −1 Source/Mosa.UnitTests/LargeSwitchTest.cs
  32. +1 −1 Source/Mosa.Utility.Launcher/AppLocations.cs
  33. +2 −0 Source/Mosa.Utility.Launcher/LauncherOptions.cs
@@ -1,3 +1,3 @@
cd %~dp0
cd ..\bin
start Mosa.Tool.Launcher.exe --q --autostart --output-map --output-asm --output-debuginfo --inline-off Mosa.CoolWorld.x86.exe
start Mosa.Tool.Launcher.exe --q --autostart --output-map --output-asm --output-debug --inline-off Mosa.CoolWorld.x86.exe
@@ -151,7 +151,7 @@
"SubName": "",
"Expression": "IR.GetHigh64 a",
"Filter": "IsResolvedConstant(a)",
"Result": "(IR.Move32 [To32(ShiftRight64(To64(a),32u))])"
"Result": "(IR.Move32 [GetHigh64(To64(a))])"
},
{
"FamilyName": "IR",
@@ -883,6 +883,96 @@
"Expression": "(IR.LoadZeroExtend32x64 (IR.AddressOf parameter) offset)",
"Filter": "IsParameter(parameter)",
"Result": "(IR.LoadParamZeroExtend32x64 parameter)"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "Truncate64x32Add64",
"SubName": "FromZeroExtended32x64",
"Expression": "(IR.Truncate64x32 (IR.Add64 (IR.ZeroExtend32x64 a) (IR.ZeroExtend32x64 b)))",
"Filter": "",
"Result": "(IR.Add32 a b)"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "Truncate64x32Sub64",
"SubName": "FromZeroExtended32x64",
"Expression": "(IR.Truncate64x32 (IR.Sub64 (IR.ZeroExtend32x64 a) (IR.ZeroExtend32x64 b)))",
"Filter": "",
"Result": "(IR.Sub32 a b)"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "Truncate64x32MulUnsigned64",
"SubName": "FromZeroExtended32x64",
"Expression": "(IR.Truncate64x32 (IR.MulUnsigned64 (IR.ZeroExtend32x64 a) (IR.ZeroExtend32x64 b)))",
"Filter": "",
"Result": "(IR.MulUnsigned32 a b)"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "Truncate64x32And64",
"SubName": "FromZeroExtended32x64",
"Expression": "(IR.Truncate64x32 (IR.And64 (IR.ZeroExtend32x64 a) (IR.ZeroExtend32x64 b)))",
"Filter": "",
"Result": "(IR.And32 a b)"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "Truncate64x32Or64",
"SubName": "FromZeroExtended32x64",
"Expression": "(IR.Truncate64x32 (IR.Or64 (IR.ZeroExtend32x64 a) (IR.ZeroExtend32x64 b)))",
"Filter": "",
"Result": "(IR.Or32 a b)"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "Truncate64x32Xor64",
"SubName": "FromZeroExtended32x64",
"Expression": "(IR.Truncate64x32 (IR.Xor64 (IR.ZeroExtend32x64 a) (IR.ZeroExtend32x64 b)))",
"Filter": "",
"Result": "(IR.Xor32 a b)"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "And32",
"SubName": "Not32Not32",
"Expression": "(IR.And32 (IR.Not32 a) (IR.Not32 b))",
"Filter": "",
"Result": "(IR.Not32 (IR.Or32 a b))"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "And64",
"SubName": "Not64Not64",
"Expression": "(IR.And64 (IR.Not64 a) (IR.Not64 b))",
"Filter": "",
"Result": "(IR.Not64 (IR.Or64 a b))"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "Or32",
"SubName": "Not32Not32",
"Expression": "(IR.Or32 (IR.Not32 a) (IR.Not32 b))",
"Filter": "",
"Result": "(IR.Not32 (IR.And32 a b))"
},
{
"FamilyName": "IR",
"Type": "Rewrite",
"Name": "Or64",
"SubName": "Not64Not64",
"Expression": "(IR.Or64 (IR.Not64 a) (IR.Not64 b))",
"Filter": "",
"Result": "(IR.Not64 (IR.And32 a b))"
}
]
}
@@ -92,11 +92,6 @@ public class CompilerOptions
/// </summary>
public int InlinedIRMaximum { get; set; }

/// <summary>
/// Gets or sets a value indicating whether static allocations are enabled.
/// </summary>
public bool EnableStaticAllocations { get; set; }

/// <summary>
/// Gets or sets a value indicating whether [enable IR long operand conversion].
/// </summary>
@@ -20,8 +20,8 @@ protected override void PopulateVisitationDictionary()
AddVisitation(IRInstruction.Add64, Add64);
AddVisitation(IRInstruction.Compare64x32, Compare64x32);
AddVisitation(IRInstruction.CompareBranch64, CompareBranch64);
AddVisitation(IRInstruction.Load64, LoadInt64); /// exposes bug without this
AddVisitation(IRInstruction.LoadParam64, LoadParamInt64);
AddVisitation(IRInstruction.Load64, Load64); // exposes bug without this
AddVisitation(IRInstruction.LoadParam64, LoadParam64);
AddVisitation(IRInstruction.LoadParamSignExtend16x64, LoadParamSignExtend16x64);
AddVisitation(IRInstruction.LoadParamSignExtend32x64, LoadParamSignExtend32x64);
AddVisitation(IRInstruction.LoadParamSignExtend8x64, LoadParamSignExtend8x64);
@@ -35,8 +35,8 @@ protected override void PopulateVisitationDictionary()
AddVisitation(IRInstruction.SignExtend16x64, SignExtend16x64);
AddVisitation(IRInstruction.SignExtend32x64, SignExtend32x64);
AddVisitation(IRInstruction.SignExtend8x64, SignExtend8x64);
AddVisitation(IRInstruction.Store64, StoreInt64);
AddVisitation(IRInstruction.StoreParam64, StoreParamInt64);
AddVisitation(IRInstruction.Store64, Store64);
AddVisitation(IRInstruction.StoreParam64, StoreParam64);
AddVisitation(IRInstruction.Sub64, Sub64);
AddVisitation(IRInstruction.Truncate64x32, Truncate64x32);
AddVisitation(IRInstruction.ZeroExtend8x64, ZeroExtend8x64);
@@ -113,7 +113,7 @@ private void AppendGetHigh64(Context context, Operand operand1, Operand operand2

#region Visitation Methods

private void StoreParamInt64(Context context)
private void StoreParam64(Context context)
{
var operand1 = context.Operand1;
var operand2 = context.Operand2;
@@ -157,6 +157,35 @@ private void Add64(Context context)
context.AppendInstruction(IRInstruction.To64, result, resultLow, resultHigh);
}

private void Add64v2(Context context)
{
Debug.Assert(context.Result.Is64BitInteger);

var result = context.Result;
var operand1 = context.Operand1;
var operand2 = context.Operand2;

var resultLow = AllocateVirtualRegister(TypeSystem.BuiltIn.I4);
var resultHigh = AllocateVirtualRegister(TypeSystem.BuiltIn.I4);
var resultCarry = AllocateVirtualRegister(TypeSystem.BuiltIn.Boolean);

var v1 = AllocateVirtualRegister(TypeSystem.BuiltIn.I4);
var v2 = AllocateVirtualRegister(TypeSystem.BuiltIn.I4);
var v3 = AllocateVirtualRegister(TypeSystem.BuiltIn.I4);
var v4 = AllocateVirtualRegister(TypeSystem.BuiltIn.I4);

MethodCompiler.SplitLongOperand(operand1, out Operand op1Low, out Operand op1High);
MethodCompiler.SplitLongOperand(operand2, out Operand op2Low, out Operand op2High);

context.SetInstruction(IRInstruction.GetLow64, v1, op1Low);
context.AppendInstruction(IRInstruction.GetLow64, v2, op2Low);
context.AppendInstruction2(IRInstruction.AddCarryOut32, resultLow, resultCarry, v1, v2);
context.AppendInstruction(IRInstruction.GetHigh64, v3, op1High);
context.AppendInstruction(IRInstruction.GetHigh64, v4, op2High);
context.AppendInstruction(IRInstruction.AddCarryIn32, resultHigh, v3, v4, resultCarry);
context.AppendInstruction(IRInstruction.To64, result, resultLow, resultHigh);
}

private void CompareBranch64(Context context)
{
//Debug.Assert(context.Operand1.Is64BitInteger);
@@ -379,7 +408,7 @@ private void Compareeger64x32NonSSA(Context context)
newBlocks[4].AppendInstruction(IRInstruction.Jmp, nextBlock.Block);
}

private void LoadInt64(Context context)
private void Load64(Context context)
{
Debug.Assert(context.Result.Is64BitInteger);

@@ -401,7 +430,7 @@ private void LoadInt64(Context context)
context.AppendInstruction(IRInstruction.To64, result, resultLow, resultHigh);
}

private void LoadParamInt64(Context context)
private void LoadParam64(Context context)
{
Debug.Assert(!context.Result.IsR4);
Debug.Assert(!context.Result.IsR8);
@@ -662,7 +691,7 @@ private void SignExtend8x64(Context context)
context.AppendInstruction(IRInstruction.To64, result, resultLow, resultHigh);
}

private void StoreInt64(Context context)
private void Store64(Context context)
{
var address = context.Operand1;
var offset = context.Operand2;
@@ -209,10 +209,10 @@ private void ValueNumber(BasicBlock block, out List<BasicBlock> nextblocks, out

for (var node = block.AfterFirst; !node.IsBlockEndInstruction; node = node.Next)
{
if (node.IsEmpty)
if (node.IsEmptyOrNop)
continue;

if (node.Instruction == IRInstruction.Phi32 || node.Instruction == IRInstruction.Phi64 || node.Instruction == IRInstruction.PhiR4 || node.Instruction == IRInstruction.PhiR8)
if (IsPhiInstruction(node.Instruction))
{
// Validate all successor are already processed
// and if not, just set the value number
@@ -558,7 +558,7 @@ private void SetValueNumber(Operand operand, Operand valueVumber)

private bool IsPhiUseless(InstructionNode node)
{
Debug.Assert(node.Instruction == IRInstruction.Phi32 || node.Instruction == IRInstruction.Phi64 || node.Instruction == IRInstruction.PhiR4 || node.Instruction == IRInstruction.PhiR8);
Debug.Assert(IsPhiInstruction(node.Instruction));

var operand = node.Operand1;
var operandVN = GetValueNumber(operand);
@@ -574,8 +574,8 @@ private bool IsPhiUseless(InstructionNode node)

private bool ArePhisRedundant(InstructionNode a, InstructionNode b)
{
Debug.Assert(a.Instruction == IRInstruction.Phi32 || a.Instruction == IRInstruction.Phi64 || a.Instruction == IRInstruction.PhiR4 || a.Instruction == IRInstruction.PhiR8);
Debug.Assert(b.Instruction == IRInstruction.Phi32 || b.Instruction == IRInstruction.Phi64 || b.Instruction == IRInstruction.PhiR4 || b.Instruction == IRInstruction.PhiR8);
Debug.Assert(IsPhiInstruction(a.Instruction));
Debug.Assert(IsPhiInstruction(b.Instruction));

if (a.OperandCount != b.OperandCount)
return false;
@@ -638,10 +638,10 @@ private void UpdateNodeWithValueNumbers(InstructionNode node)
}
else
{
if (node.Instruction == IRInstruction.Phi32 || node.Instruction == IRInstruction.Phi64 || node.Instruction == IRInstruction.PhiR4 || node.Instruction == IRInstruction.PhiR8)
if (IsPhiInstruction(node.Instruction))
continue;

Debug.Assert(node.Instruction == IRInstruction.Phi32 || node.Instruction == IRInstruction.Phi64 || node.Instruction == IRInstruction.PhiR4 || node.Instruction == IRInstruction.PhiR8);
Debug.Assert(IsPhiInstruction(node.Instruction));

//throw new CompilerException("ValueNumbering Stage: Expected PHI instruction but found instead: " + node + " for " + operand);
}
@@ -660,7 +660,7 @@ private void UpdatePhiSuccesors(BasicBlock block)
if (node.IsEmptyOrNop)
continue;

if (node.Instruction != IRInstruction.Phi32 && node.Instruction != IRInstruction.Phi64 && node.Instruction != IRInstruction.PhiR4 && node.Instruction != IRInstruction.PhiR8)
if (!IsPhiInstruction(node.Instruction))
break;

// update operands with their value number
@@ -678,7 +678,7 @@ private Operand CheckRedundant(InstructionNode node)
if (previousPhi.IsEmptyOrNop)
continue;

Debug.Assert(previousPhi.Instruction == IRInstruction.Phi32 || previousPhi.Instruction == IRInstruction.Phi64 || previousPhi.Instruction == IRInstruction.PhiR4 || previousPhi.Instruction == IRInstruction.PhiR8);
Debug.Assert(IsPhiInstruction(previousPhi.Instruction));

if (ArePhisRedundant(node, previousPhi))
{
@@ -249,6 +249,16 @@ public static class AutoInstance
public static readonly BaseTransformation IR_Rewrite_LoadZeroExtend8x64AddressFold = new IR.Rewrite.LoadZeroExtend8x64AddressFold();
public static readonly BaseTransformation IR_Rewrite_LoadZeroExtend16x64AddressFold = new IR.Rewrite.LoadZeroExtend16x64AddressFold();
public static readonly BaseTransformation IR_Rewrite_LoadZeroExtend32x64AddressFold = new IR.Rewrite.LoadZeroExtend32x64AddressFold();
public static readonly BaseTransformation IR_Rewrite_Truncate64x32Add64FromZeroExtended32x64 = new IR.Rewrite.Truncate64x32Add64FromZeroExtended32x64();
public static readonly BaseTransformation IR_Rewrite_Truncate64x32Sub64FromZeroExtended32x64 = new IR.Rewrite.Truncate64x32Sub64FromZeroExtended32x64();
public static readonly BaseTransformation IR_Rewrite_Truncate64x32MulUnsigned64FromZeroExtended32x64 = new IR.Rewrite.Truncate64x32MulUnsigned64FromZeroExtended32x64();
public static readonly BaseTransformation IR_Rewrite_Truncate64x32And64FromZeroExtended32x64 = new IR.Rewrite.Truncate64x32And64FromZeroExtended32x64();
public static readonly BaseTransformation IR_Rewrite_Truncate64x32Or64FromZeroExtended32x64 = new IR.Rewrite.Truncate64x32Or64FromZeroExtended32x64();
public static readonly BaseTransformation IR_Rewrite_Truncate64x32Xor64FromZeroExtended32x64 = new IR.Rewrite.Truncate64x32Xor64FromZeroExtended32x64();
public static readonly BaseTransformation IR_Rewrite_And32Not32Not32 = new IR.Rewrite.And32Not32Not32();
public static readonly BaseTransformation IR_Rewrite_And64Not64Not64 = new IR.Rewrite.And64Not64Not64();
public static readonly BaseTransformation IR_Rewrite_Or32Not32Not32 = new IR.Rewrite.Or32Not32Not32();
public static readonly BaseTransformation IR_Rewrite_Or64Not64Not64 = new IR.Rewrite.Or64Not64Not64();
public static readonly BaseTransformation IR_ConstantMove_Add32 = new IR.ConstantMove.Add32();
public static readonly BaseTransformation IR_ConstantMove_Add64 = new IR.ConstantMove.Add64();
public static readonly BaseTransformation IR_ConstantMove_AddR4 = new IR.ConstantMove.AddR4();
@@ -251,6 +251,16 @@ public static class AutoTransforms
AutoInstance.IR_Rewrite_LoadZeroExtend8x64AddressFold,
AutoInstance.IR_Rewrite_LoadZeroExtend16x64AddressFold,
AutoInstance.IR_Rewrite_LoadZeroExtend32x64AddressFold,
AutoInstance.IR_Rewrite_Truncate64x32Add64FromZeroExtended32x64,
AutoInstance.IR_Rewrite_Truncate64x32Sub64FromZeroExtended32x64,
AutoInstance.IR_Rewrite_Truncate64x32MulUnsigned64FromZeroExtended32x64,
AutoInstance.IR_Rewrite_Truncate64x32And64FromZeroExtended32x64,
AutoInstance.IR_Rewrite_Truncate64x32Or64FromZeroExtended32x64,
AutoInstance.IR_Rewrite_Truncate64x32Xor64FromZeroExtended32x64,
AutoInstance.IR_Rewrite_And32Not32Not32,
AutoInstance.IR_Rewrite_And64Not64Not64,
AutoInstance.IR_Rewrite_Or32Not32Not32,
AutoInstance.IR_Rewrite_Or64Not64Not64,
AutoInstance.IR_ConstantMove_Add32,
AutoInstance.IR_ConstantMove_Add64,
AutoInstance.IR_ConstantMove_AddR4,
@@ -29,7 +29,7 @@ public override void Transform(Context context, TransformContext transformContex

var t1 = context.Operand1;

var e1 = transformContext.CreateConstant(To32(ShiftRight64(To64(t1), 32u)));
var e1 = transformContext.CreateConstant(GetHigh64(To64(t1)));

context.SetInstruction(IRInstruction.Move32, result, e1);
}
@@ -0,0 +1,54 @@
// Copyright (c) MOSA Project. Licensed under the New BSD License.

// This code was generated by an automated template.

using Mosa.Compiler.Framework.IR;

namespace Mosa.Compiler.Framework.Transform.Auto.IR.Rewrite
{
/// <summary>
/// And32Not32Not32
/// </summary>
public sealed class And32Not32Not32 : BaseTransformation
{
public And32Not32Not32() : base(IRInstruction.And32)
{
}

public override bool Match(Context context, TransformContext transformContext)
{
if (!context.Operand1.IsVirtualRegister)
return false;

if (!context.Operand2.IsVirtualRegister)
return false;

if (context.Operand1.Definitions.Count != 1)
return false;

if (context.Operand1.Definitions[0].Instruction != IRInstruction.Not32)
return false;

if (context.Operand2.Definitions.Count != 1)
return false;

if (context.Operand2.Definitions[0].Instruction != IRInstruction.Not32)
return false;

return true;
}

public override void Transform(Context context, TransformContext transformContext)
{
var result = context.Result;

var t1 = context.Operand1.Definitions[0].Operand1;
var t2 = context.Operand2.Definitions[0].Operand1;

var v1 = transformContext.AllocateVirtualRegister(transformContext.I4);

context.SetInstruction(IRInstruction.Or32, v1, t1, t2);
context.AppendInstruction(IRInstruction.Not32, result, v1);
}
}
}

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