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SPC Player: fix regression (lockup after menu warm boot)

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1 parent 61c4da0 commit 412cbaafdd2c5db562f3725afb1f52f4476f8787 @mrehkopf committed with Oct 5, 2016
Showing with 1 addition and 6 deletions.
  1. +1 −6 snes/spc700.a65
@@ -12,7 +12,7 @@ apu_ram_init:
lda @apu_ram_init_code, x
jsr spc_upload_byte
- cpx #43
+ cpx #35
bne -
ldx #$0002
stx APUIO2
@@ -50,11 +50,6 @@ apu_ram_init_code: ; .org $0002
.byt $ab,$19 ; inc loop2+2
.byt $1d ; dec x
.byt $d0,-11 ; bne loop2
- ; make sure IPL ROM is mapped, reset input+output registers
- .byt $20 ; clrp
- .byt $8f,$b0,$f1 ; mov $f1, #$b0
- .byt $da,$f4 ; mov $f4, ya (= 0)
- .byt $da,$f6 ; mov $f6, ya
; Re-run IPL
.byt $5f,$c0,$ff ; jmp $ffc0

2 comments on commit 412cbaa

Ramsis-SNES commented on 412cbaa Oct 6, 2016 edited

Question … What does the instruction .byt $8f,$90,$f1 ; mov $f1, #$90 do exactly? Just curious because it got replaced in da996b1 (lines 53-54) and was completely removed with this commit.

Edit: Figured it out, it sets a few bits of the CONTROL register. According to Fullsnes, this reg seems to be set to $B0 upon reset/power-up, so the instruction is probably not needed (?).

mrehkopf commented on 412cbaa Oct 6, 2016 edited

I was trying to be extra thorough and restore the initial APU state before re-entering IPL. #$B0 broke the SPC player because it writes the transfer address to APUIO2+3 BEFORE checking for the IPL ready magic. Therefore it gets overwritten with 0 by the register reset. I suspected there had to be some reason I had only initialized input register 0+1 before (#$90 instead of #$B0) but I didn't remember 🙄

But since the IPL always comes directly before and after the RAM init code, the register status is known anyway and doesn't interfere with the IPL itself. Therefore I figured the whole de-init could be scrapped entirely.

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