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MSU1: avoid unaligned SD reads (FPGA side)

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mrehkopf committed Apr 30, 2017
1 parent eda3909 commit e07b6e250867e0dea2d66554978e6a79f9d71a3e
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@@ -27,6 +27,7 @@ module dac(
input[7:0] volume,
input vol_latch,
input [2:0] vol_select,
input [8:0] dac_address_ext,
input play,
input reset,
input palmode,
@@ -121,7 +122,7 @@ always @(posedge clkin) begin
int_strobe <= 0;
comb_strobe <= 0;
if(reset) begin
dac_address_r <= 0;
dac_address_r <= dac_address_ext;
phaseacc <= 0;
subcount <= 0;
end else if(sysclk_rising) begin
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@@ -97,6 +97,7 @@ wire [10:0] SD_DMA_PARTIAL_END;
wire [10:0] dac_addr;
wire [2:0] dac_vol_select_out;
wire [8:0] dac_ptr_addr;
//wire [7:0] dac_volume;
wire [7:0] msu_volumerq_out;
wire [7:0] msu_status_out;
@@ -284,7 +285,8 @@ dac snes_dac(
.vol_select(dac_vol_select_out),
.palmode(dac_palmode_out),
.play(dac_play),
.reset(dac_reset)
.reset(dac_reset),
.dac_address_ext(dac_ptr_addr)
);
srtc snes_srtc (
@@ -448,6 +450,7 @@ mcu_cmd snes_mcu_cmd(
.dac_reset_out(dac_reset),
.dac_vol_select_out(dac_vol_select_out),
.dac_palmode_out(dac_palmode_out),
.dac_ptr_out(dac_ptr_addr),
.msu_addr_out(msu_write_addr),
.MSU_STATUS(msu_status_out),
.msu_status_reset_out(msu_status_reset_bits),
View
@@ -58,6 +58,7 @@ module mcu_cmd(
output reg dac_reset_out = 0,
output reg [2:0] dac_vol_select_out = 3'b000,
output reg dac_palmode_out = 0,
output reg [8:0] dac_ptr_out = 0,
// MSU data
output [13:0] msu_addr_out,
@@ -311,7 +312,14 @@ always @(posedge clk) begin
8'he2: // resume DAC
dac_play_out <= 1'b1;
8'he3: // reset DAC (set DAC playback address = 0)
dac_reset_out <= 1'b1; // reset by default value, see above
case (spi_byte_cnt)
32'h2:
dac_ptr_out[8] <= param_data[0];
32'h3: begin
dac_ptr_out[7:0] <= param_data;
dac_reset_out <= 1'b1; // reset by default value, see above
end
endcase
8'he4: // reset MSU read buffer pointer
case (spi_byte_cnt)
32'h2: begin
@@ -27,6 +27,7 @@ module dac(
input[7:0] volume,
input vol_latch,
input [2:0] vol_select,
input [8:0] dac_address_ext,
input play,
input reset,
input palmode,
@@ -121,7 +122,7 @@ always @(posedge clkin) begin
int_strobe <= 0;
comb_strobe <= 0;
if(reset) begin
dac_address_r <= 0;
dac_address_r <= dac_address_ext;
phaseacc <= 0;
subcount <= 0;
end else if(sysclk_rising) begin
@@ -98,6 +98,7 @@ wire [10:0] SD_DMA_PARTIAL_END;
wire [10:0] dac_addr;
wire [2:0] dac_vol_select_out;
wire [8:0] dac_ptr_addr;
wire [7:0] msu_volumerq_out;
wire [7:0] msu_status_out;
wire [31:0] msu_addressrq_out;
@@ -248,7 +249,8 @@ dac snes_dac(
.vol_select(dac_vol_select_out),
.palmode(dac_palmode_out),
.play(dac_play),
.reset(dac_reset)
.reset(dac_reset),
.dac_address_ext(dac_ptr_addr)
);
msu snes_msu (
@@ -340,6 +342,7 @@ mcu_cmd snes_mcu_cmd(
.dac_reset_out(dac_reset),
.dac_vol_select_out(dac_vol_select_out),
.dac_palmode_out(dac_palmode_out),
.dac_ptr_out(dac_ptr_addr),
.msu_addr_out(msu_write_addr),
.MSU_STATUS(msu_status_out),
.msu_status_reset_out(msu_status_reset_bits),
@@ -58,6 +58,7 @@ module mcu_cmd(
output reg dac_reset_out = 0,
output reg [2:0] dac_vol_select_out = 3'b000,
output reg dac_palmode_out = 0,
output reg [8:0] dac_ptr_out = 0,
// MSU data
output [13:0] msu_addr_out,
@@ -277,7 +278,14 @@ always @(posedge clk) begin
8'he2: // resume DAC
dac_play_out <= 1'b1;
8'he3: // reset DAC (set DAC playback address = 0)
dac_reset_out <= 1'b1; // reset by default value, see above
case (spi_byte_cnt)
32'h2:
dac_ptr_out[8] <= param_data[0];
32'h3: begin
dac_ptr_out[7:0] <= param_data;
dac_reset_out <= 1'b1; // reset by default value, see above
end
endcase
8'he4: // reset MSU read buffer pointer
case (spi_byte_cnt)
32'h2: begin
@@ -27,6 +27,7 @@ module dac(
input[7:0] volume,
input vol_latch,
input [2:0] vol_select,
input [8:0] dac_address_ext,
input play,
input reset,
input palmode,
@@ -121,7 +122,7 @@ always @(posedge clkin) begin
int_strobe <= 0;
comb_strobe <= 0;
if(reset) begin
dac_address_r <= 0;
dac_address_r <= dac_address_ext;
phaseacc <= 0;
subcount <= 0;
end else if(sysclk_rising) begin
@@ -95,6 +95,7 @@ wire [10:0] SD_DMA_PARTIAL_END;
wire [10:0] dac_addr;
wire [2:0] dac_vol_select_out;
wire [8:0] dac_ptr_addr;
wire [7:0] msu_volumerq_out;
wire [7:0] msu_status_out;
wire [31:0] msu_addressrq_out;
@@ -235,7 +236,8 @@ dac snes_dac(
.vol_select(dac_vol_select_out),
.palmode(dac_palmode_out),
.play(dac_play),
.reset(dac_reset)
.reset(dac_reset),
.dac_address_ext(dac_ptr_addr)
);
msu snes_msu (
@@ -335,6 +337,7 @@ mcu_cmd snes_mcu_cmd(
.dac_reset_out(dac_reset),
.dac_vol_select_out(dac_vol_select_out),
.dac_palmode_out(dac_palmode_out),
.dac_ptr_out(dac_ptr_addr),
.msu_addr_out(msu_write_addr),
.MSU_STATUS(msu_status_out),
.msu_status_reset_out(msu_status_reset_bits),
@@ -58,6 +58,7 @@ module mcu_cmd(
output reg dac_reset_out = 0,
output reg [2:0] dac_vol_select_out = 3'b000,
output reg dac_palmode_out = 0,
output reg [8:0] dac_ptr_out = 0,
// MSU data
output [13:0] msu_addr_out,
@@ -273,7 +274,14 @@ always @(posedge clk) begin
8'he2: // resume DAC
dac_play_out <= 1'b1;
8'he3: // reset DAC (set DAC playback address = 0)
dac_reset_out <= 1'b1; // reset by default value, see above
case (spi_byte_cnt)
32'h2:
dac_ptr_out[8] <= param_data[0];
32'h3: begin
dac_ptr_out[7:0] <= param_data;
dac_reset_out <= 1'b1; // reset by default value, see above
end
endcase
8'he4: // reset MSU read buffer pointer
case (spi_byte_cnt)
32'h2: begin

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