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Allow to disable interrupt delay after DMA SI read/write
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Titles like Banjo Tooie are known to hang because the interrupt after the SI
read/write is delayed. But there are also titles which are known to have
problems when delay is enabled. Examples are

 * Body Harvest
 * City Tour Grandprix - Zennihon GT Senshuken
 * Cruis'n USA
 * GT 64 - Championship Edition
 * Nightmare Creatures
 * Ucchan Nanchan no Hono no Challenger - Denryuu Ira Ira Bou
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ecsv committed Dec 13, 2013
1 parent 5d5ff6a commit a19fac3
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Showing 4 changed files with 25 additions and 2 deletions.
4 changes: 4 additions & 0 deletions doc/emuwiki-api-doc/Mupen64Plus_Core_Parameters.txt
Expand Up @@ -59,6 +59,10 @@ These are standard parameters which are used by the Mupen64Plus Core library. T
|M64TYPE_INT
|Force number of cycles per emulated instruction when set greater than 0.
|-
|DelaySI
|M64TYPE_BOOL
|Delay interrupt after DMA SI read/write.
|-
|}

These configuration parameters are used in the Core's event loop to detect keyboard and joystick commands. They are stored in a configuration section called "CoreEvents" and may be altered by the front-end in order to adjust the behaviour of the emulator. These may be adjusted at any time and the effect of the change should occur immediately. The Keysym value stored is actually <tt>(SDLMod << 16) || SDLKey</tt>, so that keypresses with modifiers like shift, control, or alt may be used.
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2 changes: 2 additions & 0 deletions src/main/main.c
Expand Up @@ -194,6 +194,7 @@ int main_set_core_defaults(void)
ConfigSetDefaultString(g_CoreConfig, "SaveStatePath", "", "Path to directory where emulator save states (snapshots) are saved. If this is blank, the default value of ${UserConfigPath}/save will be used");
ConfigSetDefaultString(g_CoreConfig, "SaveSRAMPath", "", "Path to directory where SRAM/EEPROM data (in-game saves) are stored. If this is blank, the default value of ${UserConfigPath}/save will be used");
ConfigSetDefaultString(g_CoreConfig, "SharedDataPath", "", "Path to a directory to search when looking for shared data files");
ConfigSetDefaultBool(g_CoreConfig, "DelaySI", 1, "Delay interrupt after DMA SI read/write");
ConfigSetDefaultInt(g_CoreConfig, "CountPerOp", 0, "Force number of cycles per emulated instruction");

/* handle upgrades */
Expand Down Expand Up @@ -735,6 +736,7 @@ m64p_error main_run(void)
savestates_set_autoinc_slot(ConfigGetParamBool(g_CoreConfig, "AutoStateSlotIncrement"));
savestates_select_slot(ConfigGetParamInt(g_CoreConfig, "CurrentStateSlot"));
no_compiled_jump = ConfigGetParamBool(g_CoreConfig, "NoCompiledJump");
delay_si = ConfigGetParamBool(g_CoreConfig, "DelaySI");
count_per_op = ConfigGetParamInt(g_CoreConfig, "CountPerOp");
if (count_per_op <= 0)
count_per_op = 2;
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2 changes: 2 additions & 0 deletions src/main/main.h
Expand Up @@ -33,6 +33,8 @@ extern int g_EmulatorRunning;

extern m64p_frame_callback g_FrameCallback;

extern int delay_si;

const char* get_savestatepath(void);
const char* get_savesrampath(void);

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19 changes: 17 additions & 2 deletions src/memory/dma.c
Expand Up @@ -45,6 +45,7 @@
#include "main/util.h"

static unsigned char sram[0x8000];
int delay_si = 0;

static char *get_sram_path(void)
{
Expand Down Expand Up @@ -354,7 +355,14 @@ void dma_si_write(void)

update_pif_write();
update_count();
add_interupt_event(SI_INT, /*0x100*/0x900);

if (delay_si) {
add_interupt_event(SI_INT, /*0x100*/0x900);
} else {
MI_register.mi_intr_reg |= 0x02; // SI
si_register.si_stat |= 0x1000; // INTERRUPT
check_interupt();
}
}

void dma_si_read(void)
Expand All @@ -375,6 +383,13 @@ void dma_si_read(void)
}

update_count();
add_interupt_event(SI_INT, /*0x100*/0x900);

if (delay_si) {
add_interupt_event(SI_INT, /*0x100*/0x900);
} else {
MI_register.mi_intr_reg |= 0x02; // SI
si_register.si_stat |= 0x1000; // INTERRUPT
check_interupt();
}
}

1 comment on commit a19fac3

@ecsv
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@ecsv ecsv commented on a19fac3 Dec 18, 2013

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Don't get confused by the commit message. I forgot one word in the second sentence: "delay is not enabled"

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