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	arch/arm/mach-tegra/board-seaboard-panel.c
	arch/arm/mach-tegra/common.c
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2 parents 37dc017 + b08158c commit b9881a6a773c6a5aee6bdc708c2d9b030433f2f7 @muromec committed Aug 22, 2011
Showing with 14,598 additions and 1,561 deletions.
  1. +84 −0 Documentation/device-mapper/persistent-data.txt
  2. +274 −0 Documentation/device-mapper/thin-provisioning.txt
  3. +100 −23 Documentation/input/elantech.txt
  4. +14 −0 Documentation/input/multi-touch-protocol.txt
  5. +189 −0 Documentation/prctl/seccomp_filter.txt
  6. +1 −0 arch/arm/Kconfig
  7. +0 −3 arch/arm/kernel/armksyms.c
  8. +3 −1 arch/arm/kernel/smp_twd.c
  9. +1 −1 arch/arm/lib/Makefile
  10. +0 −211 arch/arm/lib/sha1.S
  11. +8 −0 arch/arm/mach-tegra/Kconfig
  12. +3 −0 arch/arm/mach-tegra/board-harmony-panel.c
  13. +23 −3 arch/arm/mach-tegra/board-harmony-pinmux.c
  14. +127 −29 arch/arm/mach-tegra/board-harmony-power.c
  15. +31 −4 arch/arm/mach-tegra/board-harmony.c
  16. +10 −0 arch/arm/mach-tegra/board-harmony.h
  17. +12 −2 arch/arm/mach-tegra/board-seaboard-memory.c
  18. +118 −26 arch/arm/mach-tegra/board-seaboard-panel.c
  19. +2 −1 arch/arm/mach-tegra/board-seaboard-pinmux.c
  20. +32 −41 arch/arm/mach-tegra/board-seaboard-power.c
  21. +89 −114 arch/arm/mach-tegra/board-seaboard.c
  22. +3 −0 arch/arm/mach-tegra/board-seaboard.h
  23. +2 −2 arch/arm/mach-tegra/common.c
  24. +5 −2 arch/arm/mach-tegra/cpu-tegra.c
  25. +1 −0 arch/arm/mach-tegra/cpuidle.c
  26. +20 −0 arch/arm/mach-tegra/include/mach/dc.h
  27. +4 −2 arch/arm/mach-tegra/include/mach/fb.h
  28. +2 −0 arch/arm/mach-tegra/include/mach/powergate.h
  29. +9 −0 arch/arm/mach-tegra/include/mach/usb_phy.h
  30. +1 −0 arch/arm/mach-tegra/suspend.c
  31. +15 −1 arch/arm/mach-tegra/tegra2_clocks.c
  32. +35 −19 arch/arm/mach-tegra/timer.c
  33. +87 −0 arch/arm/mach-tegra/usb_phy.c
  34. +1 −0 arch/x86/Kconfig
  35. +1 −0 arch/x86/include/asm/ia32_unistd.h
  36. +2 −0 arch/x86/include/asm/seccomp_64.h
  37. +16 −8 chromeos/config/armel/config.common.armel
  38. +15 −4 chromeos/config/config.common.chromeos
  39. +5 −12 chromeos/config/i386/config.common.i386
  40. +5 −11 chromeos/config/x86_64/config.common.x86_64
  41. +78 −23 drivers/char/ramoops.c
  42. +38 −4 drivers/char/tpm/tpm_tis_i2c.c
  43. +28 −0 drivers/gpio/nm10_gpio.c
  44. +45 −20 drivers/i2c/busses/i2c-tegra.c
  45. +1 −0 drivers/input/input-mt.c
  46. +4 −3 drivers/input/keyboard/tegra-kbc.c
  47. +309 −119 drivers/input/mouse/cypress_i2c.c
  48. +55 −17 drivers/input/mouse/elantech.c
  49. +6 −0 drivers/input/mouse/elantech.h
  50. +475 −38 drivers/input/mouse/synaptics.c
  51. +31 −4 drivers/input/mouse/synaptics.h
  52. +6 −3 drivers/input/touchscreen/atmel_mxt_ts.c
  53. +9 −0 drivers/md/Kconfig
  54. +3 −0 drivers/md/Makefile
  55. +6 −32 drivers/md/dm-bht.c
  56. +59 −0 drivers/md/dm-table.c
  57. +1,373 −0 drivers/md/dm-thin-metadata.c
  58. +165 −0 drivers/md/dm-thin-metadata.h
  59. +2,196 −0 drivers/md/dm-thin.c
  60. +147 −99 drivers/md/dm-verity.c
  61. +7 −0 drivers/md/persistent-data/Kconfig
  62. +9 −0 drivers/md/persistent-data/Makefile
  63. +964 −0 drivers/md/persistent-data/dm-block-manager.c
  64. +127 −0 drivers/md/persistent-data/dm-block-manager.h
  65. +133 −0 drivers/md/persistent-data/dm-btree-internal.h
  66. +569 −0 drivers/md/persistent-data/dm-btree-remove.c
  67. +222 −0 drivers/md/persistent-data/dm-btree-spine.c
  68. +857 −0 drivers/md/persistent-data/dm-btree.c
  69. +158 −0 drivers/md/persistent-data/dm-btree.h
  70. +20 −0 drivers/md/persistent-data/dm-persistent-data-internal.h
  71. +94 −0 drivers/md/persistent-data/dm-space-map-common.h
  72. +662 −0 drivers/md/persistent-data/dm-space-map-disk.c
  73. +25 −0 drivers/md/persistent-data/dm-space-map-disk.h
  74. +956 −0 drivers/md/persistent-data/dm-space-map-metadata.c
  75. +33 −0 drivers/md/persistent-data/dm-space-map-metadata.h
  76. +118 −0 drivers/md/persistent-data/dm-space-map.h
  77. +414 −0 drivers/md/persistent-data/dm-transaction-manager.c
  78. +130 −0 drivers/md/persistent-data/dm-transaction-manager.h
  79. +83 −0 drivers/media/video/ov9740.c
  80. +34 −9 drivers/media/video/tegra/avp/avp_svc.c
  81. +28 −0 drivers/mfd/tps6586x.c
  82. +42 −49 drivers/net/usb/gobi/qcusbnet.c
  83. +79 −61 drivers/net/usb/gobi/qmidevice.c
  84. +13 −11 drivers/net/wireless/ath/ath9k/ar9003_calib.c
  85. +26 −18 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
  86. +7 −4 drivers/net/wireless/ath/ath9k/ar9003_mac.c
  87. +41 −18 drivers/net/wireless/ath/ath9k/ar9003_phy.c
  88. +8 −0 drivers/net/wireless/ath/ath9k/beacon.c
  89. +4 −1 drivers/net/wireless/ath/ath9k/hw.c
  90. +2 −0 drivers/net/wireless/ath/ath9k/hw.h
  91. +29 −2 drivers/net/wireless/ath/ath9k/mac.c
  92. +1 −0 drivers/net/wireless/ath/ath9k/mac.h
  93. +7 −3 drivers/net/wireless/ath/ath9k/main.c
  94. +6 −0 drivers/net/wireless/ath/ath9k/pci.c
  95. +2 −1 drivers/net/wireless/ath/ath9k/rc.c
  96. +11 −13 drivers/net/wireless/ath/ath9k/xmit.c
  97. +49 −0 drivers/platform/Kconfig
  98. +31 −1 drivers/regulator/tps6586x-regulator.c
  99. +1 −6 drivers/staging/ath6kl/os/linux/cfg80211.c
  100. +46 −0 drivers/staging/iio/light/isl29018.c
  101. +11 −5 drivers/usb/class/cdc-acm.c
  102. +11 −2 drivers/usb/host/ehci-tegra.c
  103. +9 −0 drivers/video/backlight/pwm_bl.c
  104. +233 −42 drivers/video/tegra/dc/dc.c
  105. +2 −0 drivers/video/tegra/dc/dc_priv.h
  106. +79 −21 drivers/video/tegra/dc/edid.c
  107. +5 −0 drivers/video/tegra/dc/edid.h
  108. +37 −2 drivers/video/tegra/dc/ext/control.c
  109. +71 −174 drivers/video/tegra/dc/hdmi.c
  110. +49 −45 drivers/video/tegra/fb.c
  111. +2 −2 drivers/video/tegra/host/nvhost_acm.c
  112. +1 −1 drivers/video/tegra/nvmap/nvmap.h
  113. +4 −1 drivers/video/tegra/nvmap/nvmap_ioctl.c
  114. +1 −1 drivers/video/tegra/nvmap/nvmap_mru.c
  115. +2 −2 drivers/video/tegra/nvmap/nvmap_mru.h
  116. +1 −0 fs/ecryptfs/ecryptfs_kernel.h
  117. +1 −8 fs/ecryptfs/file.c
  118. +2 −0 fs/ecryptfs/main.c
  119. +14 −27 fs/ecryptfs/mmap.c
  120. +10 −2 fs/ecryptfs/read_write.c
  121. +2 −1 fs/ecryptfs/super.c
  122. +31 −0 fs/proc/base.c
  123. +1 −1 include/linux/cryptohash.h
  124. +1 −3 include/linux/dm-bht.h
  125. +37 −0 include/linux/ieee80211.h
  126. +12 −0 include/linux/init_task.h
  127. +1 −0 include/linux/input.h
  128. +17 −0 include/linux/mfd/tps6586x.h
  129. +14 −0 include/linux/pci_ids.h
  130. +7 −0 include/linux/prctl.h
  131. +1 −0 include/linux/pwm_backlight.h
  132. +2 −0 include/linux/ramoops.h
  133. +1 −1 include/linux/sched.h
  134. +116 −3 include/linux/seccomp.h
  135. +9 −0 include/net/cfg80211.h
  136. +10 −0 include/video/tegra_dc_ext.h
  137. +0 −74 init/do_mounts_dm.c
  138. +1 −0 kernel/Makefile
  139. +4 −0 kernel/fork.c
  140. +29 −9 kernel/seccomp.c
  141. +1,058 −0 kernel/seccomp_filter.c
  142. +12 −0 kernel/sys.c
  143. +12 −0 kernel/sysctl.c
  144. +158 −54 lib/sha1.c
  145. +17 −0 mm/Kconfig
  146. +3 −1 mm/mmap.c
  147. +2 −0 net/mac80211/sta_info.c
  148. +9 −0 net/wireless/mlme.c
  149. +34 −0 net/wireless/nl80211.c
  150. +3 −0 net/wireless/nl80211.h
  151. +17 −0 security/Kconfig
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View
84 Documentation/device-mapper/persistent-data.txt
@@ -0,0 +1,84 @@
+Introduction
+============
+
+The more-sophisticated device-mapper targets require complex metadata
+that is managed in kernel. In late 2010 we were seeing that various
+different targets were rolling their own data strutures, for example:
+
+- Mikulas Patocka's multisnap implementation
+- Heinz Mauelshagen's thin provisioning target
+- Another btree-based caching target posted to dm-devel
+- Another multi-snapshot target based on a design of Daniel Phillips
+
+Maintaining these data structures takes a lot of work, so if possible
+we'd like to reduce the number.
+
+The persistent-data library is an attempt to provide a re-usable
+framework for people who want to store metadata in device-mapper
+targets. It's currently used by the thin-provisioning target and an
+upcoming hierarchical storage target.
+
+Overview
+========
+
+The main documentation is in the header files which can all be found
+under drivers/md/persistent-data.
+
+The block manager
+-----------------
+
+dm-block-manager.[hc]
+
+This provides access to the data on disk in fixed sized-blocks. There
+is a read/write locking interface to prevent concurrent accesses, and
+keep data that is being used in the cache.
+
+Clients of persistent-data are unlikely to use this directly.
+
+The transaction manager
+-----------------------
+
+dm-transaction-manager.[hc]
+
+This restricts access to blocks and enforces copy-on-write semantics.
+The only way you can get hold of a writable block through the
+transaction manager is by shadowing an existing block (ie. doing
+copy-on-write) or allocating a fresh one. Shadowing is elided within
+the same transaction so performance is reasonable. The commit method
+ensures that all data is flushed before it writes the superblock.
+On power failure your metadata will be as it was when last committed.
+
+The Space Maps
+--------------
+
+dm-space-map.h
+dm-space-map-metadata.[hc]
+dm-space-map-disk.[hc]
+
+On-disk data structures that keep track of reference counts of blocks.
+Also acts as the allocator of new blocks. Currently two
+implementations: a simpler one for managing blocks on a different
+device (eg. thinly-provisioned data blocks); and one for managing
+the metadata space. The latter is complicated by the need to store
+its own data within the space it's managing.
+
+The data structures
+-------------------
+
+dm-btree.[hc]
+dm-btree-remove.c
+dm-btree-spine.c
+dm-btree-internal.h
+
+Currently there is only one data structure, a hierarchical btree.
+There are plans to add more. For example, something with an
+array-like interface would see a lot of use.
+
+The btree is 'hierarchical' in that you can define it to be composed
+of nested btrees, and take multiple keys. For example, the
+thin-provisioning target uses a btree with two levels of nesting.
+The first maps a device id to a mapping tree, and that in turn maps a
+virtual block to a physical block.
+
+Values stored in the btrees can have arbitrary size. Keys are always
+64bits, although nesting allows you to use multiple keys.
View
274 Documentation/device-mapper/thin-provisioning.txt
@@ -0,0 +1,274 @@
+Introduction
+============
+
+This document descibes a collection of device-mapper targets that
+between them implement thin-provisioning and snapshots.
+
+The main highlight of this implementation, compared to the previous
+implementation of snapshots, is that it allows many virtual devices to
+be stored on the same data volume. This simplifies administration and
+allows the sharing of data between volumes, thus reducing disk usage.
+
+Another significant feature is support for an arbitrary depth of
+recursive snapshots (snapshots of snapshots of snapshots ...). The
+previous implementation of snapshots did this by chaining together
+lookup tables, and so performance was O(depth). This new
+implementation uses a single data structure to avoid this degradation
+with depth. Fragmentation may still be an issue, however, in some
+scenarios.
+
+Metadata is stored on a separate device from data, giving the
+administrator some freedom, for example to:
+
+- Improve metadata resilience by storing metadata on a mirrored volume
+ but data on a non-mirrored one.
+
+- Improve performance by storing the metadata on SSD.
+
+Status
+======
+
+These targets are very much still in the EXPERIMENTAL state. Please
+do not yet rely on them in production. But do experiment and offer us
+feedback. Different use cases will have different performance
+characteristics, for example due to fragmentation of the data volume.
+
+If you find this software is not performing as expected please mail
+dm-devel@redhat.com with details and we'll try our best to improve
+things for you.
+
+Userspace tools for checking and repairing the metadata are under
+development.
+
+Cookbook
+========
+
+This section describes some quick recipes for using thin provisioning.
+They use the dmsetup program to control the device-mapper driver
+directly. End users will be advised to use a higher-level volume
+manager such as LVM2 once support has been added.
+
+Pool device
+-----------
+
+The pool device ties together the metadata volume and the data volume.
+It maps I/O linearly to the data volume and updates the metadata via
+two mechanisms:
+
+- Function calls from the thin targets
+
+- Device-mapper 'messages' from userspace which control the creation of new
+ virtual devices amongst other things.
+
+Setting up a fresh pool device
+------------------------------
+
+Setting up a pool device requires a valid metadata device, and a
+data device. If you do not have an existing metadata device you can
+make one by zeroing the first 4k to indicate empty metadata.
+
+ dd if=/dev/zero of=$metadata_dev bs=4096 count=1
+
+FIXME How big must $metadata_dev be?
+
+Reloading a pool table
+----------------------
+
+You may reload a pool's table, indeed this is how the pool is resized
+if it runs out of space. (N.B. While specifying a different metadata
+device when reloading is not forbidden at the moment, things will go
+wrong if it does not route I/O to exactly the same on-disk location as
+previously.)
+
+Using an existing pool device
+-----------------------------
+
+ dmsetup create pool \
+ --table "0 20971520 thin-pool $metadata_dev $data_dev \
+ $data_block_size $low_water_mark"
+
+$data_block_size gives the smallest unit of disk space that can be
+allocated at a time. As with all sizes passed to device-mapper, this
+is expressed in units of 512-byte sectors. People primarily
+interested in thin provisioning may want to use a value such as 1024.
+People doing lots of snapshotting may want a smaller value such as
+128. $data_block_size must be the same for the lifetime of the
+metadata device.
+
+$low_water_mark is expressed in 512-byte sectors. If free space on
+the data device drops below this level then a dm event will be
+triggered which a userspace daemon should catch allowing it to
+extend the pool device. Only one such event will be sent.
+
+FIXME - Do we get a second event after a table reload when you're
+already over the threshold?
+
+Thin provisioning
+-----------------
+
+i) Creating a new thinly-provisioned volume.
+
+ To create a new thinly- provisioned volume you must send a message to an
+ active pool device, /dev/mapper/pool in this example.
+
+ dmsetup message /dev/mapper/pool 0 "create_thin 0"
+
+ Here '0' is an identifier for the volume, a 24-bit number. It's up
+ to the caller to allocate and manage these identifiers. If the
+ identifier is already in use, the message will fail.
+FIXME With what error?
+
+ii) Using a thinly-provisioned volume.
+
+ Thinly-provisioned volumes are activated using the 'thin' target:
+
+ dmsetup create thin --table "0 2097152 thin /dev/mapper/pool 0"
+
+ The last parameter is the identifier for the thinp device.
+
+Internal snapshots
+------------------
+
+i) Creating an internal snapshot.
+
+ Snapshots are created with another message to the pool.
+
+ If the origin device that you wish to snapshot is active, you must
+ suspend it before creating the snapshot.
+FIXME What happens if you don't?
+
+ dmsetup suspend /dev/mapper/thin
+ dmsetup message /dev/mapper/pool 0 "create_snap 1 0"
+ dmsetup resume /dev/mapper/thin
+
+ Here '1' is the identifier for the volume, a 24-bit number. '0' is the
+ identifier for the origin device.
+
+ii) Using an internal snapshot.
+
+ Once created, the user doesn't have to worry about any connection
+ between the origin and the snapshot. Indeed the snapshot is no
+ different from any other thinly-provisioned device and can be
+ snapshotted itself via the same method. It's perfectly legal to
+ have only one of them active, and there's no ordering requirement on
+ activating or removing them both. (This differs from conventional
+ device-mapper snapshots.)
+
+ Activate it exactly the same way as any other thinly-provisioned volume:
+
+ dmsetup create snap --table "0 2097152 thin /dev/mapper/pool 1"
+
+Deactivation
+------------
+
+All devices using a pool must be deactivated before the pool itself
+can be.
+
+ dmsetup remove thin
+ dmsetup remove snap
+ dmsetup remove pool
+
+Reference
+=========
+
+'thin-pool' target
+------------------
+
+i) Constructor
+
+ thin-pool <metadata dev> <data dev> <data block size (sectors)> \
+ <low water mark (sectors)> [<number of feature args> [<arg>]*]
+
+ Optional feature arguments:
+ - 'skip_block_zeroing': skips the zeroing of newly-provisioned blocks.
+
+ Data block size must be between 64KB (128 sectors) and 1GB
+ (2097152 sectors) inclusive.
+
+ii) Status
+
+ <transaction id> <free metadata space in sectors>
+ <free data space in sectors> <held metadata root>
+
+ transaction id:
+ A 64-bit number used by userspace to help synchronise with metadata
+ from volume managers.
+
+ free data space in sectors:
+ If this drops below the pool's low water mark a dm event will
+ be sent to userspace. This event is edge-triggered and it
+ will occur only once after each resume so volume manager writers
+ should register for the event and then check the target's status.
+
+ held metadata root:
+ The location, in sectors, of the metadata root that has been
+ 'held' for userspace read access. '-' indicates there is no
+ held root. This feature is not yet implemented so '-' is
+ always returned.
+
+iii) Messages
+
+ create_thin <dev id>
+
+ Create a new thinly-provisioned device.
+ <dev id> is an arbitrary unique 24-bit identifier chosen by
+ the caller.
+
+ create_snap <dev id> <origin id>
+
+ Create a new snapshot of another thinly-provisioned device.
+ <dev id> is an arbitrary unique 24-bit identifier chosen by
+ the caller.
+ <origin id> is the identifier of the thinly-provisioned device
+ of which the new device will be a snapshot.
+
+ delete <dev id>
+
+ Deletes a thin device. Irreversible.
+
+ trim <dev id> <new size in sectors>
+
+ Delete mappings from the end of a thin device. Irreversible.
+ You might want to use this if you're reducing the size of
+ your thinly-provisioned device. In many cases, due to the
+ sharing of blocks between devices, it is not possible to
+ determine in advance how much space 'trim' will release. (In
+ future a userspace tool might be able to perform this
+ calculation.)
+
+ set_transaction_id <current id> <new id>
+
+ Userland volume managers, such as LVM, need a way to
+ synchronise their external metadata with the internal metadata of the
+ pool target. The thin-pool target offers to store an
+ arbitrary 64-bit transaction id and return it on the target's
+ status line. To avoid races you must provide what you think
+ the current transaction id is when you change it with this
+ compare-and-swap message.
+
+'thin' target
+-------------
+
+i) Constructor
+
+ thin <pool dev> <dev id>
+
+ pool dev:
+ the thin-pool device, e.g. /dev/mapper/my_pool or 253:0
+
+ dev id:
+ the internal device identifier of the device to be
+ activated.
+
+The pool doesn't store any size against the thin devices. If you
+load a thin target that is smaller than you've been using previously,
+then you'll have no access to blocks mapped beyond the end. If you
+load a target that is bigger than before, then extra blocks will be
+provisioned as and when needed.
+
+If you wish to reduce the size of your thin device and potentially
+regain some space then send the 'trim' message to the pool.
+
+ii) Status
+
+ <nr mapped sectors> <highest mapped sector>
View
123 Documentation/input/elantech.txt
@@ -34,7 +34,8 @@ Contents
Currently the Linux Elantech touchpad driver is aware of two different
hardware versions unimaginatively called version 1 and version 2. Version 1
is found in "older" laptops and uses 4 bytes per packet. Version 2 seems to
-be introduced with the EeePC and uses 6 bytes per packet.
+be introduced with the EeePC and uses 6 bytes per packet, and provides
+additional features such as position of two fingers, and width of the touch.
The driver tries to support both hardware versions and should be compatible
with the Xorg Synaptics touchpad driver and its graphical configuration
@@ -94,18 +95,44 @@ Currently the Linux Elantech touchpad driver provides two extra knobs under
can check these bits and reject any packet that appears corrupted. Using
this knob you can bypass that check.
- It is not known yet whether hardware version 2 provides the same parity
- bits. Hence checking is disabled by default. Currently even turning it on
- will do nothing.
-
+ Hardware version 2 does not provide the same parity bits. Only some basic
+ data consistency checking can be done. For now checking is disabled by
+ default. Currently even turning it on will do nothing.
/////////////////////////////////////////////////////////////////////////////
+3. Differentiating hardware versions
+ =================================
+
+To detect the hardware version, read the version number as param[0].param[1].param[2]
+
+ 4 bytes version: (after the arrow is the name given in the Dell-provided driver)
+ 02.00.22 => EF013
+ 02.06.00 => EF019
+In the wild, there appear to be more versions, such as 00.01.64, 01.00.21,
+02.00.00, 02.00.04, 02.00.06.
+
+ 6 bytes:
+ 02.00.30 => EF113
+ 02.08.00 => EF023
+ 02.08.XX => EF123
+ 02.0B.00 => EF215
+ 04.01.XX => Scroll_EF051
+ 04.02.XX => EF051
+In the wild, there appear to be more versions, such as 04.03.01, 04.04.11. There
+appears to be almost no difference, except for EF113, which does not report
+pressure/width and has different data consistency checks.
+
+Probably all the versions with param[0] <= 01 can be considered as
+4 bytes/firmware 1. The versions < 02.08.00, with the exception of 02.00.30, as
+4 bytes/firmware 2. Everything >= 02.08.00 can be considered as 6 bytes.
+
+/////////////////////////////////////////////////////////////////////////////
-3. Hardware version 1
+4. Hardware version 1
==================
-3.1 Registers
+4.1 Registers
~~~~~~~~~
By echoing a hexadecimal value to a register it contents can be altered.
@@ -168,7 +195,7 @@ For example:
smart edge activation area width?
-3.2 Native relative mode 4 byte packet format
+4.2 Native relative mode 4 byte packet format
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
byte 0:
@@ -226,9 +253,13 @@ byte 3:
positive = down
-3.3 Native absolute mode 4 byte packet format
+4.3 Native absolute mode 4 byte packet format
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+EF013 and EF019 have a special behaviour (due to a bug in the firmware?), and
+when 1 finger is touching, the first 2 position reports must be discarded.
+This counting is reset whenever a different number of fingers is reported.
+
byte 0:
firmware version 1.x:
@@ -279,11 +310,11 @@ byte 3:
/////////////////////////////////////////////////////////////////////////////
-4. Hardware version 2
+5. Hardware version 2
==================
-4.1 Registers
+5.1 Registers
~~~~~~~~~
By echoing a hexadecimal value to a register it contents can be altered.
@@ -316,41 +347,82 @@ For example:
0x7f = never i.e. tap again to release)
-4.2 Native absolute mode 6 byte packet format
+5.2 Native absolute mode 6 byte packet format
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-4.2.1 One finger touch
+5.2.1 Parity checking and packet re-synchronization
+There is no parity checking, however some consistency checks can be performed.
+
+For instance for EF113:
+ SA1= packet[0];
+ A1 = packet[1];
+ B1 = packet[2];
+ SB1= packet[3];
+ C1 = packet[4];
+ D1 = packet[5];
+ if( (((SA1 & 0x3C) != 0x3C) && ((SA1 & 0xC0) != 0x80)) || // check Byte 1
+ (((SA1 & 0x0C) != 0x0C) && ((SA1 & 0xC0) == 0x80)) || // check Byte 1 (one finger pressed)
+ (((SA1 & 0xC0) != 0x80) && (( A1 & 0xF0) != 0x00)) || // check Byte 2
+ (((SB1 & 0x3E) != 0x38) && ((SA1 & 0xC0) != 0x80)) || // check Byte 4
+ (((SB1 & 0x0E) != 0x08) && ((SA1 & 0xC0) == 0x80)) || // check Byte 4 (one finger pressed)
+ (((SA1 & 0xC0) != 0x80) && (( C1 & 0xF0) != 0x00)) ) // check Byte 5
+ // error detected
+
+For all the other ones, there are just a few constant bits:
+ if( ((packet[0] & 0x0C) != 0x04) ||
+ ((packet[3] & 0x0f) != 0x02) )
+ // error detected
+
+
+In case an error is detected, all the packets are shifted by one (and packet[0] is discarded).
+
+5.2.1 One/Three finger touch
~~~~~~~~~~~~~~~~
byte 0:
bit 7 6 5 4 3 2 1 0
- n1 n0 . . . . R L
+ n1 n0 w3 w2 . . R L
L, R = 1 when Left, Right mouse button pressed
n1..n0 = numbers of fingers on touchpad
byte 1:
bit 7 6 5 4 3 2 1 0
- . . . . . x10 x9 x8
+ p7 p6 p5 p4 . x10 x9 x8
byte 2:
bit 7 6 5 4 3 2 1 0
- x7 x6 x5 x4 x4 x2 x1 x0
+ x7 x6 x5 x4 x3 x2 x1 x0
x10..x0 = absolute x value (horizontal)
byte 3:
bit 7 6 5 4 3 2 1 0
- . . . . . . . .
+ n4 vf w1 w0 . . . b2
+
+ n4 = set if more than 3 fingers (only in 3 fingers mode)
+ vf = a kind of flag ? (only on EF123, 0 when finger is over one
+ of the buttons, 1 otherwise)
+ w3..w0 = width of the finger touch (not EF113)
+ b2 (on EF113 only, 0 otherwise), b2.R.L indicates one button pressed:
+ 0 = none
+ 1 = Left
+ 2 = Right
+ 3 = Middle (Left and Right)
+ 4 = Forward
+ 5 = Back
+ 6 = Another one
+ 7 = Another one
byte 4:
bit 7 6 5 4 3 2 1 0
- . . . . . . y9 y8
+ p3 p1 p2 p0 . . y9 y8
+
+ p7..p0 = pressure (not EF113)
byte 5:
@@ -363,6 +435,11 @@ byte 5:
4.2.2 Two finger touch
~~~~~~~~~~~~~~~~
+Note that the two pairs of coordinates are not exactly the coordinates of the
+two fingers, but only the pair of the lower-left and upper-right coordinates.
+So the actual fingers might be situated on the other diagonal of the square
+defined by these two points.
+
byte 0:
bit 7 6 5 4 3 2 1 0
@@ -376,14 +453,14 @@ byte 1:
bit 7 6 5 4 3 2 1 0
ax7 ax6 ax5 ax4 ax3 ax2 ax1 ax0
- ax8..ax0 = first finger absolute x value
+ ax8..ax0 = lower-left finger absolute x value
byte 2:
bit 7 6 5 4 3 2 1 0
ay7 ay6 ay5 ay4 ay3 ay2 ay1 ay0
- ay8..ay0 = first finger absolute y value
+ ay8..ay0 = lower-left finger absolute y value
byte 3:
@@ -395,11 +472,11 @@ byte 4:
bit 7 6 5 4 3 2 1 0
bx7 bx6 bx5 bx4 bx3 bx2 bx1 bx0
- bx8..bx0 = second finger absolute x value
+ bx8..bx0 = upper-right finger absolute x value
byte 5:
bit 7 6 5 4 3 2 1 0
by7 by8 by5 by4 by3 by2 by1 by0
- by8..by0 = second finger absolute y value
+ by8..by0 = upper-right finger absolute y value
View
14 Documentation/input/multi-touch-protocol.txt
@@ -65,6 +65,20 @@ the full state of each initiated contact has to reside in the receiving
end. Upon receiving an MT event, one simply updates the appropriate
attribute of the current slot.
+Some devices identify and/or track more contacts than they can report to the
+driver. A driver for such a device should associate one type B slot with each
+contact that is reported by the hardware. Whenever the identity of the
+contact associated with a slot changes, the driver should invalidate that
+slot by changing its ABS_MT_TRACKING_ID. If the hardware signals that it is
+tracking more contacts than it is currently reporting, the driver should use
+a BTN_TOOL_*TAP event to inform userspace of the total number of contacts
+being tracked by the hardware at that moment. The driver should do this by
+explicitly sending the corresponding BTN_TOOL_*TAP event and setting
+use_count to false when calling input_mt_report_pointer_emulation().
+The driver should only advertise as many slots as the hardware can report.
+Userspace can detect that a driver can report more total contacts than slots
+by noting that the largest supported BTN_TOOL_*TAP event is larger than the
+total number of type B slots reported in the absinfo for the ABS_MT_SLOT axis.
Protocol Example A
------------------
View
189 Documentation/prctl/seccomp_filter.txt
@@ -0,0 +1,189 @@
+ Seccomp filtering
+ =================
+
+Introduction
+------------
+
+A large number of system calls are exposed to every userland process
+with many of them going unused for the entire lifetime of the process.
+As system calls change and mature, bugs are found and eradicated. A
+certain subset of userland applications benefit by having a reduced set
+of available system calls. The resulting set reduces the total kernel
+surface exposed to the application. System call filtering is meant for
+use with those applications.
+
+The implementation currently leverages both the existing seccomp
+infrastructure and the kernel tracing infrastructure. By centralizing
+hooks for attack surface reduction in seccomp, it is possible to assure
+attention to security that is less relevant in normal ftrace scenarios,
+such as time-of-check, time-of-use attacks. However, ftrace provides a
+rich, human-friendly environment for interfacing with system call
+specific arguments. (As such, this requires FTRACE_SYSCALLS for any
+introspective filtering support.)
+
+
+What it isn't
+-------------
+
+System call filtering isn't a sandbox. It provides a clearly defined
+mechanism for minimizing the exposed kernel surface. Beyond that,
+policy for logical behavior and information flow should be managed with
+a combinations of other system hardening techniques and, potentially, a
+LSM of your choosing. Expressive, dynamic filters based on the ftrace
+filter engine provide further options down this path (avoiding
+pathological sizes or selecting which of the multiplexed system calls in
+socketcall() is allowed, for instance) which could be construed,
+incorrectly, as a more complete sandboxing solution.
+
+
+Usage
+-----
+
+An additional seccomp mode is exposed through mode '13'.
+This mode depends on CONFIG_SECCOMP_FILTER. By default, it provides
+only the most trivial of filter support "1" or cleared. However, if
+CONFIG_FTRACE_SYSCALLS is enabled, the ftrace filter engine may be used
+for more expressive filters.
+
+A collection of filters may be supplied via prctl, and the current set
+of filters is exposed in /proc/<pid>/seccomp_filter.
+
+Interacting with seccomp filters can be done through three new prctl calls
+and one existing one.
+
+PR_SET_SECCOMP:
+ A pre-existing option for enabling strict seccomp mode (1) or
+ filtering seccomp (13).
+
+ Usage:
+ prctl(PR_SET_SECCOMP, 1); /* strict */
+ prctl(PR_SET_SECCOMP, 13); /* filters */
+
+PR_SET_SECCOMP_FILTER:
+ Allows the specification of a new filter for a given system
+ call, by number, and filter string. By default, the filter
+ string may only be "1". However, if CONFIG_FTRACE_SYSCALLS is
+ supported, the filter string may make use of the ftrace
+ filtering language's awareness of system call arguments.
+
+ In addition, the event id for the system call entry may be
+ specified in lieu of the system call number itself, as
+ determined by the 'type' argument. This allows for the future
+ addition of seccomp-based filtering on other registered,
+ relevant ftrace events.
+
+ All calls to PR_SET_SECCOMP_FILTER for a given system
+ call will append the supplied string to any existing filters.
+ Filter construction looks as follows:
+ (Nothing) + "fd == 1 || fd == 2" => fd == 1 || fd == 2
+ ... + "fd != 2" => (fd == 1 || fd == 2) && fd != 2
+ ... + "size < 100" =>
+ ((fd == 1 || fd == 2) && fd != 2) && size < 100
+ If there is no filter and the seccomp mode has already
+ transitioned to filtering, additions cannot be made. Filters
+ may only be added that reduce the available kernel surface.
+
+ Usage (per the construction example above):
+ unsigned long type = PR_SECCOMP_FILTER_SYSCALL;
+ prctl(PR_SET_SECCOMP_FILTER, type, __NR_write,
+ "fd == 1 || fd == 2");
+ prctl(PR_SET_SECCOMP_FILTER, type, __NR_write,
+ "fd != 2");
+ prctl(PR_SET_SECCOMP_FILTER, type, __NR_write,
+ "size < 100");
+
+ The 'type' argument may be one of PR_SECCOMP_FILTER_SYSCALL or
+ PR_SECCOMP_FILTER_EVENT.
+
+PR_CLEAR_SECCOMP_FILTER:
+ Removes all filter entries for a given system call number or
+ event id. When called prior to entering seccomp filtering mode,
+ it allows for new filters to be applied to the same system call.
+ After transition, however, it completely drops access to the
+ call.
+
+ Usage:
+ prctl(PR_CLEAR_SECCOMP_FILTER,
+ PR_SECCOMP_FILTER_SYSCALL, __NR_open);
+
+PR_GET_SECCOMP_FILTER:
+ Returns the aggregated filter string for a system call into a
+ user-supplied buffer of a given length.
+
+ Usage:
+ prctl(PR_GET_SECCOMP_FILTER,
+ PR_SECCOMP_FILTER_SYSCALL, __NR_write, buf,
+ sizeof(buf));
+
+All of the above calls return 0 on success and non-zero on error. If
+CONFIG_FTRACE_SYSCALLS is not supported and a rich-filter was specified,
+the caller may check the errno for -ENOSYS. The same is true if
+specifying an filter by the event id fails to discover any relevant
+event entries.
+
+
+Example
+-------
+
+Assume a process would like to cleanly read and write to stdin/out/err
+as well as access its filters after seccomp enforcement begins. This
+may be done as follows:
+
+ int filter_syscall(int nr, char *buf) {
+ return prctl(PR_SET_SECCOMP_FILTER, PR_SECCOMP_FILTER_SYSCALL,
+ nr, buf);
+ }
+
+ filter_syscall(__NR_read, "fd == 0");
+ filter_syscall(_NR_write, "fd == 1 || fd == 2");
+ filter_syscall(__NR_exit, "1");
+ filter_syscall(__NR_prctl, "1");
+ prctl(PR_SET_SECCOMP, 13);
+
+ /* Do stuff with fdset . . .*/
+
+ /* Drop read access and keep only write access to fd 1. */
+ prctl(PR_CLEAR_SECCOMP_FILTER, PR_SECCOMP_FILTER_SYSCALL, __NR_read);
+ filter_syscall(__NR_write, "fd != 2");
+
+ /* Perform any final processing . . . */
+ syscall(__NR_exit, 0);
+
+
+Caveats
+-------
+
+- Avoid using a filter of "0" to disable a filter. Always favor calling
+ prctl(PR_CLEAR_SECCOMP_FILTER, ...). Otherwise the behavior may vary
+ depending on if CONFIG_FTRACE_SYSCALLS support exists -- though an
+ error will be returned if the support is missing.
+
+- execve is always blocked. seccomp filters may not cross that boundary.
+
+- Filters can be inherited across fork/clone but only when they are
+ active (e.g., PR_SET_SECCOMP has been set to 13), but not prior to use.
+ This stops the parent process from adding filters that may undermine
+ the child process security or create unexpected behavior after an
+ execve.
+
+- Some platforms support a 32-bit userspace with 64-bit kernels. In
+ these cases (CONFIG_COMPAT), system call numbers may not match across
+ 64-bit and 32-bit system calls. When the first PRCTL_SET_SECCOMP_FILTER
+ is called, the in-memory filters state is annotated with whether the
+ call has been made via the compat interface. All subsequent calls will
+ be checked for compat call mismatch. In the long run, it may make sense
+ to store compat and non-compat filters separately, but that is not
+ supported at present. Once one type of system call interface has been
+ used, it must be continued to be used.
+
+
+Adding architecture support
+-----------------------
+
+Any platform with seccomp support should be able to support the bare
+minimum of seccomp filter features. However, since seccomp_filter
+requires that execve be blocked, it expects the architecture to expose a
+__NR_seccomp_execve define that maps to the execve system call number.
+On platforms where CONFIG_COMPAT applies, __NR_seccomp_execve_32 must
+also be provided. Once those macros exist, "select HAVE_SECCOMP_FILTER"
+support may be added to the architectures Kconfig.
View
1 arch/arm/Kconfig
@@ -16,6 +16,7 @@ config ARM
select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
+ select HAVE_SECCOMP_FILTER
select HAVE_GENERIC_DMA_COHERENT
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_LZO
View
3 arch/arm/kernel/armksyms.c
@@ -112,9 +112,6 @@ EXPORT_SYMBOL(__put_user_4);
EXPORT_SYMBOL(__put_user_8);
#endif
- /* crypto hash */
-EXPORT_SYMBOL(sha_transform);
-
/* gcc lib functions */
EXPORT_SYMBOL(__ashldi3);
EXPORT_SYMBOL(__ashrdi3);
View
4 arch/arm/kernel/smp_twd.c
@@ -46,8 +46,10 @@ static void twd_set_mode(enum clock_event_mode mode,
/* period set, and timer enabled in 'next_event' hook */
ctrl |= TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
break;
- case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
+ /* turn off the timer but leave the prescaler as is. */
+ break;
+ case CLOCK_EVT_MODE_UNUSED:
default:
ctrl = 0;
}
View
2 arch/arm/lib/Makefile
@@ -12,7 +12,7 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
strchr.o strrchr.o \
testchangebit.o testclearbit.o testsetbit.o \
ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
- ucmpdi2.o lib1funcs.o div64.o sha1.o \
+ ucmpdi2.o lib1funcs.o div64.o \
io-readsb.o io-writesb.o io-readsl.o io-writesl.o
mmu-y := clear_user.o copy_page.o getuser.o putuser.o
View
211 arch/arm/lib/sha1.S
@@ -1,211 +0,0 @@
-/*
- * linux/arch/arm/lib/sha1.S
- *
- * SHA transform optimized for ARM
- *
- * Copyright: (C) 2005 by Nicolas Pitre <nico@fluxnic.net>
- * Created: September 17, 2005
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * The reference implementation for this code is linux/lib/sha1.c
- */
-
-#include <linux/linkage.h>
-
- .text
-
-
-/*
- * void sha_transform(__u32 *digest, const char *in, __u32 *W)
- *
- * Note: the "in" ptr may be unaligned.
- */
-
-ENTRY(sha_transform)
-
- stmfd sp!, {r4 - r8, lr}
-
- @ for (i = 0; i < 16; i++)
- @ W[i] = be32_to_cpu(in[i]);
-
-#ifdef __ARMEB__
- mov r4, r0
- mov r0, r2
- mov r2, #64
- bl memcpy
- mov r2, r0
- mov r0, r4
-#else
- mov r3, r2
- mov lr, #16
-1: ldrb r4, [r1], #1
- ldrb r5, [r1], #1
- ldrb r6, [r1], #1
- ldrb r7, [r1], #1
- subs lr, lr, #1
- orr r5, r5, r4, lsl #8
- orr r6, r6, r5, lsl #8
- orr r7, r7, r6, lsl #8
- str r7, [r3], #4
- bne 1b
-#endif
-
- @ for (i = 0; i < 64; i++)
- @ W[i+16] = ror(W[i+13] ^ W[i+8] ^ W[i+2] ^ W[i], 31);
-
- sub r3, r2, #4
- mov lr, #64
-2: ldr r4, [r3, #4]!
- subs lr, lr, #1
- ldr r5, [r3, #8]
- ldr r6, [r3, #32]
- ldr r7, [r3, #52]
- eor r4, r4, r5
- eor r4, r4, r6
- eor r4, r4, r7
- mov r4, r4, ror #31
- str r4, [r3, #64]
- bne 2b
-
- /*
- * The SHA functions are:
- *
- * f1(B,C,D) = (D ^ (B & (C ^ D)))
- * f2(B,C,D) = (B ^ C ^ D)
- * f3(B,C,D) = ((B & C) | (D & (B | C)))
- *
- * Then the sub-blocks are processed as follows:
- *
- * A' = ror(A, 27) + f(B,C,D) + E + K + *W++
- * B' = A
- * C' = ror(B, 2)
- * D' = C
- * E' = D
- *
- * We therefore unroll each loop 5 times to avoid register shuffling.
- * Also the ror for C (and also D and E which are successivelyderived
- * from it) is applied in place to cut on an additional mov insn for
- * each round.
- */
-
- .macro sha_f1, A, B, C, D, E
- ldr r3, [r2], #4
- eor ip, \C, \D
- add \E, r1, \E, ror #2
- and ip, \B, ip, ror #2
- add \E, \E, \A, ror #27
- eor ip, ip, \D, ror #2
- add \E, \E, r3
- add \E, \E, ip
- .endm
-
- .macro sha_f2, A, B, C, D, E
- ldr r3, [r2], #4
- add \E, r1, \E, ror #2
- eor ip, \B, \C, ror #2
- add \E, \E, \A, ror #27
- eor ip, ip, \D, ror #2
- add \E, \E, r3
- add \E, \E, ip
- .endm
-
- .macro sha_f3, A, B, C, D, E
- ldr r3, [r2], #4
- add \E, r1, \E, ror #2
- orr ip, \B, \C, ror #2
- add \E, \E, \A, ror #27
- and ip, ip, \D, ror #2
- add \E, \E, r3
- and r3, \B, \C, ror #2
- orr ip, ip, r3
- add \E, \E, ip
- .endm
-
- ldmia r0, {r4 - r8}
-
- mov lr, #4
- ldr r1, .L_sha_K + 0
-
- /* adjust initial values */
- mov r6, r6, ror #30
- mov r7, r7, ror #30
- mov r8, r8, ror #30
-
-3: subs lr, lr, #1
- sha_f1 r4, r5, r6, r7, r8
- sha_f1 r8, r4, r5, r6, r7
- sha_f1 r7, r8, r4, r5, r6
- sha_f1 r6, r7, r8, r4, r5
- sha_f1 r5, r6, r7, r8, r4
- bne 3b
-
- ldr r1, .L_sha_K + 4
- mov lr, #4
-
-4: subs lr, lr, #1
- sha_f2 r4, r5, r6, r7, r8
- sha_f2 r8, r4, r5, r6, r7
- sha_f2 r7, r8, r4, r5, r6
- sha_f2 r6, r7, r8, r4, r5
- sha_f2 r5, r6, r7, r8, r4
- bne 4b
-
- ldr r1, .L_sha_K + 8
- mov lr, #4
-
-5: subs lr, lr, #1
- sha_f3 r4, r5, r6, r7, r8
- sha_f3 r8, r4, r5, r6, r7
- sha_f3 r7, r8, r4, r5, r6
- sha_f3 r6, r7, r8, r4, r5
- sha_f3 r5, r6, r7, r8, r4
- bne 5b
-
- ldr r1, .L_sha_K + 12
- mov lr, #4
-
-6: subs lr, lr, #1
- sha_f2 r4, r5, r6, r7, r8
- sha_f2 r8, r4, r5, r6, r7
- sha_f2 r7, r8, r4, r5, r6
- sha_f2 r6, r7, r8, r4, r5
- sha_f2 r5, r6, r7, r8, r4
- bne 6b
-
- ldmia r0, {r1, r2, r3, ip, lr}
- add r4, r1, r4
- add r5, r2, r5
- add r6, r3, r6, ror #2
- add r7, ip, r7, ror #2
- add r8, lr, r8, ror #2
- stmia r0, {r4 - r8}
-
- ldmfd sp!, {r4 - r8, pc}
-
-ENDPROC(sha_transform)
-
- .align 2
-.L_sha_K:
- .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
-
-
-/*
- * void sha_init(__u32 *buf)
- */
-
- .align 2
-.L_sha_initial_digest:
- .word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0
-
-ENTRY(sha_init)
-
- str lr, [sp, #-4]!
- adr r1, .L_sha_initial_digest
- ldmia r1, {r1, r2, r3, ip, lr}
- stmia r0, {r1, r2, r3, ip, lr}
- ldr pc, [sp], #4
-
-ENDPROC(sha_init)
View
8 arch/arm/mach-tegra/Kconfig 100644 → 100755
@@ -14,6 +14,7 @@ config ARCH_TEGRA_2x_SOC
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
+ select DISABLE_3D_POWERGATING
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -176,3 +177,10 @@ config TEGRA_THERMAL_THROTTLE
default y
help
Also requires enabling a temperature sensor such as NCT1008.
+
+config DISABLE_3D_POWERGATING
+ bool "Disable 3D power gate"
+ depends on ARCH_TEGRA_2x_SOC
+ help
+ This is for silicon errata of 3D power gating. By setting this
+ config, 3D power will never be gated.
View
3 arch/arm/mach-tegra/board-harmony-panel.c
@@ -245,6 +245,9 @@ static struct tegra_dc_out harmony_disp2_out = {
.enable = harmony_hdmi_enable,
.disable = harmony_hdmi_disable,
+
+ /* DVFS tables only updated up to 148.5MHz for HDMI currently */
+ .max_pclk_khz = 148500,
};
static struct tegra_dc_platform_data harmony_disp1_pdata = {
View
26 arch/arm/mach-tegra/board-harmony-pinmux.c
@@ -21,6 +21,22 @@
#include "gpio-names.h"
#include "board-harmony.h"
+#define DEFAULT_DRIVE(_name) \
+ { \
+ .pingroup = TEGRA_DRIVE_PINGROUP_##_name, \
+ .hsm = TEGRA_HSM_DISABLE, \
+ .schmitt = TEGRA_SCHMITT_ENABLE, \
+ .drive = TEGRA_DRIVE_DIV_1, \
+ .pull_down = TEGRA_PULL_31, \
+ .pull_up = TEGRA_PULL_31, \
+ .slew_rising = TEGRA_SLEW_SLOWEST, \
+ .slew_falling = TEGRA_SLEW_SLOWEST, \
+ }
+
+static __initdata struct tegra_drive_pingroup_config harmony_drive_pinmux[] = {
+ DEFAULT_DRIVE(SDIO1),
+};
+
static struct tegra_pingroup_config harmony_pinmux[] = {
{TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -107,13 +123,13 @@ static struct tegra_pingroup_config harmony_pinmux[] = {
{TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
+ {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
+ {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
+ {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
@@ -148,6 +164,8 @@ static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
{ .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
{ .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
+ { .gpio = TEGRA_GPIO_WLAN_PWR_LOW, .enable = true },
+ { .gpio = TEGRA_GPIO_WLAN_RST_LOW, .enable = true },
{ .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
{ .gpio = TEGRA_GPIO_HP_DET, .enable = true },
{ .gpio = TEGRA_GPIO_INT_MIC_EN, .enable = true },
@@ -162,6 +180,8 @@ static struct tegra_gpio_table gpio_table[] = {
void harmony_pinmux_init(void)
{
tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux));
+ tegra_drive_pinmux_config_table(harmony_drive_pinmux,
+ ARRAY_SIZE(harmony_drive_pinmux));
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
}
View
156 arch/arm/mach-tegra/board-harmony-power.c
@@ -20,6 +20,7 @@
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
#include <linux/mfd/tps6586x.h>
#include <mach/irqs.h>
@@ -61,7 +62,9 @@ static struct regulator_consumer_supply tps658621_ldo4_supply[] = {
REGULATOR_SUPPLY("vddio_sys", NULL),
};
static struct regulator_consumer_supply tps658621_ldo5_supply[] = {
- REGULATOR_SUPPLY("vcore_mmc", NULL),
+ REGULATOR_SUPPLY("vcore_mmc", "sdhci-tegra.0"),
+ REGULATOR_SUPPLY("vcore_mmc", "sdhci-tegra.1"),
+ REGULATOR_SUPPLY("vcore_mmc", "sdhci-tegra.2"),
};
static struct regulator_consumer_supply tps658621_ldo6_supply[] = {
REGULATOR_SUPPLY("avdd_vdac", NULL),
@@ -78,6 +81,102 @@ static struct regulator_consumer_supply tps658621_ldo9_supply[] = {
REGULATOR_SUPPLY("avdd_amp", NULL),
};
+/* regulator supplies power to WWAN - by default disable */
+static struct regulator_consumer_supply vdd_1v5_consumer_supply[] = {
+ REGULATOR_SUPPLY("vdd_1v5", NULL),
+};
+
+static struct regulator_init_data vdd_1v5_initdata = {
+ .consumer_supplies = vdd_1v5_consumer_supply,
+ .num_consumer_supplies = 1,
+ .constraints = {
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = 0,
+ },
+};
+
+static struct fixed_voltage_config vdd_1v5 = {
+ .supply_name = "vdd_1v5",
+ .microvolts = 1500000, /* Enable 1.5V */
+ .gpio = TPS_GPIO_EN_1V5, /* GPIO BASE+0 */
+ .startup_delay = 0,
+ .enable_high = 0,
+ .enabled_at_boot = 0,
+ .init_data = &vdd_1v5_initdata,
+};
+
+/* regulator supplies power to WLAN - enable here, to satisfy SDIO probing */
+static struct regulator_consumer_supply vdd_1v2_consumer_supply[] = {
+ REGULATOR_SUPPLY("vdd_1v2", NULL),
+};
+
+static struct regulator_init_data vdd_1v2_initdata = {
+ .consumer_supplies = vdd_1v2_consumer_supply,
+ .num_consumer_supplies = 1,
+ .constraints = {
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = 1,
+ },
+};
+
+static struct fixed_voltage_config vdd_1v2 = {
+ .supply_name = "vdd_1v2",
+ .microvolts = 1200000, /* Enable 1.2V */
+ .gpio = TPS_GPIO_EN_1V2, /* GPIO BASE+1 */
+ .startup_delay = 0,
+ .enable_high = 1,
+ .enabled_at_boot = 1,
+ .init_data = &vdd_1v2_initdata,
+};
+
+/* regulator supplies power to PLL - enable here */
+static struct regulator_consumer_supply vdd_1v05_consumer_supply[] = {
+ REGULATOR_SUPPLY("vdd_1v05", NULL),
+};
+
+static struct regulator_init_data vdd_1v05_initdata = {
+ .consumer_supplies = vdd_1v05_consumer_supply,
+ .num_consumer_supplies = 1,
+ .constraints = {
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = 1,
+ },
+};
+
+static struct fixed_voltage_config vdd_1v05 = {
+ .supply_name = "vdd_1v05",
+ .microvolts = 1050000, /* Enable 1.05V */
+ .gpio = TPS_GPIO_EN_1V05, /* BASE+2 */
+ .startup_delay = 0,
+ .enable_high = 1,
+ .enabled_at_boot = 0,
+ .init_data = &vdd_1v05_initdata,
+};
+
+/* mode pin for 1.05V regulator - enable here */
+static struct regulator_consumer_supply vdd_1v05_mode_consumer_supply[] = {
+ REGULATOR_SUPPLY("vdd_1v05_mode", NULL),
+};
+
+static struct regulator_init_data vdd_1v05_mode_initdata = {
+ .consumer_supplies = vdd_1v05_mode_consumer_supply,
+ .num_consumer_supplies = 1,
+ .constraints = {
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ .always_on = 1,
+ },
+};
+
+static struct fixed_voltage_config vdd_1v05_mode = {
+ .supply_name = "vdd_1v05_mode",
+ .microvolts = 1050000, /* Enable 1.05V */
+ .gpio = TPS_GPIO_MODE_1V05, /* BASE+3 */
+ .startup_delay = 0,
+ .enable_high = 1,
+ .enabled_at_boot = 0,
+ .init_data = &vdd_1v05_mode_initdata,
+};
+
#define REGULATOR_INIT(_id, _minmv, _maxmv, _always_on) \
static struct regulator_init_data _id##_data = { \
.constraints = { \
@@ -101,21 +200,32 @@ REGULATOR_INIT(sm2, 3000, 4550, true);
REGULATOR_INIT(ldo0, 1250, 3300, false);
REGULATOR_INIT(ldo1, 725, 1500, false);
REGULATOR_INIT(ldo2, 725, 1500, false);
-REGULATOR_INIT(ldo3, 1250, 3300, false);
+REGULATOR_INIT(ldo3, 3300, 3300, true);
REGULATOR_INIT(ldo4, 1700, 2475, false);
REGULATOR_INIT(ldo5, 1250, 3300, false);
REGULATOR_INIT(ldo6, 1250, 3300, false);
REGULATOR_INIT(ldo7, 1250, 3300, false);
REGULATOR_INIT(ldo8, 1250, 3300, false);
REGULATOR_INIT(ldo9, 1250, 3300, false);
+static struct tps6586x_rtc_platform_data rtc_data = {
+ .irq = TEGRA_NR_IRQS + TPS6586X_INT_RTC_ALM1,
+};
+
#define TPS_REG(_id, _data) \
{ \
.id = TPS6586X_ID_##_id, \
.name = "tps6586x-regulator", \
.platform_data = _data, \
}
+#define TPS_GPIO_FIXED_REG(_id, _data) \
+ { \
+ .id = _id, \
+ .name = "reg-fixed-voltage", \
+ .platform_data = _data, \
+ }
+
static struct tps6586x_subdev_info tps_devs[] = {
TPS_REG(SM_0, &sm0_data),
TPS_REG(SM_1, &sm1_data),
@@ -130,6 +240,15 @@ static struct tps6586x_subdev_info tps_devs[] = {
TPS_REG(LDO_7, &ldo7_data),
TPS_REG(LDO_8, &ldo8_data),
TPS_REG(LDO_9, &ldo9_data),
+ TPS_GPIO_FIXED_REG(0, &vdd_1v5),
+ TPS_GPIO_FIXED_REG(1, &vdd_1v2),
+ TPS_GPIO_FIXED_REG(2, &vdd_1v05),
+ TPS_GPIO_FIXED_REG(3, &vdd_1v05_mode),
+ {
+ .id = 0,
+ .name = "tps6586x-rtc",
+ .platform_data = &rtc_data,
+ },
};
static struct tps6586x_platform_data tps_platform = {
@@ -163,36 +282,15 @@ int __init harmony_regulator_init(void)
return 0;
}
-static void reg_off(const char *reg)
+static void harmony_power_off(void)
{
- int rc;
- struct regulator *regulator;
-
- regulator = regulator_get(NULL, reg);
+ int ret;
- if (IS_ERR(regulator)) {
- pr_err("%s: regulator_get returned %ld\n", __func__,
- PTR_ERR(regulator));
- return;
- }
+ ret = tps6586x_power_off();
+ if (ret)
+ pr_err("Failed to power off\n");
- rc = regulator_force_disable(regulator);
- if (rc)
- pr_err("%s: regulator_force_disable returned %d\n", __func__,
- rc);
- regulator_put(regulator);
-}
-
-static void harmony_power_off(void)
-{
- reg_off("vdd_sm2");
- reg_off("vdd_core");
- reg_off("vdd_cpu");
- local_irq_disable();
- while (1) {
- dsb();
- __asm__ ("wfi");
- }
+ while(1);
}
int __init harmony_power_init(void)
View
35 arch/arm/mach-tegra/board-harmony.c
@@ -39,6 +39,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/setup.h>
+#include <asm/delay.h>
#include <mach/harmony_audio.h>
#include <mach/iomap.h>
@@ -420,10 +421,6 @@ static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
{ "ide", "clk_m", 12000000, false},
{ "ndflash", "clk_m", 108000000, true},
{ "vfir", "clk_m", 12000000, false},
- { "sdmmc1", "clk_m", 48000000, true},
- { "sdmmc2", "clk_m", 48000000, true},
- { "sdmmc3", "clk_m", 48000000, false},
- { "sdmmc4", "clk_m", 48000000, true},
{ "la", "clk_m", 12000000, false},
{ "owr", "clk_m", 12000000, false},
{ "nor", "clk_m", 12000000, false},
@@ -484,6 +481,36 @@ static struct tegra_suspend_platform_data harmony_suspend = {
.suspend_mode = TEGRA_SUSPEND_LP0,
};
+static int __init harmony_wifi_init(void)
+{
+ int gpio_pwr, gpio_rst;
+
+ if (!machine_is_harmony())
+ return 0;
+
+ /* WLAN - Power up (low) and Reset (low) */
+ gpio_pwr = gpio_request(TEGRA_GPIO_WLAN_PWR_LOW, "wlan_pwr");
+ gpio_rst = gpio_request(TEGRA_GPIO_WLAN_RST_LOW, "wlan_rst");
+ if (gpio_pwr < 0 || gpio_rst < 0)
+ pr_warning("Unable to get gpio for WLAN Power and Reset\n");
+ else {
+ /* toggle in this order as per spec */
+ gpio_direction_output(TEGRA_GPIO_WLAN_PWR_LOW, 0);
+ gpio_direction_output(TEGRA_GPIO_WLAN_RST_LOW, 0);
+ udelay(5);
+ gpio_direction_output(TEGRA_GPIO_WLAN_PWR_LOW, 1);
+ gpio_direction_output(TEGRA_GPIO_WLAN_RST_LOW, 1);
+ }
+
+ return 0;
+}
+/* make harmony_wifi_init to be invoked at subsys_initcall_sync
+ * to ensure the required regulators (LDO3 supply of external
+ * PMU and 1.2V regulator) are properly enabled, and mmc driver
+ * has not yet probed for a device on SDIO bus
+ */
+subsys_initcall_sync(harmony_wifi_init);
+
static void __init tegra_harmony_init(void)
{
tegra_init_suspend(&harmony_suspend);
View
10 arch/arm/mach-tegra/board-harmony.h
@@ -20,6 +20,12 @@
#define HARMONY_GPIO_TPS6586X(_x_) (TEGRA_NR_GPIOS + (_x_))
#define HARMONY_GPIO_WM8903(_x_) (HARMONY_GPIO_TPS6586X(4) + (_x_))
+/* fixed voltage regulator enable/mode gpios */
+#define TPS_GPIO_EN_1V5 (HARMONY_GPIO_TPS6586X(0))
+#define TPS_GPIO_EN_1V2 (HARMONY_GPIO_TPS6586X(1))
+#define TPS_GPIO_EN_1V05 (HARMONY_GPIO_TPS6586X(2))
+#define TPS_GPIO_MODE_1V05 (HARMONY_GPIO_TPS6586X(3))
+
#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PT3
@@ -41,6 +47,10 @@
#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2
+/* WLAN pwr and reset gpio */
+#define TEGRA_GPIO_WLAN_PWR_LOW TEGRA_GPIO_PK5
+#define TEGRA_GPIO_WLAN_RST_LOW TEGRA_GPIO_PK6
+
void harmony_pinmux_init(void);
int harmony_panel_init(void);
int harmony_power_init(void);
View
14 arch/arm/mach-tegra/board-seaboard-memory.c
@@ -743,12 +743,22 @@ struct tegra_board_emc_table aebl_emc[] = {
{
.table = aebl_emc_tables_Micron_380Mhz,
.table_size = ARRAY_SIZE(aebl_emc_tables_Micron_380Mhz),
- .name = "Mircron 380MHz",
+ .name = "0: Micron 380MHz",
},
{
.table = aebl_emc_tables_Hynix_380Mhz,
.table_size = ARRAY_SIZE(aebl_emc_tables_Hynix_380Mhz),
- .name = "Hynix 380MHz",
+ .name = "1: Hynix 380MHz",
+ },
+ {
+ .table = aebl_emc_tables_Micron_380Mhz,
+ .table_size = ARRAY_SIZE(aebl_emc_tables_Micron_380Mhz),
+ .name = "2: Micron 380MHz",
+ },
+ {
+ .table = aebl_emc_tables_Hynix_380Mhz,
+ .table_size = ARRAY_SIZE(aebl_emc_tables_Hynix_380Mhz),
+ .name = "3: Hynix 380MHz",
},
};
View
144 arch/arm/mach-tegra/board-seaboard-panel.c
@@ -36,6 +36,39 @@
#include "gpio-names.h"
#include "board.h"
#include "board-seaboard.h"
+#include "power.h"
+
+static int panel_is_enabled;
+static u64 rtc_ms_at_panel_off;
+/**
+ * struct panel_power_sequence_timing - Required timings for panel
+ * power sequence.
+ *
+ * en_lcdvdd_en_data_ms: delay between panel_vdd-rising and data-rising
+ * en_lvds_en_blvdd_ms: delay between data-rising and backlight_vdd-rising
+ * en_blvdd_en_pwm_ms: delay between backlight_vdd-rising and pwm-rising
+ * en_pwm_en_bl_ms: delay between pwm-rising and backlight_en-rising
+ * dis_lvds_dis_lcdvdd_ms: delay between data-falling and panel_vdd-falling
+ * dis_bl_dis_lvds_ms: delay between backlight_en-falling and data-falling
+ * dis_pwm_dis_blvdd_ms: delay between pwm-falling and backlight_vdd-falling
+ * lcdvdd_off_on_ms: delay between turning panel_vdd off and on
+ */
+struct panel_power_sequence_timing {
+ int en_lcdvdd_en_data_ms;
+ int en_lvds_en_blvdd_ms;
+ int en_blvdd_en_pwm_ms;
+ int en_pwm_en_bl_ms;
+ int dis_lvds_dis_lcdvdd_ms;
+ int dis_bl_dis_lvds_ms;
+ int dis_pwm_dis_blvdd_ms;
+ unsigned int lcdvdd_off_on_ms;
+};
+
+static const struct panel_power_sequence_timing panel_timings_kaen_aebl = {
+ 4, 203, 20, 20, 4, 203, 20, 500,
+};
+
+static struct panel_power_sequence_timing panel_timings;
static int seaboard_backlight_init(struct device *dev) {
int ret;
@@ -48,6 +81,8 @@ static int seaboard_backlight_init(struct device *dev) {
if (ret < 0)
gpio_free(TEGRA_GPIO_BACKLIGHT);
+ gpio_export(TEGRA_GPIO_BACKLIGHT, 0);
+
return ret;
};
@@ -56,14 +91,67 @@ static void seaboard_backlight_exit(struct device *dev) {
gpio_free(TEGRA_GPIO_BACKLIGHT);
}
+static void tegra_msleep(int ms)
+{
+ if (ms) {
+ if (ms<20)
+ usleep_range(ms*1000, 20000);
+ else
+ msleep(ms);
+ }
+}
+
static int seaboard_backlight_notify(struct device *unused, int brightness)
{
- gpio_set_value(TEGRA_GPIO_EN_VDD_PNL, !!brightness);
- gpio_set_value(TEGRA_GPIO_LVDS_SHUTDOWN, !!brightness);
- gpio_set_value(TEGRA_GPIO_BACKLIGHT, !!brightness);
+ u64 time_panel_was_off;
+
+ if (panel_is_enabled && !brightness) {
+ gpio_set_value(TEGRA_GPIO_BACKLIGHT, 0);
+ tegra_msleep(panel_timings.dis_bl_dis_lvds_ms);
+
+ gpio_set_value(TEGRA_GPIO_LVDS_SHUTDOWN, 0);
+ tegra_msleep(panel_timings.dis_lvds_dis_lcdvdd_ms);
+
+ gpio_set_value(TEGRA_GPIO_EN_VDD_PNL, 0);
+ } else if (!panel_is_enabled && brightness) {
+ time_panel_was_off = tegra_rtc_read_ms() - rtc_ms_at_panel_off;
+ if (time_panel_was_off < panel_timings.lcdvdd_off_on_ms ) {
+ /*
+ * According to panel specification, the delay should
+ * be at least 500ms between panel_vdd OFF and ON
+ * to aviod abnormal display.
+ */
+ tegra_msleep(panel_timings.lcdvdd_off_on_ms -
+ time_panel_was_off);
+ }
+
+ gpio_set_value(TEGRA_GPIO_EN_VDD_PNL, 1);
+ tegra_msleep(panel_timings.en_lcdvdd_en_data_ms);
+
+ gpio_set_value(TEGRA_GPIO_LVDS_SHUTDOWN, 1);
+ tegra_msleep(panel_timings.en_lvds_en_blvdd_ms);
+
+ gpio_set_value(SEABOARD_GPIO_BACKLIGHT_VDD, 1);
+ tegra_msleep(panel_timings.en_blvdd_en_pwm_ms);
+ }
+
return brightness;
}
+static void seaboard_bl_notify_after(struct device *unused, int brightness)
+{
+ if (panel_is_enabled && !brightness) {
+ tegra_msleep(panel_timings.dis_pwm_dis_blvdd_ms);
+ gpio_set_value(SEABOARD_GPIO_BACKLIGHT_VDD, 0);
+ rtc_ms_at_panel_off = tegra_rtc_read_ms();
+ panel_is_enabled = 0;
+ } else if (!panel_is_enabled && brightness) {
+ tegra_msleep(panel_timings.en_pwm_en_bl_ms);
+ gpio_set_value(TEGRA_GPIO_BACKLIGHT, 1);
+ panel_is_enabled = 1;
+ }
+}
+
static int seaboard_disp1_check_fb(struct device *dev, struct fb_info *info);
static struct platform_pwm_backlight_data seaboard_backlight_data = {
@@ -74,6 +162,7 @@ static struct platform_pwm_backlight_data seaboard_backlight_data = {
.init = seaboard_backlight_init,
.exit = seaboard_backlight_exit,
.notify = seaboard_backlight_notify,
+ .notify_after = seaboard_bl_notify_after,
/* Only toggle backlight on fb blank notifications for disp1 */
.check_fb = seaboard_disp1_check_fb,
};
@@ -86,18 +175,6 @@ static struct platform_device seaboard_backlight_device = {
},
};
-static int seaboard_panel_enable(void)
-{
- gpio_set_value(TEGRA_GPIO_LVDS_SHUTDOWN, 1);
- return 0;
-}
-
-static int seaboard_panel_disable(void)
-{
- gpio_set_value(TEGRA_GPIO_LVDS_SHUTDOWN, 0);
- return 0;
-}
-
static int seaboard_set_hdmi_power(bool enable)
{
static struct {
@@ -250,17 +327,17 @@ static struct tegra_dc_mode arthur_panel_modes[] = {
static struct tegra_dc_mode asymptote_panel_modes[] = {
{
- .pclk = 62200000,
- .h_ref_to_sync = 16,
+ .pclk = 100030000,
+ .h_ref_to_sync = 11,
.v_ref_to_sync = 1,
- .h_sync_width = 58,
- .v_sync_width = 40,
- .h_back_porch = 58,
- .v_back_porch = 20,
+ .h_sync_width = 320,
+ .v_sync_width = 10,
+ .h_back_porch = 480,
+ .v_back_porch = 6,
.h_active = 1024,
.v_active = 768,
- .h_front_porch = 58,
- .v_front_porch = 1,
+ .h_front_porch = 260,
+ .v_front_porch = 16,
},
};
@@ -348,9 +425,6 @@ static struct tegra_dc_out seaboard_disp1_out = {
.modes = seaboard_panel_modes,
.n_modes = ARRAY_SIZE(seaboard_panel_modes),
-
- .enable = seaboard_panel_enable,
- .disable = seaboard_panel_disable,
};
static struct tegra_dc_out seaboard_disp2_out = {
@@ -367,6 +441,9 @@ static struct tegra_dc_out seaboard_disp2_out = {
.disable = seaboard_hdmi_disable,
.hotplug_init = seaboard_hdmi_hotplug_init,
.postsuspend = seaboard_hdmi_postsuspend,
+
+ /* DVFS tables only updated up to 148.5MHz for HDMI currently */
+ .max_pclk_khz = 148500,
};
static struct tegra_dc_platform_data seaboard_disp1_pdata = {
@@ -457,9 +534,12 @@ static void __init seaboard_common_panel_gpio_init(void)
gpio_request(TEGRA_GPIO_LVDS_SHUTDOWN, "lvds_shdn");
gpio_direction_output(TEGRA_GPIO_LVDS_SHUTDOWN, 1);
+ gpio_export(TEGRA_GPIO_LVDS_SHUTDOWN, 0);
gpio_request(TEGRA_GPIO_HDMI_HPD, "hdmi_hpd");
gpio_direction_input(TEGRA_GPIO_HDMI_HPD);
+
+ panel_is_enabled = 1;
}
static void __init seaboard_panel_gpio_init(void)
@@ -510,6 +590,8 @@ static void __init fix_framebuffer_carveouts(void) {
int __init seaboard_panel_init(void)
{
+ if (machine_is_aebl() || machine_is_kaen())
+ panel_timings = panel_timings_kaen_aebl;
seaboard_panel_gpio_init();
return seaboard_panel_register_devices();
}
@@ -545,6 +627,7 @@ int __init asymptote_panel_init(void)
}
#endif
+<<<<<<< HEAD
#ifdef CONFIG_MACH_PICASSO
int __init picasso_panel_init(void)
{
@@ -574,3 +657,12 @@ int __init tf101_panel_init(void)
return seaboard_panel_register_devices();
}
#endif
+
+#ifdef CONFIG_MACH_KAEN
+int __init kaen_panel_init(void)
+{
+ /* Run kaen's panel backlight at around 210Hz. */
+ seaboard_backlight_data.pwm_period_ns = 4750000;
+ return seaboard_panel_init();
+}
+#endif
View
3 arch/arm/mach-tegra/board-seaboard-pinmux.c
@@ -161,7 +161,7 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = {
{TEGRA_PINGROUP_SDD, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
- {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
+ {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
@@ -203,6 +203,7 @@ static struct tegra_gpio_table common_gpio_table[] = {
{ .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
{ .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
{ .gpio = TEGRA_GPIO_USB1, .enable = true },
+ { .gpio = TEGRA_GPIO_USB3, .enable = true },
{ .gpio = TEGRA_GPIO_NCT1008_THERM2_IRQ,.enable = true },
{ .gpio = TEGRA_GPIO_WLAN_POWER, .enable = true },
{ .gpio = TEGRA_GPIO_BACKLIGHT, .enable = true },
View
73 arch/arm/mach-tegra/board-seaboard-power.c
@@ -25,6 +25,7 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <mach/iomap.h>
+#include <mach/powergate.h>
#include <linux/err.h>
#include <asm/mach-types.h>
@@ -128,7 +129,15 @@ static struct fixed_voltage_config vdd_1v5 = {
.init_data = &vdd_1v5_initdata,
};
-#define REGULATOR_INIT(_id, _minmv, _maxmv, _always_on) \
+static struct tps6586x_settings sm0_config = {
+ .slew_rate = TPS6586X_SLEW_RATE_3520UV | TPS6586X_SLEW_RATE_SET,
+};
+
+static struct tps6586x_settings sm1_config = {
+ .slew_rate = TPS6586X_SLEW_RATE_3520UV | TPS6586X_SLEW_RATE_SET,
+};
+
+#define REGULATOR_INIT(_id, _minmv, _maxmv, _always_on, config) \
{ \
.constraints = { \
.min_uV = (_minmv)*1000, \
@@ -143,21 +152,22 @@ static struct fixed_voltage_config vdd_1v5 = {
}, \
.num_consumer_supplies = ARRAY_SIZE(tps658621_##_id##_supply),\
.consumer_supplies = tps658621_##_id##_supply, \
+ .driver_data = config, \
}
-static struct regulator_init_data sm0_data = REGULATOR_INIT(sm0, 950, 1300, true);
-static struct regulator_init_data sm1_data = REGULATOR_INIT(sm1, 750, 1275, true);
-static struct regulator_init_data sm2_data = REGULATOR_INIT(sm2, 3000, 4550, true);
-static struct regulator_init_data ldo0_data = REGULATOR_INIT(ldo0, 1250, 3300, false);
-static struct regulator_init_data ldo1_data = REGULATOR_INIT(ldo1, 1100, 1100, true);
-static struct regulator_init_data ldo2_data = REGULATOR_INIT(ldo2, 900, 1300, false);
-static struct regulator_init_data ldo3_data = REGULATOR_INIT(ldo3, 3300, 3300, true);
-static struct regulator_init_data ldo4_data = REGULATOR_INIT(ldo4, 1800, 1800, true);
-static struct regulator_init_data ldo5_data = REGULATOR_INIT(ldo5, 2850, 3300, true);
-static struct regulator_init_data ldo6_data = REGULATOR_INIT(ldo6, 1800, 1800, false);
-static struct regulator_init_data ldo7_data = REGULATOR_INIT(ldo7, 3300, 3300, false);
-static struct regulator_init_data ldo8_data = REGULATOR_INIT(ldo8, 1800, 1800, false);
-static struct regulator_init_data ldo9_data = REGULATOR_INIT(ldo9, 2850, 2850, true);
+static struct regulator_init_data sm0_data = REGULATOR_INIT(sm0, 950, 1300, true, &sm0_config);
+static struct regulator_init_data sm1_data = REGULATOR_INIT(sm1, 750, 1275, true, &sm1_config);
+static struct regulator_init_data sm2_data = REGULATOR_INIT(sm2, 3000, 4550, true, NULL);
+static struct regulator_init_data ldo0_data = REGULATOR_INIT(ldo0, 1250, 3300, false, NULL);
+static struct regulator_init_data ldo1_data = REGULATOR_INIT(ldo1, 1100, 1100, true, NULL);
+static struct regulator_init_data ldo2_data = REGULATOR_INIT(ldo2, 900, 1300, false, NULL);
+static struct regulator_init_data ldo3_data = REGULATOR_INIT(ldo3, 3300, 3300, true, NULL);
+static struct regulator_init_data ldo4_data = REGULATOR_INIT(ldo4, 1800, 1800, true, NULL);
+static struct regulator_init_data ldo5_data = REGULATOR_INIT(ldo5, 2850, 3300, true, NULL);
+static struct regulator_init_data ldo6_data = REGULATOR_INIT(ldo6, 1800, 1800, false, NULL);
+static struct regulator_init_data ldo7_data = REGULATOR_INIT(ldo7, 3300, 3300, false, NULL);
+static struct regulator_init_data ldo8_data = REGULATOR_INIT(ldo8, 1800, 1800, false, NULL);
+static struct regulator_init_data ldo9_data = REGULATOR_INIT(ldo9, 2850, 2850, true, NULL);
static struct tps6586x_rtc_platform_data rtc_data = {
.irq = TEGRA_NR_IRQS + TPS6586X_INT_RTC_ALM1,
@@ -295,36 +305,15 @@ int __init seaboard_ac_power_init(void)
return err;
}
-static void reg_off(const char *reg)
+static void seaboard_power_off(void)
{
- int rc;
- struct regulator *regulator;
-
- regulator = regulator_get(NULL, reg);
+ int ret;
- if (IS_ERR(regulator)) {
- pr_err("%s: regulator_get returned %ld\n", __func__,
- PTR_ERR(regulator));
- return;
- }
+ ret = tps6586x_power_off();
+ if (ret)
+ pr_err("Failed to power off\n");
- rc = regulator_force_disable(regulator);
- if (rc)
- pr_err("%s: regulator_force_disable returned %d\n", __func__,
- rc);
- regulator_put(regulator);
-}
-
-static void seaboard_power_off(void)
-{
- reg_off("vdd_sm2");
- reg_off("vdd_core");
- reg_off("vdd_cpu");
- local_irq_disable();
- while (1) {
- dsb();
- __asm__ ("wfi");
- }
+ while(1);
}
int __init seaboard_power_init(void)
@@ -344,5 +333,7 @@ int __init seaboard_power_init(void)
pm_power_off = seaboard_power_off;
+ tegra_powergate_power_off(TEGRA_POWERGATE_PCIE);
+
return 0;
}
View
203 arch/arm/mach-tegra/board-seaboard.c
@@ -85,82 +85,17 @@ static struct platform_device debug_uart = {
static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
/* name parent rate enabled */
- { "clk_m", NULL, 12000000, true},
- { "pll_c", "clk_m", 600000000, true},
- { "pll_c_out1", "pll_c", 108000000, true},
- { "3d", "pll_c", 300000000, false},
- { "2d", "pll_c", 300000000, false},
- { "vi", "pll_c", 150000000, true},
- { "vi_sensor", "pll_c", 24000000, false},
- { "epp", "pll_c", 300000000, false},
- { "mpe", "pll_c", 100000000, false},
- { "vde", "pll_c", 240000000, false},
- { "pll_p", "clk_m", 216000000, true},
- { "pll_p_out1", "pll_p", 28800000, true},
+ { "pll_p_out4", "pll_p", 24000000, true},
{ "pll_a", "pll_p_out1", 56448000, true},
{ "pll_a_out0", "pll_a", 11289600, true},
{ "cdev1", "pll_a_out0", 11289600, true},
{ "i2s1", "pll_a_out0", 11289600, false},
{ "audio", "pll_a_out0", 11289600, false},
{ "audio_2x", "audio", 22579200, false},
- { "pll_p_out2", "pll_p", 48000000, true},
- { "pll_p_out3", "pll_p", 72000000, true},
- { "i2c1_i2c", "pll_p_out3", 72000000, true},
- { "i2c2_i2c", "pll_p_out3", 72000000, true},
- { "i2c3_i2c", "pll_p_out3", 72000000, true},
- { "dvc_i2c", "pll_p_out3", 72000000, true},
- { "csi", "pll_p_out3", 72000000, false},
- { "pll_p_out4", "pll_p", 24000000, true},
- { "hclk", "sclk", 108000000, true},
- { "pclk", "hclk", 54000000, true},
- { "spdif_in", "pll_p", 36000000, false},
- { "csite", "pll_p", 144000000, true},
- { "host1x", "pll_p", 144000000, false},
- { "pll_d", "clk_m", 1000000, false},
- { "pll_d_out0", "pll_d", 500000, false},
- { "dsi", "pll_d", 1000000, false},
- { "pll_u", "clk_m", 480000000, true},
- { "clk_d", "clk_m", 24000000, true},
- { "timer", "clk_m", 12000000, true},
- { "i2s2", "clk_m", 12000000, false},
{ "spdif_out", "pll_a_out0", 11289600, false},
- { "spi", "clk_m", 12000000, false},
- { "xio", "clk_m", 12000000, false},
- { "twc", "clk_m", 12000000, false},
- { "sbc1", "clk_m", 12000000, false},
- { "sbc2", "clk_m", 12000000, false},
- { "sbc3", "clk_m", 12000000, false},
- { "sbc4", "clk_m", 12000000, false},
- { "ide", "clk_m", 12000000, false},