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ath79: fix pinmux reg value for QCA956x

The range of pinmux reg property "<0x1804002c 0x40>" for QCA956x SoC
does not includes GPIO_FUNCTION register.

If the device uses "&jtag_disable_pins", this causes the following

[    1.982937] pinctrl-single 1804002c.pinmux: mux offset out of range: 0x40 (0x40)
[    1.990622] pinctrl-single 1804002c.pinmux: could not add functions for pinmux_jtag_disable_pins 64x

Signed-off-by: INAGAKI Hiroshi <>
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musashino205 authored and chunkeey committed Dec 8, 2018
1 parent 212f2a6 commit 10a54e144252be25106f36ad75f924b7b3c53255
Showing with 1 addition and 1 deletion.
  1. +1 −1 target/linux/ath79/dts/qca956x.dtsi
@@ -71,7 +71,7 @@
pinmux: pinmux@1804002c {
compatible = "pinctrl-single";

reg = <0x1804002c 0x40>;
reg = <0x1804002c 0x44>;

#size-cells = <0>;

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