From 4d7e3fd6b4b35b3daac0b05cd492e8d278b1a0e5 Mon Sep 17 00:00:00 2001 From: Marvin Mager <99667992+mvnmgrx@users.noreply.github.com> Date: Wed, 29 Jun 2022 23:35:16 +0200 Subject: [PATCH 1/5] Footprints: Fixed line breaks in Pad().to_sexpr() --- src/kiutils/footprint.py | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/src/kiutils/footprint.py b/src/kiutils/footprint.py index e4188b2..860993a 100644 --- a/src/kiutils/footprint.py +++ b/src/kiutils/footprint.py @@ -518,7 +518,7 @@ def to_sexpr(self, indent: int = 2, newline: bool = True) -> str: """ indents = ' '*indent endline = '\n' if newline else '' - champferFound, marginFound = False, False + champferFound, marginFound, schematicSymbolAssociated = False, False, False c, cr, smm, spm, spmr, cl, zc, tw, tg = '', '', '', '', '', '', '', '', '' layers = ' (layers' @@ -539,10 +539,15 @@ def to_sexpr(self, indent: int = 2, newline: bool = True) -> str: kel = ' (keep_end_layers)' if self.keepEndLayers else '' rrr = f' (roundrect_rratio {self.roundrectRatio})' if self.roundrectRatio is not None else '' - # A net in a pad forces a line-break in the board file - net = f'\n{indents} {self.net.to_sexpr()}' if self.net is not None else '' + net = f' {self.net.to_sexpr()}' if self.net is not None else '' pf = f' (pinfunction "{dequote(self.pinFunction)}")' if self.pinFunction is not None else '' pt = f' (pintype "{dequote(self.pinType)}")' if self.pinType is not None else '' + + # Check if a schematic symbol is associated with this footprint. This is usually set, if the + # footprint is used in a board file. + if net != '' or pf != '' or pt != '': + schematicSymbolAssociated = True + tstamp = f' (tstamp {self.tstamp})' if self.tstamp is not None else '' if len(self.chamfer) > 0: @@ -590,12 +595,16 @@ def to_sexpr(self, indent: int = 2, newline: bool = True) -> str: expression = f'{indents}(pad "{dequote(str(self.number))}" {self.type} {self.shape}{locked} {position} (size {self.size.X} {self.size.Y}){drill}{ppty}{layers}{rul}{kel}{rrr}' if champferFound: + # Only one whitespace here as all temporary strings have at least one leading whitespace expression += f'\n{indents} {cr}{c}' - expression += f'{net}{pf}{pt}' + if self.dieLength is not None: expression += f'\n{indents} (die_length {self.dieLength})' - if marginFound: - expression += f'\n{indents} {smm}{spm}{spmr}{cl}{zc}{tw}{tg}' + + if marginFound or schematicSymbolAssociated: + # Only one whitespace here as all temporary strings have at least one leading whitespace + expression += f'\n{indents} {net}{pf}{pt}{smm}{spm}{spmr}{cl}{zc}{tw}{tg}' + if self.customPadOptions is not None: expression += f'\n{indents} {self.customPadOptions.to_sexpr()}' From b6563f5a417c50f4f33f3b9e0a17dd474650df6a Mon Sep 17 00:00:00 2001 From: Marvin Mager <99667992+mvnmgrx@users.noreply.github.com> Date: Wed, 29 Jun 2022 23:35:58 +0200 Subject: [PATCH 2/5] Tests: Changed success output name --- test.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test.py b/test.py index b05686e..1756c3c 100644 --- a/test.py +++ b/test.py @@ -158,6 +158,6 @@ def assert_equality(cls, test_file: str): print("\n---------------------\n") if global_passed: - print("✅ KiTools tests done, all green ✅") + print("✅ KiUtils tests done, all green ✅") else: - print("❌❌ KiTools tests done, but some tests failed! Check 'test.log' for more information ❌❌") \ No newline at end of file + print("❌❌ KiUtils tests done, but some tests failed! Check 'test.log' for more information ❌❌") \ No newline at end of file From 485842e9a55c7c02dbbc7bc11c286b426edb100c Mon Sep 17 00:00:00 2001 From: Marvin Mager <99667992+mvnmgrx@users.noreply.github.com> Date: Wed, 29 Jun 2022 23:49:08 +0200 Subject: [PATCH 3/5] Tests: Added test case for broken pad line breaks --- test.py | 1 + tests/test_fp_pad_newlines.kicad_mod | 97 ++++++++++++++++++++++++++++ 2 files changed, 98 insertions(+) create mode 100644 tests/test_fp_pad_newlines.kicad_mod diff --git a/test.py b/test.py index 1756c3c..0d52575 100644 --- a/test.py +++ b/test.py @@ -154,6 +154,7 @@ def assert_equality(cls, test_file: str): assert_equality(WorkSheet, path.join(tests_path, 'test_wks_all.kicad_wks')) assert_equality(DesignRules, path.join(tests_path, 'test_dru_all.kicad_dru')) assert_equality(Board, path.join(tests_path, 'test_arcs.kicad_pcb')) + assert_equality(Footprint, path.join(tests_path, 'test_fp_pad_newlines.kicad_mod')) print("\n---------------------\n") diff --git a/tests/test_fp_pad_newlines.kicad_mod b/tests/test_fp_pad_newlines.kicad_mod new file mode 100644 index 0000000..e10b428 --- /dev/null +++ b/tests/test_fp_pad_newlines.kicad_mod @@ -0,0 +1,97 @@ +(footprint "hSOC_DFN_QFN:QFN-20_EP_4x4_Pitch0.5mm" + (layer "F.Cu") + (tedit 62B45F33) (tstamp 1cdb27c8-e9b7-413d-a6e6-8ef8360142f4) + (at 179.5 112.02 90) + (property "Hersteller" "Texas Instruments") + (path "/734873a3-b8ea-4cad-829d-8172e8b13cae/5e792133-030d-439a-b4b8-8e56d81fd968") + (attr smd) + (fp_text reference "IC503" (at 0 -3.5 90) (layer "F.SilkS") hide + (effects (font (size 0.75 0.6) (thickness 0.12))) + (tstamp 2780c17a-23cc-4d6f-be7e-01bb3e085eb8) + ) + (fp_text value "TPS386000" (at 0 3.5 90) (layer "F.Fab") hide + (effects (font (size 0.75 0.6) (thickness 0.12))) + (tstamp aa57c053-4d35-4346-a3d7-4a863d13e85d) + ) + (fp_text user "${REFERENCE}" (at 4.72 -0.85 unlocked) (layer "F.Fab") + (effects (font (size 0.75 0.6) (thickness 0.12))) + (tstamp 02a37157-7ae3-4605-983d-fe3e3c753836) + ) + (fp_line (start -1.5 2.15) (end -2.15 2.15) (layer "F.SilkS") (width 0.12) (tstamp 4c6c330c-cc6b-4d8d-abd2-3c1da6527c9c)) + (fp_line (start 2.15 2.15) (end 2.15 1.5) (layer "F.SilkS") (width 0.12) (tstamp 7e026e92-de50-4cc6-90ab-760ef28ab9f4)) + (fp_line (start 1.5 -2.15) (end 2.15 -2.15) (layer "F.SilkS") (width 0.12) (tstamp 81b0d9d3-c407-4a3b-8d34-e3e1776be096)) + (fp_line (start -2.15 2.15) (end -2.15 1.5) (layer "F.SilkS") (width 0.12) (tstamp c6b0c515-b1d7-4924-8d81-21bd17dd19bf)) + (fp_line (start 2.15 -2.15) (end 2.15 -1.5) (layer "F.SilkS") (width 0.12) (tstamp cdecef17-5c1f-4a1b-ae1b-8cb458520405)) + (fp_line (start 1.5 2.15) (end 2.15 2.15) (layer "F.SilkS") (width 0.12) (tstamp e5695963-1995-40f2-a447-1a0682028cef)) + (fp_circle (center -2.25 -2.25) (end -2.25 -2.15) (layer "F.SilkS") (width 0.2) (fill none) (tstamp 402b0611-75e2-4922-87d8-1fc09aa060e9)) + (fp_line (start 2.5 2.5) (end -2.5 2.5) (layer "F.CrtYd") (width 0.05) (tstamp 12f325c5-b623-4cff-b8a0-015d34e040dd)) + (fp_line (start 2.5 -2.5) (end 2.5 2.5) (layer "F.CrtYd") (width 0.05) (tstamp 3a9cc810-76e7-454b-8c0e-7e87c4bc2be9)) + (fp_line (start -2.5 -2.5) (end 2.5 -2.5) (layer "F.CrtYd") (width 0.05) (tstamp 85e0f304-8795-4d48-a2db-186f7193f03b)) + (fp_line (start -2.5 2.5) (end -2.5 -2.5) (layer "F.CrtYd") (width 0.05) (tstamp aa931d1e-996d-4e9c-81e8-51f27dfe7349)) + (fp_line (start 2 2) (end 2 -2) (layer "F.Fab") (width 0.12) (tstamp 0e07c34a-af7b-4a69-96e5-048192852585)) + (fp_line (start -2 -1) (end -2 2) (layer "F.Fab") (width 0.12) (tstamp 41d7c7cb-e379-47e8-8fce-d65178cef7b7)) + (fp_line (start -2 2) (end 2 2) (layer "F.Fab") (width 0.12) (tstamp 5334bde5-08dc-4e10-b149-3f61f513611e)) + (fp_line (start 2 -2) (end -1 -2) (layer "F.Fab") (width 0.12) (tstamp c0b6e338-5160-4e09-a222-1ba04797ad2d)) + (fp_poly (pts + (xy -2 -1) + (xy -2 -2) + (xy -1 -2) + ) (layer "F.Fab") (width 0.12) (fill solid) (tstamp 08af2f41-e64a-465c-8644-5d4990d4c603)) + (pad "1" smd roundrect (at -1.9 -1 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 109 "/FPGA System/~{SV_MR}") (pinfunction "~{MR}") (pintype "input") (tstamp 48f7e780-702d-4e86-bd97-a9b42f164b68)) + (pad "2" smd roundrect (at -1.9 -0.5 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 508 "unconnected-(IC503-Pad2)") (pinfunction "CT4") (pintype "passive+no_connect") (tstamp c2ce275a-6e6e-4177-9ad1-b577b29e6538)) + (pad "3" smd roundrect (at -1.9 0 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 131 "/FPGA System/SV_CT3") (pinfunction "CT3") (pintype "passive") (tstamp 2628d390-7145-4f38-9907-6302f37a7a59)) + (pad "4" smd roundrect (at -1.9 0.5 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 133 "/FPGA System/SV_CT2") (pinfunction "CT2") (pintype "passive") (tstamp 9dd16ffd-6e3f-45f7-9c64-78e09a9df256)) + (pad "5" smd roundrect (at -1.9 1 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 134 "/FPGA System/SV_CT1") (pinfunction "CT1") (pintype "passive") (tstamp aa4de06a-4af6-4151-b3a9-7b59240efd38)) + (pad "6" smd roundrect (at -1 1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 1 "GND") (pinfunction "SENSE4H") (pintype "passive") (tstamp b41fe68d-681f-4666-bc7c-41900a5b075d)) + (pad "7" smd roundrect (at -0.5 1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 1 "GND") (pinfunction "SENSE4L") (pintype "passive") (tstamp c5e74868-a1ed-4e70-90cb-81414aa15b1d)) + (pad "8" smd roundrect (at 0 1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 106 "/FPGA System/SV_SENSE3") (pinfunction "SENSE3") (pintype "passive") (tstamp e663486f-625f-4ea0-9b01-655c199f19a0)) + (pad "9" smd roundrect (at 0.5 1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 107 "/FPGA System/SV_SENSE2") (pinfunction "SENSE2") (pintype "passive") (tstamp 3c5722ad-5f46-4ba5-b8a0-e88aada335f3)) + (pad "10" smd roundrect (at 1 1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 108 "/FPGA System/SV_SENSE1") (pinfunction "SENSE1") (pintype "passive") (tstamp e7207ed6-3f23-4ca0-ac46-eda1b2a0f97d)) + (pad "11" smd roundrect (at 1.9 1 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 509 "unconnected-(IC503-Pad11)") (pinfunction "NC") (pintype "no_connect") (tstamp 13f736b7-ba74-478a-80d1-43514a0ffaef)) + (pad "12" smd roundrect (at 1.9 0.5 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp cd8c90d6-073d-47ab-944a-b04517abadcf)) + (pad "13" smd roundrect (at 1.9 0 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 510 "unconnected-(IC503-Pad13)") (pinfunction "VREF") (pintype "power_in+no_connect") (tstamp ea4cf986-f7f5-42af-b371-4604d1a85402)) + (pad "14" smd roundrect (at 1.9 -0.5 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 10 "+3V3") (pinfunction "VDD") (pintype "power_in") (tstamp e9df98de-f561-4f41-88e1-d806ba3aeee8)) + (pad "15" smd roundrect (at 1.9 -1 180) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 279 "/FPGA System/~{SV_RST}") (pinfunction "~{RESET1}") (pintype "open_collector") (tstamp ff9eae3c-1036-460c-8cf8-102ddc01be13)) + (pad "16" smd roundrect (at 1 -1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 279 "/FPGA System/~{SV_RST}") (pinfunction "~{RESET2}") (pintype "open_collector") (tstamp e0e93dc1-fd0b-46c3-87e5-3c3527e296bf)) + (pad "17" smd roundrect (at 0.5 -1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 279 "/FPGA System/~{SV_RST}") (pinfunction "~{RESET3}") (pintype "open_collector") (tstamp 27d3145d-fe13-499a-a7f5-b5f720e42fc2)) + (pad "18" smd roundrect (at 0 -1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 511 "unconnected-(IC503-Pad18)") (pinfunction "~{RESET4}") (pintype "open_collector+no_connect") (tstamp c296457d-ee5b-4878-8ac9-4dfa25752d0b)) + (pad "19" smd roundrect (at -0.5 -1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 512 "unconnected-(IC503-Pad19)") (pinfunction "~{WDO}") (pintype "open_collector+no_connect") (tstamp 421fca03-6322-43b9-9cd9-c4997ec6a38f)) + (pad "20" smd roundrect (at -1 -1.9 90) (size 0.25 1) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 280 "/FPGA System/SV_WDI") (pinfunction "WDI") (pintype "input") (tstamp 9eb656d2-148d-4e86-a5da-e1697ce150e6)) + (pad "21" thru_hole circle (at 0.8 -0.8 90) (size 0.5375 0.5375) (drill 0.2) (layers *.Cu *.Mask) + (net 1 "GND") (pinfunction "EPAD") (pintype "power_in") (tstamp 1a4095c5-2a67-4704-8748-b9d0d44454eb)) + (pad "21" thru_hole circle (at 0.8 0.8 90) (size 0.5375 0.5375) (drill 0.2) (layers *.Cu *.Mask) + (net 1 "GND") (pinfunction "EPAD") (pintype "power_in") (tstamp 1f162824-4818-4d22-86ef-f9972403692b)) + (pad "21" thru_hole circle (at 0 0 90) (size 0.5375 0.5375) (drill 0.2) (layers *.Cu *.Mask) + (net 1 "GND") (pinfunction "EPAD") (pintype "power_in") (tstamp 604fe231-a5fb-4924-800d-f92df3406afd)) + (pad "21" thru_hole circle (at -0.8 0.8 90) (size 0.5375 0.5375) (drill 0.2) (layers *.Cu *.Mask) + (net 1 "GND") (pinfunction "EPAD") (pintype "power_in") (tstamp 9f4fad38-be4f-4d87-9302-8387474f9268)) + (pad "21" thru_hole circle (at -0.8 -0.8 90) (size 0.5375 0.5375) (drill 0.2) (layers *.Cu *.Mask) + (net 1 "GND") (pinfunction "EPAD") (pintype "power_in") (tstamp c2df6d65-2a91-48e3-9326-b921c414dfd0)) + (pad "21" smd rect (at 0 0 90) (size 2.15 2.15) (layers "F.Cu" "F.Paste" "F.Mask") + (net 1 "GND") (pinfunction "EPAD") (pintype "power_in") (solder_paste_margin_ratio -0.1) (tstamp fad97280-7d2a-4a8f-8388-0c1f39d99017)) + (model "${KIPRJMOD}/hil-kicad-libraries/3dmodels/Package_DFN_QFN.3dshapes/QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm.wrl" + (offset (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) +) From 7763d05b71af56e2b3bed1299f98cc2b417408bc Mon Sep 17 00:00:00 2001 From: Marvin Mager <99667992+mvnmgrx@users.noreply.github.com> Date: Wed, 29 Jun 2022 23:50:45 +0200 Subject: [PATCH 4/5] Docu: Removed not implemented notice from Arc() --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 54ae40e..6d22876 100644 --- a/README.md +++ b/README.md @@ -60,7 +60,7 @@ The module features the following classes: | | - PlotSettings() # Plotting and printing setting | | - SetupData() # Current settings used by a board | | - Segment() # Track segment on a board - | | - Arc() # Arc on a board (not implemented) + | | - Arc() # Arc on a board | | - Via() # Via on a board | | - Target() # Target markers | | From df4394519d73ffb7279e8a6bd7d513e33284a4cd Mon Sep 17 00:00:00 2001 From: Marvin Mager <99667992+mvnmgrx@users.noreply.github.com> Date: Thu, 30 Jun 2022 00:05:35 +0200 Subject: [PATCH 5/5] Docu: Updated CHANGELOG notice for line break fix --- CHANGELOG.md | 3 +++ 1 file changed, 3 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index f8e7425..c535acf 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -2,6 +2,9 @@ ## v1.1.2 - xx.xx.xxxx - Added: Support for track arcs at `kiutils.items.brditems.Arc()` +- Fixed: Redundant line break in a footprint's pad section with a schematic symbol assigned (aka + net, pinfunction or pintype token set) as well as at least the solder_paste_margin_ratio + token set ## v1.1.1 - 27.06.2022 - Added: Support for custom design rules (`.kicad_dru`)